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GB2300517A - Method of manufacturing a semiconductor device - Google Patents

Method of manufacturing a semiconductor device Download PDF

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Publication number
GB2300517A
GB2300517A GB9608822A GB9608822A GB2300517A GB 2300517 A GB2300517 A GB 2300517A GB 9608822 A GB9608822 A GB 9608822A GB 9608822 A GB9608822 A GB 9608822A GB 2300517 A GB2300517 A GB 2300517A
Authority
GB
United Kingdom
Prior art keywords
film
amorphous silicon
silicon substrate
forming
silicon film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9608822A
Other versions
GB2300517B (en
GB9608822D0 (en
Inventor
Oh Sung Kwon
Jin Tae Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hyundai Electronics Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Industries Co Ltd filed Critical Hyundai Electronics Industries Co Ltd
Publication of GB9608822D0 publication Critical patent/GB9608822D0/en
Publication of GB2300517A publication Critical patent/GB2300517A/en
Application granted granted Critical
Publication of GB2300517B publication Critical patent/GB2300517B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Recrystallisation Techniques (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Description

2300517 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE This invention
relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming a polysilicon film that is capable of removing a native oxide film and contaminants and also has large grains through silicon ions implantation and annealing.
In manufacturing a semiconductor device, a polysilicon film is widely used as a conductor film. References are now, made to Fig. 1A and Fig. IB to shosy a method of manufacturing polysilicon film according to a prior art.
Fig. 1A and Fig. IB shosy cross-sectional views to show method of manufacturing the conventional polysilicon film.
In Fig. LA, an insulating film(3) is formed on a silicon substrate( 1 having a junction region(2). The 1 insulating film(3) is then patterned by a photo and etch process using a contact hole mask so that the silicon substrate(l) of the junction region(2) is exposed, thereby making a contact hole(4). Normally a native oxide film(10) grows on the exposed silicon substrate(l).
In Fig. IB, to remove the native oxide film(I0), a wet cleaning process using BOE(buffered oxide etchant) or HF chemical is performed. Then a polysilicon film(5) is deposited in a deposition tube of 300 IC, to contact the junction region(2). But grains(A) of the polysilicon film(5) formed by the above process are small of 0. 1 - 0. 5 micro meters so that it has disadvantages to reduce the mobility of electrons and electrical conductivity. And also the remaining native oxide film(I0) increases contact resistance.
An aim of the invention is that it provides a method of manufacturing a semiconductor device having a polysilicon f i 1 m that is capable of removing a native oxide film and contaminants and also has large grains through silicon ions 2 implantation and annealing. And as another aim of the present invention, it provides a method of removing a native oxide film and preventing the regrowth of the native oxide film after cleaning, by CF4 plasma cleaning followed by loading the silicon substrate into an amorphous silicon film deposition tube for inert gas to be flown.
To accomplish the aims, the present invention provides a method comprising the steps of:
forming an insulating film on a silicon substrate having a junction region:
patterning the insulating film till the silicon substrate of the junction region is exposed, thereby forming a contact hole; sequentially performing wet cleaning and plasma treatment to remove a native oxide film and contaminants on the exposed silicon substrate; loading the silicon substrate into an amorphous silicon film deposition tube for inert gas to be flown; forming an amorphous silicon film at a predetermined temperature; 3 implanting silicon ions into the amorphous silicon film with a predetermined dose and energy; and thermally treating said amorphous silicon film to form a polysilicon film.
For fuller understanding of the nature and aims of the invention, reference should be had to the following detailed description taken in conjunction with t accompanying drawings in which:
Fig. IA and Fig. 1B are cross-sectional views of a semiconductor device for explaining a method of forming a polysilicon film according to a prior art; and
Figs. 2A through 2D are cross-sectional views of a semiconductor device in order to show a method of forming a polysilicon film in accordance with the present invention.
Similar reference characters refer to similar parts through the several views of the drawings.
4 he Figs. 2A through 2D are cross-sectional views of a semiconductor device in order to show a method of forming a polysilicon film in accordance with the present invention.
In Fig. 2A, an insulating film(3) is formed on a silicon substrate(l) having a junction region(2). The insulating film(3) is patterned by a photo and etch process using a contact hole mask so that the silicon substrate(l) of the junction region(2) is exposed, thereby making a contact hole(4). Normally a native oxide film(I0) grows on the exposed silicon substrate(l).
In Fig. 2B, a wet cleaning process using BOE or HF chemical is performed to remove the native oxide film(10), and then followed by plasma treatment using CF4 gas for 20 through 40 seconds. Then the silicon substrate(l) is loaded into an amorphous silicon film deposition tube, to which inert gas such as a nitrogen(N2) gas is flown so that the concentration of oxygen gas is restrained low. An amorphous silicon film(6) is deposited of 1000 through 3000 A on the resulting structure after the plasma treatment, through LPUDHow pressure chemical pressure deposition) using a thermal decomposition of SiH4 gas at 560 through the CF4 plasma treatment is 580 C. In the above performed to remove film after the wet processes, not only the remaining native oxide cleaning but also contaminants like 02 or H2 that serves as nuclei for grain growth of a polysilicon film. In loading the silicon substrate(l) into the deposition tube, N?- gas purging keeps oxygen concentration in the tube very low so that it restrains the growth of the native oxide film during loading the silicon substrate.
Fig. 2C illustrates that silicon ions of about 1015 Cm-2 order are implanted at a predetermined energy level into the amorphous silicon film(6).
In Fig. 21), the amorphous silicon film(6) is thermal treated at 500 through 700 IC in a nitrogen gas ambient, thereby turning into a polysilicon film(6A). In this case, as contaminants served as nuclei for grain growth are completely removed by the CF4 plasma treatment, the growth of the grains(B) is improved. Furthermore, an increased internal energy level caused by silicon ion implantation into the amorphous silicon film makes the grains(B) very big. When the 6 above method is used, it is possible to grow grains to over 1 micro meter.
As described above in detail, reducing contact resistance by completely removing the native oxide film before depositing the amorphous silicon film, and increasing electron mobility and conductivity by maximizing the grain size using silicon implantation and recrystallization can be accomplished in accordance with the present invention.
The foregoing description, although described in i preferred embodiment with a certain degree of particularity is only an illustratlon of the principle of thepresent invention. It is to be understood that the present invention is not to be limited to the preferred embodiment disclosed and illustrated herein. Accordingly, all expedient variations that may be made within the scope of the present invention are to be encompassed as further embodiments of the present invention.
7 S

Claims (1)

  1. CLAIMS:
    1. A method of manufacturing a semiconductor device, comprising the steps of:
    forming an insulating film on a silicon substrate having a junction region; patterning said insulating film till said silicon substrate of said junction region is exposed, thereby forming a contact hole:
    sequentially performing wet cleaning and plasma treatment to remove a native oxide film and contaminants on said exposed silicon substrate:
    loading said silicon substrate into an amorphous silicon film deposition tube for inert gas to be flown:
    forming an amorphous silicon film:
    implanting silicon ions into said amorphous silicon film; and thermally treating said amorphous silicon film to form a polysilicon film.
    8 2. The method of claim 1, wherein any one of BOE and HF chemical is used for wet cleaning.
    3. The method of claim 1, wherein plasma treatment performed using CF4 gas for 20 through 40 seconds.
    i S 4. The method of claim 1, wherein said si 1 icon substrate is loaded into said amorphous silicon film deposition tube, to whi ch inert gas i S f 1 own, thereby restraining the concentration of oxygen gas.
    5. The method of claim 1, wherein said amorphous silicon film is deposited through an LPM process using a thermal decomposition of SiH4 gas at 560 through 580 IC.
    6. The method of claim 1, wherein said amorphous is deposited to a thickness of 1000 through 3000 A.
    silicon film 7. The method of claim 1, wherein said silicon ions are implanted in the order of about 10 Cm-2.
    9 8. The method of claim 1, wherein said amorphous silicon film is thermally treated at 500 through 700 IC in a nitrogen gas ambient, thereby turning into a polysilicon film.
    9. A method of manufacturing a semiconductor device, comprising the steps of:
    forming an insulating film on a silicon substrate having a junction region:
    patterning said insulating film till said silicon substrate of said junction region is exposed, thereby forming a contact hole; sequentially performing wet cleaning and plasma treatment to remove a native oxide film and contaminants on said exposed silicon substrate:
    forming an amorphous silicon film: and thermally treating said amorphous silicon film to form a polysilicon film.
    10. The method of claim 9, Therein any one of BOE and HF chemical is used for wet cleaning.
    11. The method of claim 9, wherein plasma treatment performed using CF4 gas for 20 through 40 seconds.
    i S 12. The method of claim 9, wherein said amorphous s i 1 icon f i lm i s deposited through an LPUD process using a thermal decomposition of SiH4 gas at 560 through 580 1C.
    13. The method of claim 9, wherein said amorphous silicon film is deposited to a thickness of 1000 through 3000 A.
    14. The method of claim 9, wherein said amorphous silicon film is thermally treated at 500 through 700 IC in a nitrogen gas ambient, thereby turning into a polysilicon film.
    15. A method of manufacturing a semiconductor device, comprising the steps of: forming an insulating film on a silicon substrate having a junction region; 11 patterning said insulating film till said silicon substrate of said junction region is exposed, thereby forming a contact hole; sequentially performing wet cleaning and plasma treatment to remove a native oxide film and contaminants on said exposed silicon substrate: loading said silicon substrate into an amorphous silicon film deposition tube for inert gas to be flown: forming an amorphous silicon film: and thermally treating said amorphous silicon film to form a polysilicon film.
    16. The method of claim 15, wherein any one of BOE and HF chemical is used for ivet cleaning.
    17. The method of claim 15, wherein plasma treatment is performed using CF4 gas for 20 through 40 seconds.
    18. The method of claim 15, wherein said silicon substrate is loaded into said amorphous silicon film deposition tube, to 12 which inert gas is concentration of oxygen gas.
    f 1 own, thereby restraining the 19. The method of claim 15, wherein said amorphous silicon film is deposited through an LPUD process using a thermal decomposition of SiH4 gas at 560 through 580 IC.
    20. The method of claim 15, wherein said amorphous silicon film is deposited to a thickness of 1000 through 3000 A.
    21. The method of claim 15, wherein said amorphous silicon film is thermally treated at 500 through 700 IC in a nitrogen gas ambient, thereby turning into a polysilicon film.
    22. A method of manufacturing a comprising the steps of:
    forming an insulating film on a silicon substrate having a junction region:
    patterning said insulating film till said silicon substrate of said junction region is exposed, thereby forming semiconductor device, 13 i a contact hole:
    sequentially performing we t cleaning and plasma treatment to remove a native oxide film and contaminants on said exposed silicon substrate; forming an amorphous silicon film; implanting silicon ions into said amorphous silicon film; and thermally treating said amorphous silicon film to form a polysilicon film.
    23. The method of claim 22, wherein any one of BOE and HF chemical is used for wet cleaning.
    24. The method of claim 22, wherein plasma treatment is performed using CF4 gas for 20 through 40 seconds.
    25. The method of claim 22, wherein said amorphous silicon film is deposited through an LPM process using a thermal decomposition of SiH4 gas at 560 through 580 C.
    14 26. The method of claim 22, wherein said amorphous si 1 icon film is deposited to a thickness of 1000 through 3000 A.
    27. The method of claim 22, wherein said silicon ions are implanted in the order of about 10 Cm-1.
    28. The method of claim 22, wherein said amorphous silicon film is thermally treated at 500 through 700 IC in a nitrogen gas ambient, thereby turning into a polysilicon film.
    29. A method of manufacturing a semiconductor device, comprising the steps of:
    forming an insulating film on a silicon substrate having a junction region; patterning said insulating film till said silicon substrate of said junction region is exposed, thereby forming a contact hole:
    wet cleaning to remove a native oxide film and contaminants on said exposed silicon substrate:
    loading said silicon substrate into an amorphous silicon film deposition tube for inert gas to be flown; forming an amorphous silicon film; implanting silicon ions into said amorphous silicon film; and thermally treating said amorphous silicon film to form a polysilicon film.
    30. The method of claim 29, wherein any one of BOE and HF chemical is used for wet cleaning.
    31. The method of claim 29, wherein said silicon substrate is loaded into said amorphous silicon film deposition tube, to which inert gas is f 1 own, thereby restraining the concentration of oxygen gas.
    32. The method of claim 29, wherein said amorphous si 1 icon film is deposited through an LPUD process using a thermal decomposition of SiH4 gas at 560 through 580 7C.
    33. The method of claim 29, wherein said amorphous silicon 16 film is deposited to a thickness of 1000 through 3000 A.
    34. The method of claim 29, wherein said silicon ions are implanted in the order of about 1V Cm-2.
    35. The method of claim 29, wherein said amorphous silicon film is thermally treated at 500 through 700 IC in a nitrogen gas ambient, thereby turning into a polysilicon film.
    36. A method of manufacturing a semiconductor device, comprising the steps of:
    forming an insulating film on a silicon substrate having a junction region; patterning said insulating film till said silicon substrate of said junction region is exposed, thereby forming a contact hole:
    wet cleaning to remove a native contaminants on said exposed silicon substrate:
    loading said silicon substrate into silicon film deposition tube for inert gas to be flo,.;n:
    17 oxide f i 1 m and an amorphous forming an amorphous silicon film; and thermally treating said amorphous silicon polysilicon film.
    film to form a 37. The method of claim 36, wherein any one of BOE and HF chemical is used for wet cleaning.
    38. The method of claim 36, wherein said silicon substrate loaded into said amorphous silicon film deposition tube, to which inert gas is concentration of oxygen gas.
    f 1 own, thereby restraining the i S 39. The method of claim 36, wherein said amorphous silicon film is deposited through an LPUD process using a thermal decomposition of SiH4 gas at 560 through 580 1C.
    40. The method of claim 36, wherein said amorphous silicon film is deposited to a thickness of 1000 through 3000 A.
    The method of claim 36, wherein said amorphous silicon 18 film is thermally treated at 500 through 700 IC in a nitrogen gas ambient, thereby turning into a polysilicon film.
    42. A method o f manufacturing a semiconductor device, comprising the steps of: forming an insulating film on a silicon substrate having a junction region; patterning said insulating film till said silicon substrate of said junction region is exposed, thereby forming a contact hole; we t cleaning t o remove a native oxide film and contaminants on said exposed silicon substrate: forming an amorphous silicon film; implanting silicon ions into said amorphous silicon film; and thermally treating said amorphous silicon film to form a polysilicon film.
    43. The method of claim 42, wherein any one of BOE and HF chemical is used for wet cleaning.
    19 44. The method of claim 42, ivherein said amorphous silicon film is deposited through an LPUD process using a thermal decomposition of SiH4 gas at 560 through 580 1C.
    45. The method of claim 42, yherein said amorphous silicon film is deposited to a thickness of 1000 through 3000 A.
    46. The method of claim 42, ivherein said silicon ions are implanted in the order of about 1015 Cm-2.
    47. The method of claim 42, ivherein said amorphous silicon film is thermally treated at 500 through 700 IC in a nitrogen gas ambient, thereby turning into a polysilicon film.
    48. A method of manufacturing a semiconductor device substantially as hereinbefore described with reference to Figures 2A, 2B, 2C and 2D of the accompanying drawings.
GB9608822A 1995-05-04 1996-04-30 Method of manufacturing a semiconductor device Expired - Fee Related GB2300517B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950010983A KR100208439B1 (en) 1995-05-04 1995-05-04 Polysilicon layer formation method of semiconductor device

Publications (3)

Publication Number Publication Date
GB9608822D0 GB9608822D0 (en) 1996-07-03
GB2300517A true GB2300517A (en) 1996-11-06
GB2300517B GB2300517B (en) 1999-07-28

Family

ID=19413757

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9608822A Expired - Fee Related GB2300517B (en) 1995-05-04 1996-04-30 Method of manufacturing a semiconductor device

Country Status (6)

Country Link
JP (1) JPH08306642A (en)
KR (1) KR100208439B1 (en)
CN (1) CN1083158C (en)
DE (1) DE19617833A1 (en)
GB (1) GB2300517B (en)
TW (1) TW291572B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6693030B1 (en) * 1997-12-30 2004-02-17 Applied Materials, Inc. Reactive preclean prior to metallization for sub-quarter micron application

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010123866A (en) 2008-11-21 2010-06-03 Sharp Corp Semiconductor device and method of manufacturing the same
KR102178535B1 (en) 2014-02-19 2020-11-13 삼성전자주식회사 Methods of manufacturing semiconductor devices
CN106571289B (en) * 2015-10-13 2020-01-03 中芯国际集成电路制造(上海)有限公司 Semiconductor device, preparation method thereof and electronic device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5266514A (en) * 1992-12-21 1993-11-30 Industrial Technology Research Institute Method for producing a roughened surface capacitor
GB2294591A (en) * 1994-10-31 1996-05-01 Nec Corp A method of forming a non-planar capacitor electrode

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1239706A (en) * 1984-11-26 1988-07-26 Hisao Hayashi Method of forming a thin semiconductor film
JPH0322527A (en) * 1989-06-20 1991-01-30 Fujitsu Ltd Manufacturing method of semiconductor device
JPH0350823A (en) * 1989-07-19 1991-03-05 Nec Corp Manufacture of semiconductor device
JP3125302B2 (en) * 1990-11-21 2001-01-15 セイコーエプソン株式会社 Method for manufacturing semiconductor device
JPH05275365A (en) * 1992-03-30 1993-10-22 Oki Electric Ind Co Ltd Manufacture of semiconductor element
JPH0729852A (en) * 1993-07-07 1995-01-31 Kawasaki Steel Corp Fabrication of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5266514A (en) * 1992-12-21 1993-11-30 Industrial Technology Research Institute Method for producing a roughened surface capacitor
GB2294591A (en) * 1994-10-31 1996-05-01 Nec Corp A method of forming a non-planar capacitor electrode

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6693030B1 (en) * 1997-12-30 2004-02-17 Applied Materials, Inc. Reactive preclean prior to metallization for sub-quarter micron application

Also Published As

Publication number Publication date
JPH08306642A (en) 1996-11-22
TW291572B (en) 1996-11-21
GB2300517B (en) 1999-07-28
CN1083158C (en) 2002-04-17
KR100208439B1 (en) 1999-07-15
GB9608822D0 (en) 1996-07-03
CN1144397A (en) 1997-03-05
DE19617833A1 (en) 1996-11-07

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Effective date: 20100430