GB2130826A

GB2130826A - Directly mixing synchronous receiver

Info

Publication number: GB2130826A
Application number: GB08329429A
Authority: GB
Inventors: Heinz Rinderle
Original assignee: Telefunken Electronic GmbH
Current assignee: Telefunken Electronic GmbH
Priority date: 1982-11-03
Filing date: 1983-11-03
Publication date: 1984-06-06
Also published as: DE3240565C2; NL8303754A; JPS5997233A; GB8329429D0; DE3240565A1

Abstract

A direct conversion synchronous receiver for AM reception with adjustable receiving frequency comprises a PLL circuit (3-6) including a controllable oscillator (12) for generation of a frequency signal whose frequency is a multiple of the carrier frequency, and frequency dividers (14, 15) for generation of signals offset with respect to one another by 90 DEG , one of which drives the mixer (2) of the demodulation stage and the other of which drives the mixer (3) of the PLL circuit. The requisite quadrature signals are thus produced by halving the frequencies of signals which are in anti-phase, the latter being provided using a phase inverter (13); or from complementary outputs of the VCO, or from complementary outputs of a third frequency divider in the last case the VCO works at four (rather than two) times the received carrier frequency. The design is integratable. <IMAGE>

Description

SPECIFICATION Directly mixing synchronous receiver The invention relates to a directly mixing synchronous receiver for AM reception with an adjustable receiving frequency comprising a PLL circuit for synchronization of the heterodyne oscillation and a mixer for the amplitude modulation.

The classical concept of a present-day radio receiver involves the superhet principle.

According to this well known principle, the input signal is converted into an intermediate frequency signal, selectively reinforced and demodulated.

The common type of analog signal processing requires highly selective band-pass filters in the IF section. Aside from LC filters, ceramic, quartz and surface wave filters are used as configurations of such band-pass filters. Such filter configurations do, however, hinder further integration of the analog signal processing section and consequently efficient receiver fabrication. Some of the aforementioned filter configurations are also very expensive. Under these circumstances, the development of new, integratable receiver concepts is of special importance.

The so-called directly mixing AM receiver, known in principle, and comprising, in a manner known per se, a multiplicative mixer, a low frequency amplifier and a heterodyne oscillator, offers new possibilities. In the case of the known directly mixing AM receiver, no intermediate frequency is generated, but rather the wanted signal is directly demodulated by the heterodyne oscillator being tuned to the wanted signal to be received and being synchronized in proper phase with the carrier of the wanted signal. Under this condition, the side bands of the wanted signal are directly transposed by the mixer into the base band, i.e., LF band, and, consequently, the wanted signal is directly demodulated. After band-limited reinforcement, the signal thus obtained can then be reproduced as an information signal.

In the following, the signal conversion in a directly mixing synchronous receiver is explained in greater detail. The high frequency signal spectrum fed to the mixer comprises, for example, a relatively weak wanted signal and a strong spurious signal. Both signals comprise the carrier signal and the modulation side bands, respectively. The frequency of the heterodyne oscillator is tuned to the wanted signal and synchronized with its carrier. The phase of the oscillator signal and the phase of the wanted signal at the mixer are in-phase or anti-phase.

In this case, there is produced at the mixer output a direct current component proportional to the carrier amplitude of the wanted signal and also the sum of the demodulated sign spectra of the wanted signal and the transported, but not demodulated spurious signal spectrum which is offset by the amount of the original frequency spacing. At the output of the band-limited LF amplifier, the demodulated wanted signal appears reinforced, while the spectrum originating from the spurious signal is weakened in accordance with the low-pass filter characteristic of the LF amplifier.

The known receiver system offers the advantage of having its own selectivity, since in the ideal case solely (only) the signal whose carrier frequency equals the frequency of the heterodyne oscillator is demodulated. Whistling, as caused in the superhet receiver by signal spectra on the signal frequency, does not occur.

A directly mixing synchronous receiver has the further advantage that the channel may be selected on the LF level and, therefore, in the base band. Owing to the inherent selectivity of the system, there are no high demands on the filter characteristic, which is an essential precondition of integratability of the system. Nor do directly mixing synchronous receivers involve any basic problems as far as synchronism is concerned since the parallel synchronism between preselection and heterodyne receiver-contrary to the superhet receiver cntaiís no difficulties.

Also, in the case of directly mixing synchronous receivers, the threshold sensitivity is better than in superhet receivers which aside from the noise factor of the input stage is also determined by the demodulation band width which in the case of synchronous demodulation is only half as large as in two-side band AM with conventional demodulation.

Directly mixing synchronous receivers for AM reception with adjustable receiving frequency comprise, for example, a PLL circuit for synchronization of the heterodyne oscillation and a mixer for the amplitude modulation. With such a receiver, signals which are offset by 900 with respect to one another have to be generated. One of these signals drives the mixer of the demodulation stage and the other signal the mixer of the PLL circuit.

Difficulties are encountered in the generation of signals which are phase-shifted by 900 if a relatively large frequency range is to be tuned, which is the case with radio receivers. Hitherto, elaborate all-pass filters or signal couplers (hybrids) which are not integratable have been used.

The invention seeks to provide a directly mixing synchronous receiver with a solution for the generation of signals phase-shifted by 900 which is integratable and results in a simpler design of a directly mixing synchronous receiver.

According to the invention, there is provided a directly mixing synchronous receiver for AM reception with adjustable receiving frequency comprising a PLL circuit for synchronization of the heterodyne oscillation and a mixer for the amplitude modulation, wherein controllable oscillator is provided for generation of a frequency signal whose frequency is a multiple of the receiving frequency, and frequency dividers are provided for generation of signals offset with respect to one another by 900, one of which drives the mixer of the demodulation stage and the other the mixer of the PLL circuit.

Not only does the invention enable easier integration and simpler design, it also offers the advantage that the oscillator does not cause any inherent interference in the receiving system. This also makes for simpler design of the synchronous receiver.

The frequency of the controllable oscillator may equal twice the receiving frequency and the output signal may be converted into two antiphase signals, one of which is fed to a first frequency divider and the other to a second frequency divider.

The controllable oscillator may drive a phase inverter and the first frequency divider, and the second frequency divider may be connected to the phase inverter. There is, however, also the possibility of the controllable oscillator itself providing the two anti-phase signals.

The controllable frequency divider may drive a third frequency divider which delivers two antiphase signals with twice the receiving frequency, one of which drives the first frequency divider and the other from the second frequency divider. In this case, the controllable oscillator delivers four times the receiving frequency.

The invention will now be described in greater detail, by way of example, with reference to the drawing, in which:~ Figure 1 is a block diagram of a receiver in accordance with the invention; Figure 2 is a circuit diagram of a loop filter shown in Figure 1; Figure 3 is a block diagram of a unit for delivering two offset signals; Figure 4 is a block diagram of an alternative form of the unit shown in Figure 3; Figure 5 is a circuit diagram of a voltage controlled oscillator suitable for the unit shown in Figure 4; Figure 6 is a block diagram of a further form of the unit shown in Figure 3; and Figure 7 is a graphical representation of signals occurring during the operation of the unit shown in Figure 3.

As is apparent from Figure 1, the antenna signal in a directly mixing synchronous receiver is fed to a tunable selective amplifier 1 which provides preferential reinforcement of the received signal. The output signal of the selective amplifier 1 is fed to the two multiplicative mixers 2 and 3. Passive annular mixers or active configurations such as the integrated circuits TDA 1062 or MC 1595 are, for example, used as multiplicative mixers. Mixer 3 is part of a PLL circuit which feeds one input of the mixer 2 with a signal with the frequency of the received signal. In addition to the mixer 3, the PLL circuit comprises a loop filter 4, an amplifier 5 and a unit 6 which delivers two signals offset with respect to one another by 900 with the frequency of the received signal.If the signal delivered by the unit 6 and consequently by the PLL circuit, with the frequency of the received signal, is fed in-phase or in anti-phase together with the received signal to the mixer 2, a low frequency signal directly containing the desired information occurs at the output of the mixer 2. Connected to the mixer 2 is an LF amplifier 7 which reinforces the demodulated signal.

As shown in Figure 2, the loop filter 4 may, for example, comprise of a resistor 8 in the longitudinal branch, a capacitor 9 in a transverse branch and a resistor 10 and a capacitor 11 in the other transverse branch. Loop filters may, however, also be provided in active form within the amplifier 5.

As shown in Figure 3, the unit 6 delivering the two signals offset with respect to one another by 900 comprises, for example, a voltage controlled oscillator 12 which drives a phase inverter 13 and a first frequency divider 14. Connected to the phase inverter 13 is the second frequency divider 1 5. The oscillator delivers a signal whose frequency is equal to twice the frequency of the received signal. This signal is divided down by the two frequency dividers 14 and 15 in the ratio of 2:1, so that signals whose frequency equals the receiving frequency are produced at the two outputs 1 6 and 17 of the unit shown in Figure 3.

The phase inverter 13 brings about a phase displacement by 1800, while signals offset by 900 with respect to one another occur as a result of the frequency division at the outputs 16 and 17.

Figure 4 shows another embodiment of the unit 6 of Figure 1. According to Figure 4, the voltage controlled oscillator 12 itself delivers two signals phase-shifted by 1 800, one of which is fed to the first frequency divider 14 and the other to the second frequency divider 15. On account of the frequency division, two signals phase-shifted by 900 occur at the output 18, 19 of the circuit shown in Figure 4.

Figure 5 shows an embodiment of the voltage controlled oscillator 12 of Figure 4 which delivers two signals phase-shifted by 1 800. According to Figure 5, such an oscillator comprises a resonant circuit with a varactor double diode 20 and a resonant circuit coil 21. Transformer coupled to this resonant circuit is a cross-coupled differential amplifier comprising two transistors 22 and 23, the signals phase-shifted by 1 800 being able to be picked off at the outputs of the differential amplifier. One output is connected to the base of the transistor 23 and the other output to the base of the transistor 22. As is further apparent from Figure 5, the collector of each of the transistors is connectedlto the base of the other transistor, respectively. The oscillator is supplied by an operating voltage source 24.

Figure 6 shows a further embodiment of the unit 6 of Figure 1. While the oscillator of Figures 3 and 4 delivers a signal whose frequency is equal to twice the receiving frequency, the oscillator 12 of Figure 6 delivers a signal whose frequency equals four times the receiving frequency. This signal is fed to the third frequency divider 25 which delivers two signals phase-shifted by 1800, whose frequency is only twice the receiving frequency owing to the frequency division in the ratio of 2:1. One signal is fed to the first frequency divider 14 and the other signal is fed to the second frequency divider 1 5. Owing to further frequency division in the ratio of 2:1, two signals phase-shifted by 900 whose frequency equals the receiving frequency occur at the two outputs 26, 27.

Figure 7 shows as examples curve shapes of the signals occurring during operation of the arrangement shown in Figure 3. Figure 7a shows the output signal of the oscillator 12 from which there is generated, by means of the frequency divider 14, the signal shown in Figure 7b which owing to the frequency division in the ratio of 2:1 has half the frequency of the signal of Figure 7a.

The rectangular shape of the signal of Figure 7b results from the use of flip-flops-in the frequency divider 15.

The signal of Figure 7c, which is the output signal of the phase inverter 13 of Figure 3, is phase-shifted by 1 800 with respect to the output signal of the oscillator 12. The signal-of Figure 7d is the output signal of the second frequency divider 1 5 which, as a result of the division in the ratio of 2:1 has only half the frequency of the signal of Figure 7c and consequently the frequency of the received signal. The rectangular shape of the signal of Figure 7d is likewise due to flip-flops in the frequency divider. On comparing the signals of Figures 7b and 7d, it is apparent that these two signals, one of which (Figure 7b) occurs at the output 1 6 and the other (Figure 7d) at the output 17 of the circuit arrangement of Figure 3, exhibit, as desired, a phase-shift of 900 with respect to one another.

Claims

1. A directly mixing synchronous receiver for AM reception with adjustable receiving frequency comprising a PLL circuit for synchronization of the heterodyne oscillation and a mixer for the amplitude modulation, wherein a controllable oscillator is provided for generation of a frequency signal whose frequency is a multiple of the receiving frequency, and frequency dividers are provided for generation of signals offset with respect to one another by 900, one of which drives the mixer of the demodulation stage and the other the mixer of the PLL circuit.

2. A synchronous receiver according to claim 1, wherein the frequency of the controllable oscillator equals twice the receiving frequency, and the output signal is converted into two antiphase signals, one of which is fed to a first frequency divider and the other to a second frequency divider.

3. A synchronous receiver according to claim 2, wherein the controllable oscillator drives a phase inverter and the first frequency divider, and the second frequency divider is connected to the phase inverter.

4. A synchronous receiver according to claim 2, wherein the controllable oscillator is designed to deliver the two anti-phase signals.

5. A synchronous receiver according to claim 2, wherein the controllable oscillator is designed to deliver a signal with four times the receiving frequency, and drives a third frequency divider which delivers two anti-phase signals with twice the receiving frequency, one of which drives the first frequency divider and the other of which drives the second frequency divider.

6. A synchronous receiver according to any one of claims 1 to 5, wherein the controllable oscillator for generation of the anti-phase signals is of symmetrical design.

7. A synchronous receiver according to any one of claims 1 to 6, wherein the mixers and the frequency dividers are integrated in a common semiconductor body.

8. A directly mixing synchronous receiver substantially as described herein with reference to the drawings.