GB2092372A - Variable capacitor - Google Patents

Abstract

A variable capacitor comprises a number of variable capacitance elements 10A, 10B, 10C, each having a depletion layer control section 16 and a capacity sensing section 13. The reverse bias voltage applied to the depletion layer control section of an element determines the contribution of that element to the total capacitance 17, 18. The capacity sensing and depletion layer control sections may have PN junction structures (Figure 3), or MIS or Schottky barrier structures. Insulating regions may be provided between adjacent elements to reduce interference, and the bias switching circuit 19 may be formed on the same semiconductor substrate 9 as the capacitors. <IMAGE>

Description

SPECIFICATION Variable Capacitor This invention relates to variable capacitors.

Conventionally, there has generally been used a PN junction element as a variable capacitor as shown in Figure 1 of the accompanying drawings. In Figure 1 there is shown an N-type semiconductor region 1, a P-type semiconductor region 2, a PN junction 3, and ohmic electrodes 4 and 5 provided in the region 1 and 2, respectively. Lead-in terminals 6 and 7 are provided on the electrodes 4 and 5, respectively and there is a depletion layer 8 between the P and N type regions.

In this arrangement, the depletion layer 8 can be increased or decreased in response to a bias voltage applied to the lead-in terminal 6 and 7. The capacity changes in accordance with increase or decrease of the depletion layer 8 and is sensed between the lead-in terminals 6 and 7.

However, conventional variable capacitors utilizing such a PN junction element have the following drawbacks: ; Due to the fact that the conventional variable capacitor makes use of the increase or decrease of the depletion layer at the PN junction being dependent or the bias voltage, the minimum capacity is determined by impurity concentration in the semiconductor regions while the maximum capacity is determined by increase of conductance component.

Therefore, it is practically impossible to permit a large variable range of the capacity with the Q factor is large. Additionally, the larger the capacity variation the higher the Q factor becomes. Therefore, the conventional variable capacitor is attended with difficulties in designing the circuit.

(2) Due to the fact that supply of the bias voltage for varying capacity and sensing of the capacity variation are performed by means of the common lead-in terminals, the capacitor is apt to suffer undesired capacity variation in response to voltage of the input signal itself when the capacitor is adopted in a resonance circuit, etc. resulting in causing signal deterioration. Further, since there is required a specific circuit arrangement in which interference between the input signal voltage and the bias voltage is small, the conventional variable capacitor is restricted to a few uses.

(3) The impurity concentration in the semiconductor regions for determining the capacity of the depletion layer is controlled by a control means such as a diffusion, ion implantation, etc. However, since such means cannot realise a good yield, integration in an IC circuit is practically impossible.

Figure 2 of the accompanying drawings shows the structure of another conventional variable capacitor.

The figure is a circuit diagram illustrating a structural principle in which the reference numerals C1-Cn designate stable capacitor elements, C0 is a stray capacitance, S-Sn are switching elements, 6A and 7A are terminals for sensing the capacity. Incidentally, n is a desired integer.

With this arrangement, when it is granted that n pieces of the switching elements S1 - Sn each can independently be opened and closed and the sum of the capacities of n pieces of stable capacitor elements C1 - Cn is designated by CT (the stray capacitance CO can be selected as desired), CT equals C1 + C2 + Cs + ~~~~~ + Cn. Thus, the circuit as shown in Figure 2 is capable of varying the capacity over a range between CO and CO + CT by appropriately opening or closing the switching elements S1 - Sn.

Generally, the variable capacitor is used in a resonance circuit, tuning circuit, time-delay circuit, etc. There is sometimes no need to continuously vary the capacity. For example, in a tuning circuit for use in a commercial radio receiver, continuous variation of the capacity is not always required, it is sufficient to have a variation over the steps corresponding to the broadcasting channels.

Further, by varying the capacities of the stable capacitor elements C1 - Cn thereby weighting the respective capacities, it is possible to perform a rough control and a fine control of the capacity variation, and thereby decrease the number of stable capacitor elements required to control the total capacity variation over a wide range.

In this case, when using discrete capacitors as the stable capacitor elements C1 - Cn, rigidly selected parts having high precision are required in order to obtain a precise capcity variation. Selecting parts with the desired characteristics is labour intensive so increases production costs. Therefore, the conventional variable capacitor as described above has not been practical, either.

In accordance with the present invention, there is provided a variable capacitor which comprises: a semiconductor substrate; a plurality of variable capacitative elements formed as p-n junctions on the substrate each said element having at least one depletion layer control section and a capacity sensing section; a reverse bias voltage supply source; a reverse bias voltage applying means for selectively applying reverse bias voltage to selected said depletion layer control sections; and said capacity sensing sections being connected to each other so that said elements together form said variable capacitor.

By way of example embodiments of a variable capacitor according to the present invention will now be described with reference to Figure 3 to 7 of the accompanying drawings in which: Figures 3, 5, 6 and 7 show sectional views illustrating embodiments according to the present invention; and Figure 4 shows a characteristic diagram for explaining the present invention.

Figure 3 shows a sectional view illustrating a variable capacitor as an embodiment according to the present invention in which there are formed a plurality of variable capacitative elements 1 OA, 1 OB, 10C .... on a semiconductor substrate 9. There is a depletion layer 8 shown which is largely caused by the depletion layer control sections 16. The variable capacitative elements 1 OA, 1 OB, 10C.... each have a capacity sensing section 13 comprising a P-type region 11 formed on the semiconductor substrate 9 such as an N-type silicon and a metallic electrode 12 provided in the P-type region 11 as well as at least one depletion layer control section 16 comprising a P-type region 14 formed adjacent to the P-type region 11 and a metallic electrode 15 provided in the P-type region 15.The reference numerals 17 and 18 designate terminals for sensing the total capacity of the respectively capacity sensing sections 13 of the variable capacitative elements 1 or, 1 OB, 1 or ....

connected in parallel with each other. VB is a bias voltage, 19 is a bias voltage switching circuit including switching elements S1 - Sn for applying the reverse bias voltage V5 to the depletion layer control sections 16, and 20 is an ohmic electrode provided on the block surface of the semiconductor substrate 9.

The dependence of the capacitance of the variable capacitative element C on the bias voltage V5 is shown in Figure 4. The capacitance C (the ordinate) reaches a maximum value Cmax when the bias voltage VB (the abscissa) applied to the depletion layer control is at or near zero. When the bias voltage V5 reaches a threshold value Vet, the capacitance C decreases rapidly, to reach a minimum value Cumin.

The capacitance C stays at this minimum value Cmin as the magnitude of the bias voltage VB is further increased, and in particular, the capacitance C stays at the minimum value Cmjn when the bias voltage is near the reverse bias voltage Vb. This means that by switching the reverse bias voltage V8 between two values 0 and Vb, the capacitance of any of the variable capacitative elements can be controlled to be one of the maximum value Cmax and the minimum value Cumin.

Therefore, when a plurality of the variable capacitative elements 10A, 10B, 10C.... are provided in the semiconductor substrate 9 as shown in Figure 3, each of the variable capacitative elements 1 OA, 1 OB, 1 OC.... can take either the maximum value Cmax or the minimum value Crnjn according to the bias voltage V5 applied to the depletion layer control sections 16 by means of the switching elements S1 S2 ~~~~~These switches perform a similar operation to the on-off switching actions of the switching elements S1 - Sn in the circuit shown in Figure 2.

Accordingly, the total capacity sensed at the terminals 17 and 18 can be varied to almost the same extent.

The minimum capacity of each variable capacitative element in the variable capacitor according to the embodiment is the sum of its stray capacitance CO and the above described minimum value Cmjn.

The minimum value Cmjn may be decreased by modifying the design of the depletion layer control sections 16 (by forming them thicker, etc.). The maximum value Cmax can be increased by changing the electrode area of the capacity reading section 13 or modifying the form of the PN junction within the semiconductor substrate 9.

Therefore, the difference between the maximum and the minimum capacitance at the capacity sensing terminals 17 and 18 can be made much larger than that of a conventional variable capacitor.

Further, by arranging the maximum values Cmax of the variable capacitative elements to differ from each other by weighting them, the capacity variation over a wide and large range can be precisely controlled. Additionally, by selectively applying 2 values of bias voltage combined as desired to the depletion layer control section 16 by means of switching action of the bias switching circuit 19, the desired capacity variation can also be obtained.

Figure 5 illustrates another embodiment according to the present invention in which the capacity sensing sections 13 have a so-called MIS structure comprising an insulating barrier 21 such as an oxidant barrier formed on the surface of the semiconductor substrate 9 and a metallic electrode 22 provided on the insulating barrier 21.

Figure 6 illustrates a further embodiment according to the present invention in which the capacity sensing sections 13 have a so-called Schottky barrier structure formed by forming a metal-semiconductor barrier between the semiconductor substrate 9 and a desired metallic material 23 adhered on the semiconductor substrate 9.

Although in the above referred embodiments there are disclosed examples in which the capacity sensing sections 13 have PN junction structures, MIS structures or Schottky barrier structures the depletion layer control sections 16 may be also arranged to have any one of those structures.

Figure 7 illustrates a further embodiment according to the present invention in which there are provided insulating regions 24 between respective adjacent ones of the variable capacitative elements 1 OA, 1 OB, 1 OC formed on the semiconductor substrate 9. The insulating regions 24 may be formed with an insulating material such as an oxidant coat, glass, etc. or may be formed in 3 so-called air-insulation structure by providing spaces. By thus providing insulating regions 24 between respective adjacent variable capacitative elements, interference between those adjacent elements can be avoided stabilising the electrical characteristics of the device, that is, it is possible to restrain the 0 factor variation, for example.

In the above described embodiments, the bias switching circuit 19 for applying bias voltage to the depletion layer control sections 16 may be formed within the semiconductor substrate 9 to allow a signal to cause the switching action between two values of bias voltage in desired depletion layer control sections 16.

Further, the semiconductor substrate 9 may be used as a semiconductive IC substrate as it is, thus to minimise the parts and to reduce the production cost.

As described above, the variable capacitor according to the present invention is provided on a semiconductor substrate with variable capacitative elements which can take either of two capacity values i.e. the maximum/minimum values and are controlled to take one of the two values by switching a bias voltage. Thus, the present invention brings the following effects: 1) A large capacity variation is obtained. Thus, when used in a resonance circuit, tuning circuit, etc., it is possible to permit a large variation of the centre frequency, resulting in the design of the circuit being easy.

2) The Q factor of the capacity can be made large by suitably designing specific resistance and electrode's configuration. Further, since the capacity is allowed to vary by the switching action, the Q factor variation due to the capacitor variation is controlled to be small.

3) Since the capacity variation is performed by the switching action and the capacity sensing and the depletion layer control and formed separately, the capacity variation due to the input signal is essentially small and the signal deterioration thereby caused is also small.

4) The capacity can precisely be controlled with out using an impurity control means such as ion implantation which is apt to cause a large inequality of impurity concentration. Further, since inequality of capacities of products can accordingly be made small, the good yield of products can be realised.

5) By adopting a semiconductive IC technique, it is possible to manufacture the capacitors having equality between the capacities of the capacitative elements, thus enabling to minimise capacitors and reduce their production cost.

Claims (5)

1. A variable capacitor which comprises: a semiconductor substrate; a plurality of variable capacitative elements formed as p-n junctions on the substrate each said element having at least one depletion layer control section and a capacity sensing section; a reverse bias voltage supply source; a reverse bias voltage applying means for selectively applying reverse bias voltage to selected said depletion layer control sections; and said capacity sensing sections being connected to each other so that said elements together form said variable capacitor.

2. A variable capacitor as claimed in Claim 1, wherein said reverse bias voltage applying means comprises a plurality of switching elements connected between respective said depletion layer control sections and said reverse bias voltage supply source, so that one of two values of bias voltage is selectively applied to each of said depletion layer control sections.

3. A variable capacitor as claimed in Claim 1 or Claim 2 further comprising insulating regions provided between respective adjacent ones of said variable capacitative elements.

4. A variable capacitor as claimed in Claim 1, wherein said capacity sensing section comprises a first P-type region of said semiconductor substrate and a first metallic electrode provided on said first P-type region while said depletion layer control section comprises at least one second P-type region formed adjacent to said first P-type region of said substrate and a second metallic electrode provided on said second P-type region.

5. A variable capacitor substantially as herein be fore described with reference to and as illustrated in Figures 3 to 7 of the accompanying drawings.