[go: up one dir, main page]

GB1566072A - Semiconductor device - Google Patents

Semiconductor device Download PDF

Info

Publication number
GB1566072A
GB1566072A GB12962/77A GB1296277A GB1566072A GB 1566072 A GB1566072 A GB 1566072A GB 12962/77 A GB12962/77 A GB 12962/77A GB 1296277 A GB1296277 A GB 1296277A GB 1566072 A GB1566072 A GB 1566072A
Authority
GB
United Kingdom
Prior art keywords
semiconductor device
silicon carbide
film
carbide film
impurity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB12962/77A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to GB12962/77A priority Critical patent/GB1566072A/en
Priority claimed from FR7709185A external-priority patent/FR2386139A1/en
Publication of GB1566072A publication Critical patent/GB1566072A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02167—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/3115—Doping the insulating layers
    • H01L21/31155—Doping the insulating layers by ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3192—Multilayer coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/82—Heterojunctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/602—Heterojunction gate electrodes for FETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Ceramic Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Description

(54) SEMICONDUCTOR DEVICE (71) We, TOKYO SHIBAURA ELECTRIC COMPANY LIMITED, a Japanese corporation, of 72 Horikawa-cho, Saiwai-ku, Kawasakishi, Japan, do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following state meat: This invention relates to a semiconductor device having a novel insulating film or a protective film.
Generally, a semiconductor device, such as a transistor, diode, integrated circuit etc., includes an insulating film or a protective film formed on a semiconductor substrate and electrodes. A typical conventional semiconductor device is shown in Fig. 1. In Fig. 1 an insulating film 4 and protective film 5 are formed in this order on the surface of a semiconductor substrate except for electrode contact surface portions, said semiconductor substrate including a transistor 1 and resistor 2. The insulating film 4 is usually an oxide such as silicon dioxide and the protective film 5 is a phosphorous-doped silicate glass (hereinafter referred to as P-SG) and alumina. Metal electrodes 6, 6' are formed by an aluminium evaporation step and subsequent photoetching step on the electrode contact surface portion of the substrate and an electrical connection, not shown, is made with respect to the electrode. Usually, the electrodes 6, 6' and electrical connection are covered with another insulating film 4' and protective film 5'. Such films are formed to prevent contamination of the semiconductor substrate by an impurity such as external sodium ions and the consequent deterioration of electrical properties of elements, such as a channel formation, and are called passivation films.
Since, however, the passivation film has a hygroscopic property and polarizing effect, this causes the reliability of the semiconductor device to be disadvantageously lowered. Particularly, a PSG film, a typical passivation film, absorbs moisture to produce phosphoric acid, causing metal connections and metal electrodes to be corroded and in the worst case to be broken.
Furthermore, the conventional passivation film causes, due to its polarizing effect, degradation of collector-emitter breakdown voltage VCED and collector-base breakdown voltage VCBO and a greater noise variation.
Since a conventional planar type semiconductor device is manufactured by the repeated steps of diffusing an impurity through an opened insulating film and effecting a coating operation with another insulating film, some insulating films are subjected to several heat treatments. Such insulating films are contaminated with an alkaline metal impurity, such as sodium ions etc., emitted from a soaking pit during heat treatment and a channel is liable to occur at the base region and collector region. On the other hand, a method for improving the noise characteristic etc. of a semiconductor device by improving the structure, per se, of the semiconductor substrate is disclosed in U.S. Patent Nos.
3,812,519; 3,834,953; 3,858,238 and 3,879,230 to Yonezawa et al. This method is called a perfect crystal device technology (hereinafter referred to as a PCT method) and characterized by forming a first high concentration diffusion region having a first impurity, for example boron, including at least one material exclusive of arsenic and a second diffusion region, having a smaller amount of arsenic, for example 3 to 24 atomic %, and a second impurity including at least one material, for example phosphorous, exclusive of arsenic so as to reduce lattice defects in said first diffusion region. Since, however, the PCT method is directed to an improvement of a semiconductor substrate per se, it is impossible to remove the abovementioned drawbacks resulting from the conventional insulating film and protective film.
It is therefore desired to develop an improved insulating film or a protective film which permits a lower noise semiconductor device.
One object of this invention is to provide a semiconductor device having an insulating film and/ or a protective film which are/is improved in resistance to moisture and free of any polarizing effect.
Another object of this invention is to provide a semiconductor device having a film which functions not only as an insulating film but also as a protective film having a blocking effect against a contaminating impurity.
According to the present invention there is provided a semiconductor device comprising a semiconductor substrate provided with doped regions in a surface thereof and a silicon carbide film formed directly on said surface, the silicon carbide film directly overlying substantially all of said doped regions so as to leave no doped region in said surface not overlaid by said film.
In a preferred embodiment of this invention there is provided a semiconductor device including a silicon carbide film or a silicon doxide film formed on electrodes and electrical connections which are formed on a silicon carbide film in direct contact with a semiconductor substrate.
The present invention will now be described by way of example only and with reference to the accompanying drawings, in which: Fig. 1 is a cross-sectional view schematically showing a conventional semiconductor device; Figs. 2 to 5 are cross-sectional views schematically showing a process for manufacturing a semiconductor device according to one embodiment of this invention; Fig. 6 is a cross-sectional view diagrammatically showing a semiconductor device according to another embodiment of this invention; Fig. 7 is a graph showing the relationship of yield under breakdown voltage to the time for which a device of the present invention and a conventional device are immersed in boiling water; Fig. 8 is a graph showing a comparison of current amplification factor between a device of the present invention and the conventional device; Fig. 9 is a graph showing a comparison of noise figure between a device of the present invention and the conventional device; and Fig. 10 is a graph showing a comparison of surface charge between a device of the present invention and the conventional device.
silicon carbide film formed in direct contact with the surface of a semiconductor substrate has an electrical resistance sufficient to act as an insulator. The silicon carbide film may be formed by a conventional means such as a CVD method (chemical vapor deposition method) utilizing a reaction of silicon tetrahydride (SiH) and toluene (C7H8), evaporation method, sputtering method etc. Since silicon carbide shows an increase in electrical resistance with an increase in purity, it is preferred that the silicon carbide film have a high purity. However, a silicon carbide film containing hydrogen, oxygen, nitrogen, helium, argon or chlorine may be employed because these elements do not lower the electrical resistance of silicon carbide. The concentration of these elements in the silicon carbide film should be restricted to an extent to which the crystalline structure of the silicon carbide remains essentially unchanged. To explain more in detail, the concentration is preferably in a range of below 10 atom! cm3 and more preferably below 1021 atom/cm3.
As an element (hereinafter referred to an impurity) for reducing, as required, the electrical resistance of silicon carbide exclusive of the above-mentioned elements, silicon carbide having singly or in combination below 5% of Pb, W, Ta, Ga, Ba, Mo, Sr, Zn, Cu, Ni, Co, Fe, Cr, Ti, Ca, K, P, Al, Mg, Na, free C, and B as measured in terms of the number of atoms may be used. The impurity concentration in the silicon carbide film is preferably below 0.5% and more preferably below 0.2%. It is needless to say that a pure silicon carbide film having little or no impurity is most preferable.
The structure of the semiconductor substrate is not critical and, therefore, the SiC film may be used to cover discrete devices and ICs and also to cover planarand mesa-type transistors as well as bipolar and MOS transistors. The use of an SiC film on a semiconductor substrate as obtained by the above-mentioned PCT method is also possible.
A semiconductor device according to one embodiment of this invention will be described by referring to Figs. 2 to 5.
A transistor 21 and resistor 22 are formed by a usual method in a semiconductor substrate 23 and an SiO2 film formed on the surface of the semiconductor substrate 23 is completely removed as shown in Fig. 2. A first silicon carbide film 24 is wholly formed in direct contact with the surface of the semiconductor sub strate 23. The silicon carbide film 24 is formed on the surface of the substrate by a CVD method utilizing SiH4 and C7H8, evaporation method, sputtering method etc. and has a thickness of 50 to 5y and preferably 1000 to l,a. A pattern of photo resist 26 is formed on the silicon carbide film 24 and contact holes 25a, 25b, 25c, 25d and 25e are formed by plasma etching using CF4 or COIF4 + 02, as shown in Fig.
4. After the photoresist 26 is removed, aluminium is evaporated on the surface of the resultant semiconductor structure and a photoetching is effected by a usual method on the Al-evaporated surface to provide electrodes 27a, 27b, 27c, 27d and 27e and an electrical connection not shown.
Then, a second silicon carbide film 28 is formed on the surface of the resultant structure as shown in Fig. 5.
Instead of a silicon carbide film having a high purity, use may be made of a silicon carbide film including at least one element selected from the group consisting of hydrogen, oxygen, nitrogen, helium, argon and chlorine. Such a silicon carbide film including the element or elements is formed by introducing the element or elements into the preformed SiC film by, for example, an ion implantation or CVI) method.
Considering diffusion regions within the semiconductor substrate, there are cases where the temperature of the manufacturing steps of a semiconductor device are controlled to below 1000"C so as to suppress an increase in current amplification factor and prevent a decrease in VCED as well as an appreciable decrease in VCBO.
There is a probability that the silicon carbide film may become amorphus under this condition. However, the silicon carbide film, whether in the amorphus or crystalline state, can serve adequately as an insulating film or a passivation film and falls within the scope of this invention.
Although in the above-mentioned embodiment the second silicon carbide film is formed on the silicon carbide film formed in direct contact with the surface of the semiconductor substrate, a silicon dioxide film may be used instead of the second silicon carbide film. The silicon dioxide film, though usually formed in the usual method, can be formed by heat treating the preformed silicon carbide film in an oxidizing atmosphere or introducing oxygen in high concentration into the preformed silicon carbide film by an ion implantation method. In such a semiconductor device the silicon carbide film has an ad vantage of compensating for the stress of the silicon dioxide film. ' protective film or passivation film may be formed, as required, on the silicon carbide film formed in direct contact with the surface of the semiconductor substrate. As neces sary, a silicon carbide flim or SiO3 film may be formed on the surface of said silicon carbide film for insulation purposes.
As a known passivation film use may be made of P.As-SG, P.B-SG, P.Sb-SG, Si3N4, silicate glass or Awl203. A film formed of an oxide made of at least one element selected from the group consisting of P, Al, Pb, B, Ti, Ga, Sn, Zn, Zr, Sr, Cr, Mo.
W, Ni, Fe, Co and Ta has been known as a protective film or an insulating film. A pure silicon carbide film or a silicon carbide film including at least one element selected from the group consisting of hydrogen, oxygen, nitrogen, helium, argon and chlorine preferably in a range of 50A to 5,u in thickness may be used and it may, as required, be formed as a protective film or an insulating film on the silicon carbide film formed in direct contact with the surface of the semiconductor substrate.
It has been found that a silicon carbide film including at least one impurity selected from the group consisting of P, Al, Pb, B, Ti, Ga, Zn, Zr, Sr, Cr, Mo, W, Ni, Fe, Co and Ta can be used as a protective film or a passivation film. The concentration of an impurity is preferably in a range of lOl3 to 1033 atom/cm3.
z g sxa ul. UMOQS luaurypoqura q uI pure silicon carbide film 34 is formed in direct contact with the surface of the semiconductor substrate 33. A PSG film 35, a silicon carbide film 36 including an impurity, and a SiO3 film 37 are formed in this order on the surface of the silicon carbide film 34. However, there need be no limitation on the construction of a protective film or an insulating film which is formed on the silicon carbide film formed in direct contact with the surface of the semiconductor substrate.
It is to be noted that the silicon carbide film formed in direct contact with the surface of the semiconductor substrate serves singly as an insulating film or a passivation film. For this reason, the semiconductor device having only the silicon carbide film formed on the surface of the semiconductor substrate constitutes the simplest embodiment.
A semiconductor device using such silicon carbide film in place of a gate SiO2 film of a conventional MOS transistor is another embodiment of this invention.
Since such a silicon carbide gate insulating film has an improved passivation effect and a good impurity blocking effect, the threshold voltage can be maintained at a low level. In consequence, a MOS tran sistor having a silicon carbide gate insulated film requires less power dissipation than a conventional counterpart.
The silicon carbide film has good resistance to heat and moisture and less polarization effect, providing a semiconductor device with improved reliability and involving no deterioration of VcEn, VCBO etc. Furthermore, there is no SiO film contaminated, under heat treatment etc., with an impurity such as sodium ions, and the silicon carbide film prevents substrate contamination by an impurity, prominently improving the properties, in particular, noise property, of the semiconductor device.
carbide film formed in direct contact with A semiconductor device having a silicon the surface of a semiconductor substrate fabricated by a PCT method provides very much improved element characteristics such as noise characteristics.
Figs. 7 to 9 show a comparison of properties between the conventional semiconductor device having an arrangement shown in Fig. 1 and an embodiment of the present invention which is fabricated as shown in Fig. 5.
That is, Fig. 7 shows a yield (%) under breakdown voltage which is observed between the semiconductor device plotted as the symbol "0" and the conventional semi conductor device plotted as the symbol "X". As will be seen from Fig. 7 the semiconductor device being an embodiment of the present invention, even after immersion in boiling water for four hours, shows a substantially 100% yield, i.e., a more than about 10% improvement over the conventional semiconductor device. The term "the yield under breakdown voltage" is intended to mean a percentage of all the samples tested under the conditions that the sample, after immersion in boiling water for a predetermined time period, shows a surface leakage current of 0. 1uA with VCBO at 100V.
As will be apparent from Fig. 8 in which an emitter-grounded current amplification factor hFE is shown the semiconductor device being an embodiment of the present invention revealed, due to good passivation effect and blocking effect of the SiC film, no appreciable recombination current at the substrate surface and no appreciable decrease of hF3 even at low currents. A relative difference in h, between two transistors formed in a single chip i.e. a pair characteristic, was about 1%.
Fig. 9 shows a noise figure as measured with I,:=100yA, V,=3V and Rg=lkQ.
As will be apparent from Fig. 9, the semiconductor device of this invention showed a noise figure of about 2dB at a frequency of 10Hz i.e. one half the value of the conventional counterpart.
The semiconductor device having a silicon carbide film formed in direct contact with the substrate surface, even if arranged in a manner different from that of Fig.
5, showed substantially the same results as mentioned above, in respect of yield under breakdown voltage, current amplification factor, noise figure etc. Since a semiconductor device of this invention, which has a semiconductor substrate formed by the above-mentioned PCT method, has undergone stress compensation in the substrate, it yielded somewhat more desirable results than the above-mentioned embodiments in respect of the above-mentioned characteristics.
There were prepared Sample I (prior art) having an SiO2 film formed on the surface of an Si substrate formed by the PCT method, Sample II (prior art) having an Si3N4 film formed on the sio2 film shown in Sample I, and Sample III (this invention) having an SiC film formed on the surface of an Si substrate formed by the PCT method. The amount of surface charge, NFB, per unit area was measured for each Sample, the results of which are shown in Fig. 10. That is, a reverse bias was applied between the electrodes of each device without a BT treatment as will be described later and an extension of a depletion layer was measured (Symbol No.
BT). After +BT and - BT treatments, the number of mobile ions present was measured as indicated by symbols + BT and - BT. The "BT treatment" as defined here is intended to means that a positive or negative field of 106V/cm is applied while the semiconductor device is held at 300"C for 10 minutes. The N33 permits overall evaluation of a mobile charge, surface state density etc. and overall judgment of the passivation effect and blocking effect of the insulating film and! our protective film formed on the semiconductor device. As will be apparent from Fig. 10 the semiconductor device of this invention is much improved over the conventional counterpart.
WHAT WE CLAIM IS:- 1. A semiconductor device comprising a semiconductor substrate provided with doped regions in a surface thereof and a silicon carbide film formed directly on said surface, the silicon carbide film directly overlying substantially all of the said doped regions so as to leave no doped region in said surface not overlaid by said film.
2. A semiconductor device as claimed in claim 1, in which said silicon carbide film has an impurity concentration of below 5% measured in terms of the number of atoms, said impurity reducing the electrical resistance of the silicon carbide film.
3. A semiconductor device as claimed
**WARNING** end of DESC field may overlap start of CLMS **.

Claims (28)

**WARNING** start of CLMS field may overlap end of DESC **. than a conventional counterpart. The silicon carbide film has good resistance to heat and moisture and less polarization effect, providing a semiconductor device with improved reliability and involving no deterioration of VcEn, VCBO etc. Furthermore, there is no SiO film contaminated, under heat treatment etc., with an impurity such as sodium ions, and the silicon carbide film prevents substrate contamination by an impurity, prominently improving the properties, in particular, noise property, of the semiconductor device. carbide film formed in direct contact with A semiconductor device having a silicon the surface of a semiconductor substrate fabricated by a PCT method provides very much improved element characteristics such as noise characteristics. Figs. 7 to 9 show a comparison of properties between the conventional semiconductor device having an arrangement shown in Fig. 1 and an embodiment of the present invention which is fabricated as shown in Fig. 5. That is, Fig. 7 shows a yield (%) under breakdown voltage which is observed between the semiconductor device plotted as the symbol "0" and the conventional semi conductor device plotted as the symbol "X". As will be seen from Fig. 7 the semiconductor device being an embodiment of the present invention, even after immersion in boiling water for four hours, shows a substantially 100% yield, i.e., a more than about 10% improvement over the conventional semiconductor device. The term "the yield under breakdown voltage" is intended to mean a percentage of all the samples tested under the conditions that the sample, after immersion in boiling water for a predetermined time period, shows a surface leakage current of 0. 1uA with VCBO at 100V. As will be apparent from Fig. 8 in which an emitter-grounded current amplification factor hFE is shown the semiconductor device being an embodiment of the present invention revealed, due to good passivation effect and blocking effect of the SiC film, no appreciable recombination current at the substrate surface and no appreciable decrease of hF3 even at low currents. A relative difference in h, between two transistors formed in a single chip i.e. a pair characteristic, was about 1%. Fig. 9 shows a noise figure as measured with I,:=100yA, V,=3V and Rg=lkQ. As will be apparent from Fig. 9, the semiconductor device of this invention showed a noise figure of about 2dB at a frequency of 10Hz i.e. one half the value of the conventional counterpart. The semiconductor device having a silicon carbide film formed in direct contact with the substrate surface, even if arranged in a manner different from that of Fig. 5, showed substantially the same results as mentioned above, in respect of yield under breakdown voltage, current amplification factor, noise figure etc. Since a semiconductor device of this invention, which has a semiconductor substrate formed by the above-mentioned PCT method, has undergone stress compensation in the substrate, it yielded somewhat more desirable results than the above-mentioned embodiments in respect of the above-mentioned characteristics. There were prepared Sample I (prior art) having an SiO2 film formed on the surface of an Si substrate formed by the PCT method, Sample II (prior art) having an Si3N4 film formed on the sio2 film shown in Sample I, and Sample III (this invention) having an SiC film formed on the surface of an Si substrate formed by the PCT method. The amount of surface charge, NFB, per unit area was measured for each Sample, the results of which are shown in Fig. 10. That is, a reverse bias was applied between the electrodes of each device without a BT treatment as will be described later and an extension of a depletion layer was measured (Symbol No. BT). After +BT and - BT treatments, the number of mobile ions present was measured as indicated by symbols + BT and - BT. The "BT treatment" as defined here is intended to means that a positive or negative field of 106V/cm is applied while the semiconductor device is held at 300"C for 10 minutes. The N33 permits overall evaluation of a mobile charge, surface state density etc. and overall judgment of the passivation effect and blocking effect of the insulating film and! our protective film formed on the semiconductor device. As will be apparent from Fig. 10 the semiconductor device of this invention is much improved over the conventional counterpart. WHAT WE CLAIM IS:-
1. A semiconductor device comprising a semiconductor substrate provided with doped regions in a surface thereof and a silicon carbide film formed directly on said surface, the silicon carbide film directly overlying substantially all of the said doped regions so as to leave no doped region in said surface not overlaid by said film.
2. A semiconductor device as claimed in claim 1, in which said silicon carbide film has an impurity concentration of below 5% measured in terms of the number of atoms, said impurity reducing the electrical resistance of the silicon carbide film.
3. A semiconductor device as claimed
in claim 2, in which said impurity is at least one element selected from the group consisting of Pb, W, Ta, Ga, Ba, Mo, Sr, Zn, Cu, Ni, Co, Fe, Cr, Ti, Ca, K, P, Al, Mg, Na, free C and B.
4. A semiconductor device as claimed in claim 2, in which said impurity concentration is below 0.5%.
5. A semiconductor device as claimed in claim 2, in which said impurity concentration is below 0.2%.
6. A semiconductor device as claimed in claim 1, in which said silicon carbide film includes no impurity.
7. A semiconductor device as claimed in claim 1, in which said silicon carbide film includes at least one element selected from the group consisting of hydrogen, oxygen, nitrogen, helium, argon and chlorine.
8. A semiconductor device as claimed in claim 7, in which the concentration of the above-mentioned element in said silicon carbide film is below 10 atom/cm3.
9. A semiconductor device as claimed in claim 8, in which the concentration of the above-mentioned element in said silicon carbide film is below 1021 atom/cm3.
10. A semiconductor device as claimed in claim 1, in which said silicon carbide film has a thickness of 50A to 5,a.
11. A semiconductor device as claimed in claim 10, in which said silicon carbide film has a thickness of 1000R to l,a.
12. A semiconductor device as claimed in claim 1, in which said silicon carbide film is formed of a crystalline silicon carbide.
13. A semiconductor device as claimed in claim 1, in which said silicon carbide film is formed of an amorphus silicon carbide.
14. A semiconductor device as claimed in claim 1, in which at least one further film of insulating material is formed on said silicon carbide film.
15. A semiconductor device as claimed in claim 1, further including a second silicon carbide film formed in direct contact with said silicon carbide film.
16. A semiconductor device as claimed in claim 1, further including a silicon dioxide film formed in direct contact with said silicon carbide film.
17. A semiconductor device as claimed in claim 14, in which said further film comprises at least one material selected from the group consisting of P-SG, P.As-SG, P.SbSG, Si3N, and Al3O3.
18. A semiconductor device as claimed in claim 14, in which said further film comprises a silicon carbide film including at least one impurity selected from the group consisting of P, Al, Pb, B, Ti, Ga, Zn, Zr, Sr, Cr, Mo, W, Ni, Fe, Co and Ta.
19. A semiconductor device as claimed in claim 14, in which said further film comprises a silicon carbide film including at least one element selected from the group consisting of hydrogen, oxygen, nitrogen, helium, argon and chlorine.
20. A semiconductor device as claimed in claim 14, in which said further film comprises a high purity silicon carbide.
21. A semiconductor device as claimed in claim 14, in which said further film comprises an oxide film including at least one element selected from the group consisting of P, Al, Pb, B, Ti, Ga, Zn, Zr, Sr, Cr, Mo, W, Ni, Fe, Co and Ta.
22. A semiconductor device as claimed in claim 19, in which said further silicon carbide film has a thickness of 50A to 5y.
23. A semiconductor device as claimed in claim 20, in which said further film has a thickness of 50A to 5,a.
24. A semiconductor device as claimed in claim 18, in which said further silicon carbide film has an impurity concentration of 1019 to 1022 atom/cm3.
25. A semiconductor device as claimed in claim 1, in which said silicon carbide film is a gate insulation film of a MOS transistor.
26. A semiconductor device as claimed in claim 1, comprising a PSG film formed on the said silicon carbide film and a second silicon carbide film formed on the PSG film.
27. A semiconductor device as claimed in claim 1 or 26, in wliich the semiconductor device is provided with electrodes and in which another silicon carbide film covering all of the electrodes is provided.
28. A semiconductor device substantially as hereinbefore described with reference to Figures 5 and 6 of the accompanying drawings.
GB12962/77A 1977-03-28 1977-03-28 Semiconductor device Expired GB1566072A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB12962/77A GB1566072A (en) 1977-03-28 1977-03-28 Semiconductor device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB12962/77A GB1566072A (en) 1977-03-28 1977-03-28 Semiconductor device
FR7709185A FR2386139A1 (en) 1977-03-28 1977-03-28 SEMICONDUCTOR DEVICE INCLUDING A PROTECTIVE SILICON CARBIDE LAYER

Publications (1)

Publication Number Publication Date
GB1566072A true GB1566072A (en) 1980-04-30

Family

ID=32044429

Family Applications (1)

Application Number Title Priority Date Filing Date
GB12962/77A Expired GB1566072A (en) 1977-03-28 1977-03-28 Semiconductor device

Country Status (1)

Country Link
GB (1) GB1566072A (en)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2132817A (en) * 1982-12-24 1984-07-11 Tokyo Shibaura Electric Co Semiconductor device and process of producing the same
EP0137319A2 (en) * 1983-09-26 1985-04-17 Kabushiki Kaisha Toshiba Semiconductor device and a method of manufacturing the same
EP0137512A2 (en) * 1983-10-13 1985-04-17 Kanegafuchi Kagaku Kogyo Kabushiki Kaisha Solar cell
US4735920A (en) * 1986-02-06 1988-04-05 Siemens Aktiengesellschaft Method for structuring silicon carbide
EP0291951A2 (en) * 1987-05-22 1988-11-23 Fujitsu Limited A semiconductor field effect transistor using single crystalline silicon carbide as a gate insulating layer
EP0304929A2 (en) * 1987-08-26 1989-03-01 Kabushiki Kaisha Toshiba Semiconductor device having an electrode covered with a protective film
EP0308814A2 (en) * 1987-09-21 1989-03-29 National Semiconductor Corporation Modification of interfacial fields between dielectrics and semiconductors
FR2625839A1 (en) * 1988-01-13 1989-07-13 Sgs Thomson Microelectronics METHOD OF PASSIVATING AN INTEGRATED CIRCUIT
EP0348640A2 (en) * 1988-05-10 1990-01-03 Kabushiki Kaisha Toshiba Semiconductor device including a protective film
EP0400178A1 (en) * 1989-05-31 1990-12-05 Siemens Aktiengesellschaft Semiconductor device with a passivation layer
EP1186685A2 (en) * 2000-09-08 2002-03-13 Applied Materials, Inc. Method for forming silicon carbide films
CN116364758A (en) * 2023-03-30 2023-06-30 苏州龙驰半导体科技有限公司 SiC MOS device
DE102023101334A1 (en) * 2023-01-19 2024-07-25 Infineon Technologies Ag SEMICONDUCTOR COMPONENT WITH A PASSIVATION LAYER

Cited By (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2132817A (en) * 1982-12-24 1984-07-11 Tokyo Shibaura Electric Co Semiconductor device and process of producing the same
US4647472A (en) * 1982-12-24 1987-03-03 Tokyo Shibaura Denki Kabushiki Kaisha Process of producing a semiconductor device
EP0137319A2 (en) * 1983-09-26 1985-04-17 Kabushiki Kaisha Toshiba Semiconductor device and a method of manufacturing the same
EP0137319A3 (en) * 1983-09-26 1985-08-14 Kabushiki Kaisha Toshiba Semiconductor device and a method of manufacturing the same
US4585489A (en) * 1983-09-26 1986-04-29 Kabushiki Kaisha Toshiba Method of controlling lifetime of minority carriers by electron beam irradiation through semi-insulating layer
EP0137512A2 (en) * 1983-10-13 1985-04-17 Kanegafuchi Kagaku Kogyo Kabushiki Kaisha Solar cell
EP0137512A3 (en) * 1983-10-13 1987-08-19 Kanegafuchi Kagaku Kogyo Kabushiki Kaisha Electric insulation thin layer
US4735920A (en) * 1986-02-06 1988-04-05 Siemens Aktiengesellschaft Method for structuring silicon carbide
EP0291951A3 (en) * 1987-05-22 1991-01-30 Fujitsu Limited A semiconductor field effect transistor using single crystalline silicon carbide as a gate insulating layer
EP0291951A2 (en) * 1987-05-22 1988-11-23 Fujitsu Limited A semiconductor field effect transistor using single crystalline silicon carbide as a gate insulating layer
EP0304929A3 (en) * 1987-08-26 1989-08-30 Kabushiki Kaisha Toshiba Semiconductor device having an electrode covered with a protective film
EP0304929A2 (en) * 1987-08-26 1989-03-01 Kabushiki Kaisha Toshiba Semiconductor device having an electrode covered with a protective film
US5029324A (en) * 1987-08-26 1991-07-02 Kabushiki Kaisha Toshiba Semiconductor device having a semiconductive protection layer
US6117749A (en) * 1987-09-21 2000-09-12 National Semiconductor Corporation Modification of interfacial fields between dielectrics and semiconductors
EP0308814A2 (en) * 1987-09-21 1989-03-29 National Semiconductor Corporation Modification of interfacial fields between dielectrics and semiconductors
EP0308814A3 (en) * 1987-09-21 1989-04-26 National Semiconductor Corporation Modification of interfacial fields between dielectrics amodification of interfacial fields between dielectrics and semiconductors nd semiconductors
FR2625839A1 (en) * 1988-01-13 1989-07-13 Sgs Thomson Microelectronics METHOD OF PASSIVATING AN INTEGRATED CIRCUIT
EP0327412A1 (en) * 1988-01-13 1989-08-09 STMicroelectronics S.A. Passivation process of a integrated circuit
EP0348640A2 (en) * 1988-05-10 1990-01-03 Kabushiki Kaisha Toshiba Semiconductor device including a protective film
EP0348640A3 (en) * 1988-05-10 1990-06-13 Kabushiki Kaisha Toshiba Semiconductor device including a protective film
EP0400178A1 (en) * 1989-05-31 1990-12-05 Siemens Aktiengesellschaft Semiconductor device with a passivation layer
EP1186685A2 (en) * 2000-09-08 2002-03-13 Applied Materials, Inc. Method for forming silicon carbide films
EP1186685A3 (en) * 2000-09-08 2004-11-17 Applied Materials, Inc. Method for forming silicon carbide films
DE102023101334A1 (en) * 2023-01-19 2024-07-25 Infineon Technologies Ag SEMICONDUCTOR COMPONENT WITH A PASSIVATION LAYER
CN116364758A (en) * 2023-03-30 2023-06-30 苏州龙驰半导体科技有限公司 SiC MOS device
CN116364758B (en) * 2023-03-30 2023-11-14 苏州龙驰半导体科技有限公司 SiC MOS devices

Similar Documents

Publication Publication Date Title
US4161743A (en) Semiconductor device with silicon carbide-glass-silicon carbide passivating overcoat
US4053335A (en) Method of gettering using backside polycrystalline silicon
JP3559971B2 (en) Silicon carbide semiconductor device and method of manufacturing the same
JPS6245712B2 (en)
JPH02102557A (en) Manufacturing method of semiconductor device
US3696276A (en) Insulated gate field-effect device and method of fabrication
US5015593A (en) Method of manufacturing semiconductor device
US4063275A (en) Semiconductor device with two passivating layers
GB1566072A (en) Semiconductor device
US5071789A (en) Method for forming a metal electrical connector to a surface of a semiconductor device adjacent a sidewall of insulation material with metal creep-up extending up that sidewall, and related device
JPH0357613B2 (en)
KR960000177B1 (en) Semiconductor apparatus and manufacturing method thereof
US3883889A (en) Silicon-oxygen-nitrogen layers for semiconductor devices
US3550256A (en) Control of surface inversion of p- and n-type silicon using dense dielectrics
US4224636A (en) Semiconductor device with thermally compensating SiO2 -silicate glass-SiC passivation layer
US4695479A (en) MOSFET semiconductor device and manufacturing method thereof
Choi et al. Degradation of ultrathin oxides by iron contamination
JPH05243575A (en) Thin film transistor and manufacture thereof
CA1204222A (en) Semiconductor device
JP3156246B2 (en) Field effect type semiconductor device and manufacturing method
JPH0232545A (en) Manufacture of semiconductor device
JPH11168210A (en) Manufacture of semiconductor device
JPS6263475A (en) semiconductor equipment
JP2540724B2 (en) Method for manufacturing semiconductor device
JPH0644573B2 (en) Silicon semiconductor device manufacturing method

Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
746 Register noted 'licences of right' (sect. 46/1977)
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19950328