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GB1265199A - - Google Patents

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Publication number
GB1265199A
GB1265199A GB1265199DA GB1265199A GB 1265199 A GB1265199 A GB 1265199A GB 1265199D A GB1265199D A GB 1265199DA GB 1265199 A GB1265199 A GB 1265199A
Authority
GB
United Kingdom
Prior art keywords
layer
sio
etchant
deposited
semi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of GB1265199A publication Critical patent/GB1265199A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes)
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes) consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)
  • ing And Chemical Polishing (AREA)
  • Weting (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

1,265,199. Semi-conductor devices. INTERNATIONAL BUSINESS MACHINES CORP. 22 Sept., 1969 [7 Oct., 1968], No. 46504/69. Heading H1K. [Also in Division B6] In the manufacture of a semi-conductor device such as the Si transistor shown, a masking layer 18, e.g. of Si 3 N 4 , is selectively etched by a first etchant, e.g. ammonium hypophosphate, to provide an opening through which a dopant such as P or As is diffused to form a region 24. During this diffusion, which may take place from the vapour phase in an oxidizing atmosphere, a film 26 of SiO 2 forms in the opening, and this is subsequently removed by an etchant which attacks the film 26 but not the masking layer 18. A buffered solution of hydrofluoric acid and ammonium fluoride is suitable for this purpose. In the embodiment a layer 16 of SiO 2 is initially formed on the Si body 10 by oxidation or pyrolytic deposition, and an additional etching step using the buffered solution is required to expose the Si surface. The Si 3 N 4 layer 18 is deposited from the vapour phase. Part of the base region 12 is also exposed and Al electrodes are deposited and etched to shape. Alternatively platinum silicide, palladium silicide or Mo may be employed. Multi-layer electrodes including Cr-Ag-Cr or Ti-Ag-Cr structures may also be used, in which case a further sputtered layer of SiO 2 may be provided to mutually insulate the different electrode levels.
GB1265199D 1968-10-07 1969-09-22 Expired GB1265199A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US76557468A 1968-10-07 1968-10-07

Publications (1)

Publication Number Publication Date
GB1265199A true GB1265199A (en) 1972-03-01

Family

ID=25073903

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1265199D Expired GB1265199A (en) 1968-10-07 1969-09-22

Country Status (4)

Country Link
JP (1) JPS4829187B1 (en)
DE (1) DE1948923C3 (en)
FR (1) FR2020020B1 (en)
GB (1) GB1265199A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2020531C2 (en) * 1970-04-27 1982-10-21 Siemens AG, 1000 Berlin und 8000 München Process for the production of silicon ultra-high frequency planar transistors

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3479237A (en) * 1966-04-08 1969-11-18 Bell Telephone Labor Inc Etch masks on semiconductor surfaces

Also Published As

Publication number Publication date
JPS4829187B1 (en) 1973-09-07
FR2020020B1 (en) 1974-09-20
DE1948923A1 (en) 1970-04-16
DE1948923C3 (en) 1980-10-30
DE1948923B2 (en) 1977-04-14
FR2020020A1 (en) 1970-07-10

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee