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GB1058250A - Improvements in and relating to the manufacture of semiconductor devices - Google Patents

Improvements in and relating to the manufacture of semiconductor devices

Info

Publication number
GB1058250A
GB1058250A GB48473/63A GB4847363A GB1058250A GB 1058250 A GB1058250 A GB 1058250A GB 48473/63 A GB48473/63 A GB 48473/63A GB 4847363 A GB4847363 A GB 4847363A GB 1058250 A GB1058250 A GB 1058250A
Authority
GB
United Kingdom
Prior art keywords
germanium
silicon
layer
eutectic
gold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB48473/63A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Maxar Space LLC
Original Assignee
Philco Ford Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philco Ford Corp filed Critical Philco Ford Corp
Publication of GB1058250A publication Critical patent/GB1058250A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026—Bonding areas specifically adapted for layer connectors
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
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    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
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    • H01L2224/832—Applying energy for connecting
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    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
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    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Die Bonding (AREA)

Abstract

1,058,250. Semi-conductor devices. PHILCO CORPORATION. Dec. 9, 1963 [Dec. 7, 1962], No. 48473/63. Heading H1K. A method of making connection to a body of silicon comprises coating a surface of the body with germanium, coating a surface of the connecting part with a metal capable of forming a eutectic solution with germanium in which silicon is soluble, placing the coated surfaces in contact and heating above the eutectic temperature. A wafer of silicon has a plurality of transistors formed in it by the planar technique. The lower face of the wafer is then lapped or etched to the desired thickness and a layer of germanium evaporated on to this face. The wafer is then divided into individual transistors 10 each comprising a silicon collector region 22, diffused base and emitter regions 14, 16, conductive contacts 18, silicon oxide layer 20 and germanium layer 24. A contact member 12, for example of " Kovar " (Registered Trade Mark), has a layer 28 of gold electrolytically plated on to its surface. The transistor 10 and the member 12 are placed in contact and heated above the eutectic temperature of the goldgermanium eutectic by passing a current through member 12. Jets of nitrogen are played on to the device during bonding to prevent the formation of oxides. The temperature of bonding is kept below the individual melting points of gold and germanium and, if necessary, below the melting point of the gold-silicon eutectic which may form part of the other contacts of the' transistor. The germanium may be intrinsic or doped, for example, with antimony for an N-type substrate or aluminium for a P-type substrate. The impurity may be deposited as a thin film on top of the germanium layer. The layer 28 may also be formed by vapour deposition and may comprise lead instead of gold.
GB48473/63A 1962-12-07 1963-12-09 Improvements in and relating to the manufacture of semiconductor devices Expired GB1058250A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US243013A US3200490A (en) 1962-12-07 1962-12-07 Method of forming ohmic bonds to a germanium-coated silicon body with eutectic alloyforming materials

Publications (1)

Publication Number Publication Date
GB1058250A true GB1058250A (en) 1967-02-08

Family

ID=22917006

Family Applications (1)

Application Number Title Priority Date Filing Date
GB48473/63A Expired GB1058250A (en) 1962-12-07 1963-12-09 Improvements in and relating to the manufacture of semiconductor devices

Country Status (3)

Country Link
US (1) US3200490A (en)
DE (1) DE1464357B1 (en)
GB (1) GB1058250A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1764023A1 (en) * 1967-03-22 1972-03-30 Rca Corp Semiconductor component with improved breakdown voltage

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US3361592A (en) * 1964-03-16 1968-01-02 Hughes Aircraft Co Semiconductor device manufacture
US3292241A (en) * 1964-05-20 1966-12-20 Motorola Inc Method for connecting semiconductor devices
US3411051A (en) * 1964-12-29 1968-11-12 Texas Instruments Inc Transistor with an isolated region having a p-n junction extending from the isolation wall to a surface
US3571915A (en) * 1967-02-17 1971-03-23 Clevite Corp Method of making an integrated solar cell array
US3492719A (en) * 1967-03-10 1970-02-03 Westinghouse Electric Corp Evaporated metal contacts for the fabrication of silicon carbide devices
US3577631A (en) * 1967-05-16 1971-05-04 Texas Instruments Inc Process for fabricating infrared detector arrays and resulting article of manufacture
US3665589A (en) * 1969-10-23 1972-05-30 Nasa Lead attachment to high temperature devices
US3680196A (en) * 1970-05-08 1972-08-01 Us Navy Process for bonding chip devices to hybrid circuitry
US3680199A (en) * 1970-07-06 1972-08-01 Texas Instruments Inc Alloying method
US3716907A (en) * 1970-11-20 1973-02-20 Harris Intertype Corp Method of fabrication of semiconductor device package
US3869787A (en) * 1973-01-02 1975-03-11 Honeywell Inf Systems Method for precisely aligning circuit devices coarsely positioned on a substrate
US3902936A (en) * 1973-04-04 1975-09-02 Motorola Inc Germanium bonded silicon substrate and method of manufacture
US4078711A (en) * 1977-04-14 1978-03-14 Rockwell International Corporation Metallurgical method for die attaching silicon on sapphire devices to obtain heat resistant bond
DE2930789C2 (en) * 1978-07-28 1983-08-04 Tokyo Shibaura Denki K.K., Kawasaki, Kanagawa Semiconductor device
DE2930779C2 (en) * 1978-07-28 1983-08-04 Tokyo Shibaura Denki K.K., Kawasaki, Kanagawa Semiconductor device
JPS59213145A (en) * 1983-05-18 1984-12-03 Toshiba Corp Semiconductor device and manufacture thereof
US5693574A (en) * 1991-02-22 1997-12-02 Deutsche Aerospace Ag Process for the laminar joining of silicon semiconductor slices
US7628309B1 (en) 2005-05-03 2009-12-08 Rosemount Aerospace Inc. Transient liquid phase eutectic bonding
US20070013014A1 (en) * 2005-05-03 2007-01-18 Shuwen Guo High temperature resistant solid state pressure sensor
US7538401B2 (en) * 2005-05-03 2009-05-26 Rosemount Aerospace Inc. Transducer for use in harsh environments
US7400042B2 (en) * 2005-05-03 2008-07-15 Rosemount Aerospace Inc. Substrate with adhesive bonding metallization with diffusion barrier
US7820474B2 (en) 2007-01-09 2010-10-26 International Business Machines Corporation Metal catalyzed selective deposition of materials including germanium and antimony
CN101910467B (en) * 2008-01-25 2013-05-15 国际商业机器公司 Metal-catalyzed selective deposition of materials containing germanium and antimony
US20140102529A1 (en) * 2012-10-17 2014-04-17 Emcore Solar Power, Inc. Solar cell interconnect assembly and method for manufacturing the same
CN103646882A (en) * 2013-11-27 2014-03-19 江苏艾特曼电子科技有限公司 Eutectic bonding material-series structure used for wafer-level encapsulation
EP3226282A1 (en) 2016-03-31 2017-10-04 Techni Holding AS Non-eutectic bonding method with formation of a solid solution with a porous structure with a second phase dispersed therein and corresponding joint

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US2555001A (en) * 1947-02-04 1951-05-29 Bell Telephone Labor Inc Bonded article and method of bonding
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1764023A1 (en) * 1967-03-22 1972-03-30 Rca Corp Semiconductor component with improved breakdown voltage

Also Published As

Publication number Publication date
DE1464357B1 (en) 1970-10-29
US3200490A (en) 1965-08-17

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