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US3665589A - Lead attachment to high temperature devices - Google Patents

Lead attachment to high temperature devices Download PDF

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US3665589A
US3665589A US868775A US3665589DA US3665589A US 3665589 A US3665589 A US 3665589A US 868775 A US868775 A US 868775A US 3665589D A US3665589D A US 3665589DA US 3665589 A US3665589 A US 3665589A
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electrode
wire
bond
lead
eutectic
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US868775A
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Richard Farrell
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National Aeronautics and Space Administration NASA
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Definitions

  • ABSTRACT A technique for the attachment of leads to electronic devices which permits operation of the devices over a wide temperature range.
  • the technique contemplates the use of core conductors having a thin coating of metal thereon whereby only a limited amount of coating material is available to form an alloy which bonds the core conductor to the device electrode, the electrode composition thus being effected only in the region adjacent the lead and the bond between the electrode and device being unaffected.
  • FIG. 1 FIG. 4
  • the present invention relates to lead attachment to electronic devices. More specifically, the present invention is directed to bonds, between conductors and devices, which are mechanically and electrically reliable over wide temperature ranges. Accordingly, the general objects of the present invention are to provide novel and improved methods and articles of such character.
  • FIGS. I-SA of the drawing of the present application.
  • the accepted procedure for producing alloyed junctions in host semiconductor material in the course of fabrication of solid state diodes of the type above mentioned, may be considered as starting with the positioning of a small fragment or dot of electrode material on a host chip of semiconductor material of the desired conductivity type.
  • the dot or fragment will typically be comprised of a material which, when in the molten condition, can dissolve a portion of the host semiconductor chip.
  • the dot of electrode material will initially include or will be caused to absorb a small percentage, typically less than 2 percent, of an impurity which, if present in the host semiconductor material, would cause the chip to exhibit the opposite conductivity characteristics.
  • the second step in the junction formation is to heat the chip and fragment of electrode material to a predetermined temperature greater than the melting point of the electrode material.
  • the molten electrode material will thereupon dissolve a portion of the semiconductor chip as shown in FIG. 2.
  • Upon cooling, a portion of the dissolved semiconductor material will come out of solution and regrow.
  • the regrown semiconductor material will have incorporated in its lattice a sufficient quantity of the opposite conductivity impurity which was present in the electrode material so as to convert the regrown material, considering the example where the host chip is p-type semiconductor material, to n-type material as shown in FIG. 3.
  • the resulting p-n junction will perform the electronic function of the semiconductor device.
  • the fragment Upon resolidification of the electrode material, the fragment will bond to the host chip.
  • a useful device will, of course, result from mounting the chip in a suitable package and making electrical contact to the host material and to the exposed surface of the electrode material which now constitutes an elec trode of the device.
  • the standard prior art technique for connecting a lead wire to the electrode material has called for placing the lead in mechanical contact with the device electrode and thereafter heating the entire structure until either the electrode material and a portion of the lead wire go into solution with one another or the electrode material melts and wets the wire. In either case, upon cooling of the structure, the wire will be bonded to the electrode. While this manner of attaching leads to device electrodes offers the advantage of simplicity, the prior art lead attachment technique usually resulted in a condition which led to failure when the packaged device was operated over a wide range of temperatures.
  • the materials employed in the fabrication of junction devices in the manner described above must have melting points greater than the maximum temperature at which the device is to be operated. Further, since the thermal coefficients of expansion of the various materials differ, in the interest of minimizing strains resulting from temperature induced volumetric changes, which strains will threaten the mechanical integrity of the bonds, the coefficients of expansion of adjacent bonded materials in the device must be matched to the degree possible. It is known that the electrode material-semiconductor bond will maintain its mechanical integrity for temperatures up to the melting point of the elec trode material since the volumetric changes which result from cooling the structure from the molten state of the electrode material during junction fabrication are generally reversible.
  • the device survives cooling from the melting temperature of the electrode material, it is likely that it will survive heating back up to this temperature.
  • the composition of the electrode will change and its physical properties will thus also change.
  • the new electrode composition comprising a eutectic which includes the lead material, may form a satisfactory bond with the remainder of the lead wire there is no assurance that the bond between the new electrode composition and the host semiconductor material will maintain mechanical stability over as wide a range of temperatures as did the original electrode-semiconductor bond.
  • the temperature coefficients of expansion of the newly formed eutectic and the semiconductor material are sufficiently different so that mechanical integrity of the bond between the electrode and chip may be lost if the packaged device is operated over a wide temperature range. It is to be noted that the coefficient of expansion of the electrode composition which includes the lead material cannot readily be controlled since the prior art offered no means for regulating the amount of lead material which went into solution with the electrode material.
  • the present invention overcomes the above-discussed and other problems of the prior art by providing a novel method for attaching leads to semiconductor devices whereby the resulting devices are operable over a wide temperature range.
  • the device electrode is contacted with a lead which is a composite of two or more metals.
  • the lead will comprise a core wire formed from a material having a relatively high melting point which has been coated, by electroplating and/or evaporation, with thin layers of one or more other metals.
  • a lead material such as molybdenum is coated, typically by electroplating, with a limited quantity of another conductive material such as copper.
  • the amount of coating material on the lead material is limited so as to insure that, when the lead is placed adjacent to the electrode and the device heated to the eutectic melting temperature of the coating and electrode materials, only a small amount of the coating is available to be consumed in the alloying process.
  • the thermally durable bond between the electrode and the host semiconductor material thus remains unaffected. Accordingly, as the process of cooling the structure from the eutectic temperature to the ambient can generally be considered to be reversible, mechanical integrity of the structure will be assured over a range of temperatures from ambient to the coating-electrode material eutectic temperature. The foregoing indicates a good match of expansion coefficients between the materials which are bonded to each other and is evidence that the devices will also survive cooling temperatures considerably below ambient.
  • FIGS. l4 are side elevation views indicating preliminary steps in the fabrication of an alloy junction semiconductor device in accordance with both the prior art and the present invention.
  • FIG. 5A is an enlarged, side elevation view of the bond between a lead and device electrode in accordance with the prior art
  • FIG. 5B is an enlarged, side elevation view of the bond between a lead and device electrode in accordance with the present invention.
  • FIG. 6 is an isometric view, partly in section, of a packaged semiconductor device fabricated in accordance with the present invention.
  • a p-type chip of silicon carbide is indicated at 10.
  • a small fragment or dot 12 of a material which is to be used in formation of both the diode junction and device electrode will be placed on chip 10.
  • the material comprising dot 12 will typically be silicon.
  • the silicon electrode material will at least temporarily be converted into n-type material by the absorption of nitrogen from the surrounding atmosphere when the silicon is molten during the junction fabrication step shown in FIG. 2.
  • the chip and fragment supported on its surface are heated, in a nitrogen atmosphere, to a predetermined temperature greater than the melting point of the silicon fragment 12.
  • the molten silicon will absorb nitrogen from the atmosphere and will dissolve a portion of the host semiconductor chip 10.
  • a portion of the dissolved semiconductor material will come out of solution and regrow bringing with it enough of the absorbed impurity from the fragment 12, nitrogen in the example being described, to make the regrown silicon carbide n-type as indicated at 14 in FIG. 3.
  • the resulting p-n junction 16 will perform the electronic function of the semiconductor device.
  • the fragment 12 will be bonded to the surface of chip 10.
  • the chip After fabrication of the p-n junction 16, the chip will be bonded to the base of a package, in the manner shown in FIG. 6, by standard procedures which typically employ a gold-tantalum alloy. An operative solid state diode will thereafter result from the attachment of an electrical conductor from a suitable terminal to the fragment 12 which constitutes the device electrode.
  • the conductor 18 will comprise a wire or ribbon which will be attached by first welding the ends thereof to the rim of a package at two points such as indicated at 20-20 in FIG. 6. The conductor is thereafter manipulated into mechanical contact with the device electrode as shown in FIG. 4.
  • conductor 18 would be comprised of a metal chosen for its conductivity and its ability to alloy with the electrode material.
  • conductor 18 would typically comprise a gold or nickel wire.
  • the entire structure was heated until either the electrode material and a portion of the wire went into solution with one another or the electrode material melted and wetted the wire.
  • the wire 18 and the electrode material formed a eutectic mixture at a temperature which was lower than the melting point of the electrode 12.
  • a new alloy 12 was formed and this new alloy had different physical properties, and particularly a different thermal coefficient of expansion, when compared to the original fragment 12.
  • the new electrode composition 12' formed a reliable mechanical bond with the remaining portions of wire 18.
  • the bond 22 between the new electrode composition 12 and the chip 10 of semiconductor material will not, however, maintain mechanical stability over as wide a range of temperatures as did the original electrode-semiconductor bond. Accordingly, when the resulting device is operated over extreme temperature ranges, device failure will result from the fracture of the bond between the electrode and the host chip caused by temperature induced strains.
  • a composite lead is employed.
  • This composite lead comprises a core wire 24 having a coating 26 thereon.
  • Selection of the material for core wire 24 is dicated by the desire for a core metal which will serve as a conducting path away from the device electrode and which will have sufficient mechanical strength. Further, the core material must have a melting point higher than the maximum desired operating temperature of the device and must not form a eutectic with the coating material at a temperature below the eutectic temperature of the alloy comprising the coating and electrode materials.
  • the core wire 24 will typically be comprised of molybdenum which has been coated, for example by electroplating, with coating 26.
  • the coating 26, which may comprise one or a plurality of layers of metal, will be selected from a material or materials which will combine with the electrode materials to form an alloy as indicated at 28 in FIG. 53. Alloy 28 serves as a mechanically and thermally stable bond between electrode 12 and the core wire 24. To achieve this bond, it is necessary that the material or materials comprising coating 26 will alloy with the electrode material at a temperature higher than the maximum desired operating temperature of the device but at a temperature lower than the melting or eutectic temperatures of the other constituents of the packaged device. In addition, when alloyed with the material comprising the electrode, the coating material must form an electrically conductive eutectic which is non-brittle and which wets the core wire 24 so as to bond the core wire to the electrode.
  • coating 26 may comprise a thin layer of copper which has been electroplated on the Mo core wire.
  • the thickness of coating 26 must be limited to only that amount necessary for the formation of alloy 28. Restated, the amount of coating 26 available must be limited to only that quantity necessary to go into the solution with only a portion of the electrode 12 (to form alloy 28) so as to bond the electrode to the core wire while leaving the remainder of the electrode 12 unaffected and the bond 22 between the electrode and chip as originally formed.
  • FIG. 6 A complete device, fabricated in accordance with the present invention, is shown in FIG. 6.
  • the package depicted in FIG. 6 comprises a flange 30 of nickel-iron having the opposite ends of composite lead wire 18 welded thereto as at 20-20.
  • Conductive flange 30 is displaced from a Mo base post 32 by a cylindrical ceramic insulator 34.
  • the chip 10 is mounted on post 32 by means of a suitable alloy 36.
  • a silicon carbide backward diode has been fabricated employing the following materials:
  • the thickness of the copper coating 26 on molybdenum core wire 24 was approximately 0.0001 inch, the diameter of the core wire 24 was approximately 0.001 inch and the length of contact between the lead 18 and the electrode 12 was typically 0.003 inch. Bonding of the lead to the electrode was accomplished at 800C with the heating being continued only until alloying of the coating and electrode materials was visually observed.
  • the resulting silicon-copper alloy 28 provided a mechanically and thermally stable bond between the core wire 24 and electrode 12; alloy 28 having a melting temperature of approximately 800C. The resulting devices have survived exposure to temperatures in the range of 270 to +700C.
  • a method of attaching leads to electronic circuit components comprising the steps of:
  • fabricating a composite lead wire by forming a thin coating of precisely limited thickness of a first conductive material on a core wire of a second conductive material;
  • step of subjecting the electronic device and wire to an elevated temperature comprises:

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Abstract

A technique for the attachment of leads to electronic devices which permits operation of the devices over a wide temperature range. The technique contemplates the use of core conductors having a thin coating of metal thereon whereby only a limited amount of coating material is available to form an alloy which bonds the core conductor to the device electrode, the electrode composition thus being effected only in the region adjacent the lead and the bond between the electrode and device being unaffected.

Description

United States Patent Farrell [54] LEAD ATTACHMENT TO HIGH TEMPERATURE DEVICES [72] Inventor: Richard Farrell, Lowell, Mass.
[73] Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration [22] Filed: Oct. 23, 1969 [21] Appl.No.: 868,775
[52] US. Cl ..29/492, 29/497, 29/498, 29/502, 29/589, 29/628 [51] lnt.Cl ..B23k 31/02 [58] Field of Search. 29/492, 497, 502, 628, 589, 29/498, 590
[56] References Cited UNlTED STATES PATENTS 3,190,954 6/1965 Pomerantz ..174/94 2,820,932 1/1958 Looney ....29/589X 3,012,316 12/1961 Knau ..29/498 X 51 May 30, 1972 3,097,965 7/1963 Wilkins ..29/502 X 3,136,032 6/1964 Berndsen ..29/498 X 3,169,304 2/1965 Gould ..29/589 3,200,490 8/1965 Clymer ....29/502 X 3,384,958 5/1968 Christian et al. .29/502 X 3,523,358 8/1970 Zimmer et a1. ..29/498 3,526,953 9/1970 Levinstein ..29/502 X Primary Examiner-John F. Campbell Assistant Examiner-Ronald .1. Shore Armrney-John R. Manning, L. D. Wofford, Jr. and G. .1. Porter [57] ABSTRACT A technique for the attachment of leads to electronic devices which permits operation of the devices over a wide temperature range. The technique contemplates the use of core conductors having a thin coating of metal thereon whereby only a limited amount of coating material is available to form an alloy which bonds the core conductor to the device electrode, the electrode composition thus being effected only in the region adjacent the lead and the bond between the electrode and device being unaffected.
2 Claims, 7 Drawing Figures PATENTEDMAYBO 1972 3,665,589
FIG. 1 FIG. 4
FIG. 5A
(PRIOR ART) FIG. 6
/ INVENTOR RICHARD FARRELL LEAD ATTACHMENT TO HIGH TEMPERATURE DEVICES ORIGIN OF THE INVENTION The invention described herein was made by an employee of the United States Government and may be manufactured and used by or for the Government for governmental purposes without the payment of any royalties thereon or therefor.
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to lead attachment to electronic devices. More specifically, the present invention is directed to bonds, between conductors and devices, which are mechanically and electrically reliable over wide temperature ranges. Accordingly, the general objects of the present invention are to provide novel and improved methods and articles of such character.
I 2. Description of the Prior Art While not limited thereto in its utility, the present invention has been found to be particularly well suited for the joining of leads to semiconductor devices. Accordingly, for purposes of explanation, the present invention and the prior art will be described with relation to the fabrication of high-temperature solid state devices such as rectifier diodes, tunnel diodes and backward diodes.
In considering the prior art, reference may be had to FIGS. I-SA of the drawing of the present application. The accepted procedure for producing alloyed junctions in host semiconductor material, in the course of fabrication of solid state diodes of the type above mentioned, may be considered as starting with the positioning of a small fragment or dot of electrode material on a host chip of semiconductor material of the desired conductivity type. The dot or fragment will typically be comprised of a material which, when in the molten condition, can dissolve a portion of the host semiconductor chip. The dot of electrode material will initially include or will be caused to absorb a small percentage, typically less than 2 percent, of an impurity which, if present in the host semiconductor material, would cause the chip to exhibit the opposite conductivity characteristics. FIG. 1 of the drawing depicts the fragment of electrode material on the surface of the host chip. The second step in the junction formation is to heat the chip and fragment of electrode material to a predetermined temperature greater than the melting point of the electrode material. The molten electrode material will thereupon dissolve a portion of the semiconductor chip as shown in FIG. 2. Upon cooling, a portion of the dissolved semiconductor material will come out of solution and regrow. The regrown semiconductor material will have incorporated in its lattice a sufficient quantity of the opposite conductivity impurity which was present in the electrode material so as to convert the regrown material, considering the example where the host chip is p-type semiconductor material, to n-type material as shown in FIG. 3. The resulting p-n junction will perform the electronic function of the semiconductor device. Upon resolidification of the electrode material, the fragment will bond to the host chip. A useful device will, of course, result from mounting the chip in a suitable package and making electrical contact to the host material and to the exposed surface of the electrode material which now constitutes an elec trode of the device.
The standard prior art technique for connecting a lead wire to the electrode material has called for placing the lead in mechanical contact with the device electrode and thereafter heating the entire structure until either the electrode material and a portion of the lead wire go into solution with one another or the electrode material melts and wets the wire. In either case, upon cooling of the structure, the wire will be bonded to the electrode. While this manner of attaching leads to device electrodes offers the advantage of simplicity, the prior art lead attachment technique usually resulted in a condition which led to failure when the packaged device was operated over a wide range of temperatures.
The aforementioned undesirable condition, in the typical case where the wire and electrode material go into solution with one another, resulted from the fact that the composition of the electrode would be changed to a eutectic comprised of the wire material and electrode material. The changing of the composition of the electrode has a deleterious effect upon the thermal durability of the bond between the electrode material and the host semiconductor material and this bond will thereafter not withstand temperatures up to the level at which the electrode material went into solution with the host materia] during formation of the junction.
To review the problem discussed in the preceding paragraph, the materials employed in the fabrication of junction devices in the manner described above must have melting points greater than the maximum temperature at which the device is to be operated. Further, since the thermal coefficients of expansion of the various materials differ, in the interest of minimizing strains resulting from temperature induced volumetric changes, which strains will threaten the mechanical integrity of the bonds, the coefficients of expansion of adjacent bonded materials in the device must be matched to the degree possible. It is known that the electrode material-semiconductor bond will maintain its mechanical integrity for temperatures up to the melting point of the elec trode material since the volumetric changes which result from cooling the structure from the molten state of the electrode material during junction fabrication are generally reversible. Restated, if the device survives cooling from the melting temperature of the electrode material, it is likely that it will survive heating back up to this temperature. However, if part of the lead wire is dissolved into the electrode material, the composition of the electrode will change and its physical properties will thus also change. Even though the new electrode composition, comprising a eutectic which includes the lead material, may form a satisfactory bond with the remainder of the lead wire there is no assurance that the bond between the new electrode composition and the host semiconductor material will maintain mechanical stability over as wide a range of temperatures as did the original electrode-semiconductor bond. In the typical case, the temperature coefficients of expansion of the newly formed eutectic and the semiconductor material are sufficiently different so that mechanical integrity of the bond between the electrode and chip may be lost if the packaged device is operated over a wide temperature range. It is to be noted that the coefficient of expansion of the electrode composition which includes the lead material cannot readily be controlled since the prior art offered no means for regulating the amount of lead material which went into solution with the electrode material.
SUMMARY OF THE INVENTION The present invention overcomes the above-discussed and other problems of the prior art by providing a novel method for attaching leads to semiconductor devices whereby the resulting devices are operable over a wide temperature range. In general, in accordance with the present invention, the device electrode is contacted with a lead which is a composite of two or more metals. The lead will comprise a core wire formed from a material having a relatively high melting point which has been coated, by electroplating and/or evaporation, with thin layers of one or more other metals. The employment of a thin coating of relatively low melting point material on a core wire limits the amount of material which is available for alloying with the device electrode during the lead bonding step, and only a portion of the electrode material will be involved in the process (i.e., will form a new eutectic with the lead material). Accordingly, the bond between the device electrode and the semiconductor chip will remain as formed.
In accordance with the present invention, a lead material such as molybdenum is coated, typically by electroplating, with a limited quantity of another conductive material such as copper. The amount of coating material on the lead material is limited so as to insure that, when the lead is placed adjacent to the electrode and the device heated to the eutectic melting temperature of the coating and electrode materials, only a small amount of the coating is available to be consumed in the alloying process. The thermally durable bond between the electrode and the host semiconductor material thus remains unaffected. Accordingly, as the process of cooling the structure from the eutectic temperature to the ambient can generally be considered to be reversible, mechanical integrity of the structure will be assured over a range of temperatures from ambient to the coating-electrode material eutectic temperature. The foregoing indicates a good match of expansion coefficients between the materials which are bonded to each other and is evidence that the devices will also survive cooling temperatures considerably below ambient.
BRIEF DESCRIPTION OF THE DRAWING The present invention may be better understood and its numerous objects and advantages will become apparent to those skilled in the art by reference to the accompanying drawing wherein like reference numerals refer to like elements in the several figures and in which:
FIGS. l4 are side elevation views indicating preliminary steps in the fabrication of an alloy junction semiconductor device in accordance with both the prior art and the present invention;
FIG. 5A is an enlarged, side elevation view of the bond between a lead and device electrode in accordance with the prior art;
FIG. 5B is an enlarged, side elevation view of the bond between a lead and device electrode in accordance with the present invention; and
FIG. 6 is an isometric view, partly in section, of a packaged semiconductor device fabricated in accordance with the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENT In order to facilitate understanding of the present invention, the fabrication of a silicon carbide backward diode will be discussed. It is to be understood, however, that the present invention has utility in the attachment of leads to all types of electronic devices, and particularly to semiconductor devices.
With references now to FIG. 1, a p-type chip of silicon carbide is indicated at 10. A small fragment or dot 12 of a material which is to be used in formation of both the diode junction and device electrode will be placed on chip 10. In the example being described, where the chip is p-type silicon carbide, the material comprising dot 12 will typically be silicon. The silicon electrode material will at least temporarily be converted into n-type material by the absorption of nitrogen from the surrounding atmosphere when the silicon is molten during the junction fabrication step shown in FIG. 2.
In the step depicted in FIG. 2, the chip and fragment supported on its surface are heated, in a nitrogen atmosphere, to a predetermined temperature greater than the melting point of the silicon fragment 12. The molten silicon will absorb nitrogen from the atmosphere and will dissolve a portion of the host semiconductor chip 10. Upon cooling, a portion of the dissolved semiconductor material will come out of solution and regrow bringing with it enough of the absorbed impurity from the fragment 12, nitrogen in the example being described, to make the regrown silicon carbide n-type as indicated at 14 in FIG. 3. The resulting p-n junction 16 will perform the electronic function of the semiconductor device. Also upon cooling and resolidification, the fragment 12 will be bonded to the surface of chip 10.
After fabrication of the p-n junction 16, the chip will be bonded to the base of a package, in the manner shown in FIG. 6, by standard procedures which typically employ a gold-tantalum alloy. An operative solid state diode will thereafter result from the attachment of an electrical conductor from a suitable terminal to the fragment 12 which constitutes the device electrode. Typically, the conductor 18 will comprise a wire or ribbon which will be attached by first welding the ends thereof to the rim of a package at two points such as indicated at 20-20 in FIG. 6. The conductor is thereafter manipulated into mechanical contact with the device electrode as shown in FIG. 4.
In accordance with the prior art, conductor 18 would be comprised of a metal chosen for its conductivity and its ability to alloy with the electrode material. Thus, in accordance with the prior art, conductor 18 would typically comprise a gold or nickel wire.
Continuing with a consideration of the prior art, and particularly with respect to FIG. 5A, once the wire 18 had been manipulated into mechanical contact with the electrode 12, the entire structure was heated until either the electrode material and a portion of the wire went into solution with one another or the electrode material melted and wetted the wire. In the usual case, the wire 18 and the electrode material formed a eutectic mixture at a temperature which was lower than the melting point of the electrode 12. As a result of part of wire 18 being dissolved into the electrode material, a new alloy 12 was formed and this new alloy had different physical properties, and particularly a different thermal coefficient of expansion, when compared to the original fragment 12. The new electrode composition 12' formed a reliable mechanical bond with the remaining portions of wire 18. The bond 22 between the new electrode composition 12 and the chip 10 of semiconductor material will not, however, maintain mechanical stability over as wide a range of temperatures as did the original electrode-semiconductor bond. Accordingly, when the resulting device is operated over extreme temperature ranges, device failure will result from the fracture of the bond between the electrode and the host chip caused by temperature induced strains.
In accordance with the present invention, and as may best be seen from FIG. SE, a composite lead is employed. This composite lead comprises a core wire 24 having a coating 26 thereon. Selection of the material for core wire 24 is dicated by the desire for a core metal which will serve as a conducting path away from the device electrode and which will have sufficient mechanical strength. Further, the core material must have a melting point higher than the maximum desired operating temperature of the device and must not form a eutectic with the coating material at a temperature below the eutectic temperature of the alloy comprising the coating and electrode materials. In the example being described wherein a silicon carbide backward diode is being fabricated, the core wire 24 will typically be comprised of molybdenum which has been coated, for example by electroplating, with coating 26.
The coating 26, which may comprise one or a plurality of layers of metal, will be selected from a material or materials which will combine with the electrode materials to form an alloy as indicated at 28 in FIG. 53. Alloy 28 serves as a mechanically and thermally stable bond between electrode 12 and the core wire 24. To achieve this bond, it is necessary that the material or materials comprising coating 26 will alloy with the electrode material at a temperature higher than the maximum desired operating temperature of the device but at a temperature lower than the melting or eutectic temperatures of the other constituents of the packaged device. In addition, when alloyed with the material comprising the electrode, the coating material must form an electrically conductive eutectic which is non-brittle and which wets the core wire 24 so as to bond the core wire to the electrode. In the example being described wherein the electrode material is silicon and the core wire is molybdenum, coating 26 may comprise a thin layer of copper which has been electroplated on the Mo core wire. The thickness of coating 26 must be limited to only that amount necessary for the formation of alloy 28. Restated, the amount of coating 26 available must be limited to only that quantity necessary to go into the solution with only a portion of the electrode 12 (to form alloy 28) so as to bond the electrode to the core wire while leaving the remainder of the electrode 12 unaffected and the bond 22 between the electrode and chip as originally formed.
A complete device, fabricated in accordance with the present invention, is shown in FIG. 6. The package depicted in FIG. 6 comprises a flange 30 of nickel-iron having the opposite ends of composite lead wire 18 welded thereto as at 20-20. Conductive flange 30 is displaced from a Mo base post 32 by a cylindrical ceramic insulator 34. The chip 10 is mounted on post 32 by means of a suitable alloy 36.
In accordance with the present invention, a silicon carbide backward diode has been fabricated employing the following materials:
host chip 10 p-type silicon carbide electrode material fragment 12 silicon n-dopant nitrogen bonding alloy 36 gold-tantalum lead 18 molybdenum with electroplated copper coating. The thickness of the copper coating 26 on molybdenum core wire 24 was approximately 0.0001 inch, the diameter of the core wire 24 was approximately 0.001 inch and the length of contact between the lead 18 and the electrode 12 was typically 0.003 inch. Bonding of the lead to the electrode was accomplished at 800C with the heating being continued only until alloying of the coating and electrode materials was visually observed. The resulting silicon-copper alloy 28 provided a mechanically and thermally stable bond between the core wire 24 and electrode 12; alloy 28 having a melting temperature of approximately 800C. The resulting devices have survived exposure to temperatures in the range of 270 to +700C.
While a preferred embodiment has been shown and described, it is to be understood that various modifications and substitutions may be made thereto without departing from the spirit and scope of the present invention. Accordingly, it is to be understood that the present invention has been described by way of illustration and not limitation.
I claim: 1. A method of attaching leads to electronic circuit components comprising the steps of:
bonding one end of an electrode to an electronic device; fabricating a composite lead wire by forming a thin coating of precisely limited thickness of a first conductive material on a core wire of a second conductive material;
mechanically positioning the lead wire against the opposite end of the electrode;
subjecting the device and wire to the elevated temperature at which an eutectic including said first conductive material and the material comprising the electrode forms at the opposite end of the electrode; and
cooling the device and wire whereby the limited amount of eutectic so formed will bond the wire to the opposite end of the electrode without affecting the existing bond between the electrode and the electronic device.
2. The method of claim 1 wherein the step of subjecting the electronic device and wire to an elevated temperature comprises:
heating the device until a small head of eutectic forms on the electrode and then stopping the application of heat to the device.

Claims (2)

1. A method of attaching leads to electronic circuit componEnts comprising the steps of: bonding one end of an electrode to an electronic device; fabricating a composite lead wire by forming a thin coating of precisely limited thickness of a first conductive material on a core wire of a second conductive material; mechanically positioning the lead wire against the opposite end of the electrode; subjecting the device and wire to the elevated temperature at which an eutectic including said first conductive material and the material comprising the electrode forms at the opposite end of the electrode; and cooling the device and wire whereby the limited amount of eutectic so formed will bond the wire to the opposite end of the electrode without affecting the existing bond between the electrode and the electronic device.
2. The method of claim 1 wherein the step of subjecting the electronic device and wire to an elevated temperature comprises: heating the device until a small bead of eutectic forms on the electrode and then stopping the application of heat to the device.
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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3806776A (en) * 1971-08-20 1974-04-23 Thomson Csf Improvement for connecting a two terminal electronical device to a case
US4787551A (en) * 1987-05-04 1988-11-29 Stanford University Method of welding thermocouples to silicon wafers for temperature monitoring in rapid thermal processing
US6333207B1 (en) * 1999-05-24 2001-12-25 Tessera, Inc. Peelable lead structure and method of manufacture
US6627478B2 (en) * 1999-05-24 2003-09-30 Tessera, Inc. Method of making a microelectronic assembly with multiple lead deformation using differential thermal expansion/contraction
US6709906B2 (en) 1994-02-28 2004-03-23 Semiconductor Energy Laboratory Co., Ltd. Method for producing semiconductor device
WO2013095147A1 (en) * 2011-12-23 2013-06-27 Micronit Microfluidics B.V. Method of bonding two substrates and device manufactured thereby
US20190091473A1 (en) * 2017-09-22 2019-03-28 Advanced Bionics Ag Connection Joints for Joining Wires and Pads Constructed of Different Conductive Materials and Methods of Making the Same

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2820932A (en) * 1956-03-07 1958-01-21 Bell Telephone Labor Inc Contact structure
US3012316A (en) * 1958-04-11 1961-12-12 Clevite Corp Attaching leads to silicon semiconductor devices
US3097965A (en) * 1961-06-27 1963-07-16 Richard A Wilkins Conductive wire coating alloys, wires coated therewith and process for improving solderability therefor
US3136032A (en) * 1961-02-03 1964-06-09 Philips Corp Method of manufacturing semiconductor devices
US3169304A (en) * 1961-06-22 1965-02-16 Giannini Controls Corp Method of forming an ohmic semiconductor contact
US3190954A (en) * 1962-02-06 1965-06-22 Clevite Corp Semiconductor device
US3200490A (en) * 1962-12-07 1965-08-17 Philco Corp Method of forming ohmic bonds to a germanium-coated silicon body with eutectic alloyforming materials
US3384958A (en) * 1965-06-30 1968-05-28 Ibm Method of brazing
US3523358A (en) * 1966-10-07 1970-08-11 Philips Corp Process for producing a vacuum tight supra-conducting joint by diffusion soldering
US3526953A (en) * 1967-01-03 1970-09-08 Gen Electric Method for making lightweight metallic structure

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2820932A (en) * 1956-03-07 1958-01-21 Bell Telephone Labor Inc Contact structure
US3012316A (en) * 1958-04-11 1961-12-12 Clevite Corp Attaching leads to silicon semiconductor devices
US3136032A (en) * 1961-02-03 1964-06-09 Philips Corp Method of manufacturing semiconductor devices
US3169304A (en) * 1961-06-22 1965-02-16 Giannini Controls Corp Method of forming an ohmic semiconductor contact
US3097965A (en) * 1961-06-27 1963-07-16 Richard A Wilkins Conductive wire coating alloys, wires coated therewith and process for improving solderability therefor
US3190954A (en) * 1962-02-06 1965-06-22 Clevite Corp Semiconductor device
US3200490A (en) * 1962-12-07 1965-08-17 Philco Corp Method of forming ohmic bonds to a germanium-coated silicon body with eutectic alloyforming materials
US3384958A (en) * 1965-06-30 1968-05-28 Ibm Method of brazing
US3523358A (en) * 1966-10-07 1970-08-11 Philips Corp Process for producing a vacuum tight supra-conducting joint by diffusion soldering
US3526953A (en) * 1967-01-03 1970-09-08 Gen Electric Method for making lightweight metallic structure

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3806776A (en) * 1971-08-20 1974-04-23 Thomson Csf Improvement for connecting a two terminal electronical device to a case
US4787551A (en) * 1987-05-04 1988-11-29 Stanford University Method of welding thermocouples to silicon wafers for temperature monitoring in rapid thermal processing
US6709906B2 (en) 1994-02-28 2004-03-23 Semiconductor Energy Laboratory Co., Ltd. Method for producing semiconductor device
US6333207B1 (en) * 1999-05-24 2001-12-25 Tessera, Inc. Peelable lead structure and method of manufacture
US6627478B2 (en) * 1999-05-24 2003-09-30 Tessera, Inc. Method of making a microelectronic assembly with multiple lead deformation using differential thermal expansion/contraction
WO2013095147A1 (en) * 2011-12-23 2013-06-27 Micronit Microfluidics B.V. Method of bonding two substrates and device manufactured thereby
US9573804B2 (en) 2011-12-23 2017-02-21 Micronit Microfluidics B.V. Method of bonding two substrates and device manufactured thereby
US20190091473A1 (en) * 2017-09-22 2019-03-28 Advanced Bionics Ag Connection Joints for Joining Wires and Pads Constructed of Different Conductive Materials and Methods of Making the Same
US10912940B2 (en) * 2017-09-22 2021-02-09 Advanced Bionics Ag Connection joints for joining wires and pads constructed of different conductive materials and methods of making the same

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