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FR3110283B1 - Procédé de fabrication d’un substrat semi-conducteur sur isolant pour applications radiofréquences - Google Patents

Procédé de fabrication d’un substrat semi-conducteur sur isolant pour applications radiofréquences Download PDF

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Publication number
FR3110283B1
FR3110283B1 FR2004971A FR2004971A FR3110283B1 FR 3110283 B1 FR3110283 B1 FR 3110283B1 FR 2004971 A FR2004971 A FR 2004971A FR 2004971 A FR2004971 A FR 2004971A FR 3110283 B1 FR3110283 B1 FR 3110283B1
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FR
France
Prior art keywords
substrate
semiconductor
semiconductor layer
radio frequency
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR2004971A
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English (en)
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FR3110283A1 (fr
Inventor
Isabelle Bertrand
Walter Schwarzenbach
Frédéric Allibert
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Priority to FR2004971A priority Critical patent/FR3110283B1/fr
Priority to TW110117327A priority patent/TW202147400A/zh
Priority to EP21732481.3A priority patent/EP4154306A1/fr
Priority to JP2022565780A priority patent/JP7590456B2/ja
Priority to US17/998,833 priority patent/US20230207382A1/en
Priority to KR1020227039462A priority patent/KR20230011297A/ko
Priority to CN202180034312.2A priority patent/CN115552592A/zh
Priority to PCT/FR2021/050870 priority patent/WO2021234277A1/fr
Publication of FR3110283A1 publication Critical patent/FR3110283A1/fr
Application granted granted Critical
Publication of FR3110283B1 publication Critical patent/FR3110283B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02032—Preparing bulk and homogeneous wafers by reclaiming or re-processing

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

L’invention concerne un procédé de fabrication d’un substrat de type semi-conducteur sur isolant pour applications radiofréquences, comprenant les étapes suivantes :- formation d’un substrat donneur (1) par croissance épitaxiale d’une couche semi-conductrice (101) non dopée sur un substrat germe (100) semi-conducteur dopé de type P,- formation d’une couche électriquement isolante (10) sur la couche semi-conductrice épitaxiale non dopée (101),- implantation d’espèces ioniques au travers de ladite couche électriquement isolante (10), de sorte à former dans la couche semi-conductrice (101) épitaxiale non dopée une zone de fragilisation (11) délimitant une couche mince (12) semi-conductrice à transférer,- fourniture d’un substrat support (2) semi-conducteur présentant une résistivité électrique supérieure ou égale à 500 Ω.cm,- collage du substrat donneur (1) sur le substrat support (2) par l’intermédiaire de la couche électriquement isolante (10),- détachement du substrat donneur (1) le long de la zone de fragilisation (11) de sorte à transférer la couche mince (12) semi-conductrice du substrat donneur (1) sur le substrat support (2). Figure pour l’abrégé : Fig 6
FR2004971A 2020-05-18 2020-05-18 Procédé de fabrication d’un substrat semi-conducteur sur isolant pour applications radiofréquences Active FR3110283B1 (fr)

Priority Applications (8)

Application Number Priority Date Filing Date Title
FR2004971A FR3110283B1 (fr) 2020-05-18 2020-05-18 Procédé de fabrication d’un substrat semi-conducteur sur isolant pour applications radiofréquences
TW110117327A TW202147400A (zh) 2020-05-18 2021-05-13 用於製作射頻應用之絕緣體上半導體底材之方法
JP2022565780A JP7590456B2 (ja) 2020-05-18 2021-05-18 高周波用途用のセミコンダクタオンインシュレータ基板を製造するための方法
US17/998,833 US20230207382A1 (en) 2020-05-18 2021-05-18 Method for manufacturing a semiconductor-on-insulator substrate for radiofrequency applications
EP21732481.3A EP4154306A1 (fr) 2020-05-18 2021-05-18 Procede de fabrication d'un substrat semi-conducteur sur isolant pour applications radiofrequences
KR1020227039462A KR20230011297A (ko) 2020-05-18 2021-05-18 무선 주파수 응용을 위한 반도체-온-절연체 기판을 제조하는 공정
CN202180034312.2A CN115552592A (zh) 2020-05-18 2021-05-18 制造用于射频应用的绝缘体上半导体衬底的方法
PCT/FR2021/050870 WO2021234277A1 (fr) 2020-05-18 2021-05-18 Procede de fabrication d'un substrat semi-conducteur sur isolant pour applications radiofrequences

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2004971 2020-05-18
FR2004971A FR3110283B1 (fr) 2020-05-18 2020-05-18 Procédé de fabrication d’un substrat semi-conducteur sur isolant pour applications radiofréquences

Publications (2)

Publication Number Publication Date
FR3110283A1 FR3110283A1 (fr) 2021-11-19
FR3110283B1 true FR3110283B1 (fr) 2022-04-15

Family

ID=72178709

Family Applications (1)

Application Number Title Priority Date Filing Date
FR2004971A Active FR3110283B1 (fr) 2020-05-18 2020-05-18 Procédé de fabrication d’un substrat semi-conducteur sur isolant pour applications radiofréquences

Country Status (8)

Country Link
US (1) US20230207382A1 (fr)
EP (1) EP4154306A1 (fr)
JP (1) JP7590456B2 (fr)
KR (1) KR20230011297A (fr)
CN (1) CN115552592A (fr)
FR (1) FR3110283B1 (fr)
TW (1) TW202147400A (fr)
WO (1) WO2021234277A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20250069896A1 (en) * 2023-08-22 2025-02-27 Tokyo Electron Limited Etch Selectivity Modulation by Fluorocarbon Treatment

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200406811A (en) 2002-06-03 2004-05-01 Tien-Hsi Lee Transferring method of a layer onto a substrate
ATE384336T1 (de) 2004-10-19 2008-02-15 Soitec Silicon On Insulator Verfahren zur herstellung einer verspannten silizium-schicht auf einem substrat und zwischenprodukt
US8101500B2 (en) * 2007-09-27 2012-01-24 Fairchild Semiconductor Corporation Semiconductor device with (110)-oriented silicon
FR2928775B1 (fr) * 2008-03-11 2011-12-09 Soitec Silicon On Insulator Procede de fabrication d'un substrat de type semiconducteur sur isolant
JP5532680B2 (ja) 2009-05-27 2014-06-25 信越半導体株式会社 Ｓｏｉウェーハの製造方法およびｓｏｉウェーハ
EP2282332B1 (fr) 2009-08-04 2012-06-27 S.O.I. TEC Silicon Methode de fabrication d'un substrat semiconducteur
JP2014195026A (ja) 2013-03-29 2014-10-09 Kyocera Corp 複合基板
JP6447439B2 (ja) 2015-09-28 2019-01-09 信越半導体株式会社 貼り合わせｓｏｉウェーハの製造方法

Also Published As

Publication number Publication date
WO2021234277A1 (fr) 2021-11-25
JP7590456B2 (ja) 2024-11-26
EP4154306A1 (fr) 2023-03-29
FR3110283A1 (fr) 2021-11-19
TW202147400A (zh) 2021-12-16
US20230207382A1 (en) 2023-06-29
KR20230011297A (ko) 2023-01-20
JP2023526902A (ja) 2023-06-26
CN115552592A (zh) 2022-12-30

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