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FR2912841B1 - Procede de polissage d'heterostructures - Google Patents

Procede de polissage d'heterostructures

Info

Publication number
FR2912841B1
FR2912841B1 FR0753284A FR0753284A FR2912841B1 FR 2912841 B1 FR2912841 B1 FR 2912841B1 FR 0753284 A FR0753284 A FR 0753284A FR 0753284 A FR0753284 A FR 0753284A FR 2912841 B1 FR2912841 B1 FR 2912841B1
Authority
FR
France
Prior art keywords
heterostructures
polishing
polishing heterostructures
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0753284A
Other languages
English (en)
Other versions
FR2912841A1 (fr
Inventor
Muriel Martinez
Corinne Seguin
Morgane Logiou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to FR0753284A priority Critical patent/FR2912841B1/fr
Application filed by Soitec SA filed Critical Soitec SA
Priority to EP08702303A priority patent/EP2118923A1/fr
Priority to US12/524,246 priority patent/US20110117740A1/en
Priority to CN2008800051631A priority patent/CN101611477B/zh
Priority to PCT/IB2008/000156 priority patent/WO2008099245A1/fr
Priority to KR1020097014793A priority patent/KR20090119834A/ko
Priority to JP2009549857A priority patent/JP2010519740A/ja
Publication of FR2912841A1 publication Critical patent/FR2912841A1/fr
Application granted granted Critical
Publication of FR2912841B1 publication Critical patent/FR2912841B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02024—Mirror polishing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
FR0753284A 2007-02-15 2007-02-15 Procede de polissage d'heterostructures Expired - Fee Related FR2912841B1 (fr)

Priority Applications (7)

Application Number Priority Date Filing Date Title
FR0753284A FR2912841B1 (fr) 2007-02-15 2007-02-15 Procede de polissage d'heterostructures
US12/524,246 US20110117740A1 (en) 2007-02-15 2008-01-23 Method for polishing heterostructures
CN2008800051631A CN101611477B (zh) 2007-02-15 2008-01-23 用于抛光异质结构的方法
PCT/IB2008/000156 WO2008099245A1 (fr) 2007-02-15 2008-01-23 Procédé de polissage d'hétérostructures
EP08702303A EP2118923A1 (fr) 2007-02-15 2008-01-23 Procédé de polissage d'hétérostructures
KR1020097014793A KR20090119834A (ko) 2007-02-15 2008-01-23 헤테로 구조물들의 연마 방법
JP2009549857A JP2010519740A (ja) 2007-02-15 2008-01-23 ヘテロ構造を研磨する方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0753284A FR2912841B1 (fr) 2007-02-15 2007-02-15 Procede de polissage d'heterostructures

Publications (2)

Publication Number Publication Date
FR2912841A1 FR2912841A1 (fr) 2008-08-22
FR2912841B1 true FR2912841B1 (fr) 2009-05-22

Family

ID=38564553

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0753284A Expired - Fee Related FR2912841B1 (fr) 2007-02-15 2007-02-15 Procede de polissage d'heterostructures

Country Status (7)

Country Link
US (1) US20110117740A1 (fr)
EP (1) EP2118923A1 (fr)
JP (1) JP2010519740A (fr)
KR (1) KR20090119834A (fr)
CN (1) CN101611477B (fr)
FR (1) FR2912841B1 (fr)
WO (1) WO2008099245A1 (fr)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2932108B1 (fr) * 2008-06-10 2019-07-05 Soitec Polissage de couches de germanium
KR102050783B1 (ko) 2011-11-25 2019-12-02 가부시키가이샤 후지미인코퍼레이티드 연마용 조성물
US9238755B2 (en) 2011-11-25 2016-01-19 Fujima Incorporated Polishing composition
JP6084965B2 (ja) 2012-03-16 2017-02-22 株式会社フジミインコーポレーテッド 研磨用組成物
JP6113619B2 (ja) 2013-09-30 2017-04-12 株式会社フジミインコーポレーテッド 研磨用組成物
CN104810270A (zh) * 2014-01-28 2015-07-29 中芯国际集成电路制造(上海)有限公司 研磨方法
US11798988B2 (en) 2020-01-08 2023-10-24 Microsoft Technology Licensing, Llc Graded planar buffer for nanowires
US11929253B2 (en) * 2020-05-29 2024-03-12 Microsoft Technology Licensing, Llc SAG nanowire growth with a planarization process
US11488822B2 (en) 2020-05-29 2022-11-01 Microsoft Technology Licensing, Llc SAG nanowire growth with ion implantation

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US4022625A (en) * 1974-12-24 1977-05-10 Nl Industries, Inc. Polishing composition and method of polishing
US4453074A (en) * 1981-10-19 1984-06-05 American Express Company Protection system for intelligent cards
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US5051745A (en) * 1990-08-21 1991-09-24 Pkware, Inc. String searcher, and compressor using same
US5514245A (en) * 1992-01-27 1996-05-07 Micron Technology, Inc. Method for chemical planarization (CMP) of a semiconductor wafer to provide a planar surface free of microscratches
US5375244A (en) * 1992-05-29 1994-12-20 At&T Corp. System and method for granting access to a resource
US5267314A (en) * 1992-11-17 1993-11-30 Leon Stambler Secure transaction system and method utilized therein
JP2550864B2 (ja) * 1993-05-31 1996-11-06 日本電気株式会社 ジョブ実行における分散型制御方法及びその装置
GB9323489D0 (en) * 1993-11-08 1994-01-05 Ncr Int Inc Self-service business system
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US5790677A (en) * 1995-06-29 1998-08-04 Microsoft Corporation System and method for secure electronic commerce transactions
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Also Published As

Publication number Publication date
CN101611477B (zh) 2011-01-12
KR20090119834A (ko) 2009-11-20
WO2008099245A1 (fr) 2008-08-21
US20110117740A1 (en) 2011-05-19
FR2912841A1 (fr) 2008-08-22
JP2010519740A (ja) 2010-06-03
CN101611477A (zh) 2009-12-23
EP2118923A1 (fr) 2009-11-18

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Legal Events

Date Code Title Description
CD Change of name or company name

Owner name: SOITEC, FR

Effective date: 20120907

ST Notification of lapse

Effective date: 20131031