[go: up one dir, main page]

FR2887352B1 - Dispositif et procede pour proteger l'integrite de donnees. - Google Patents

Dispositif et procede pour proteger l'integrite de donnees.

Info

Publication number
FR2887352B1
FR2887352B1 FR0604787A FR0604787A FR2887352B1 FR 2887352 B1 FR2887352 B1 FR 2887352B1 FR 0604787 A FR0604787 A FR 0604787A FR 0604787 A FR0604787 A FR 0604787A FR 2887352 B1 FR2887352 B1 FR 2887352B1
Authority
FR
France
Prior art keywords
data integrity
protecting data
protecting
integrity
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0604787A
Other languages
English (en)
Other versions
FR2887352A1 (fr
Inventor
Berndt Gammel
Rainer Goettfert
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of FR2887352A1 publication Critical patent/FR2887352A1/fr
Application granted granted Critical
Publication of FR2887352B1 publication Critical patent/FR2887352B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • H03M13/2909—Product codes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/72—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Storage Device Security (AREA)
  • Detection And Correction Of Errors (AREA)
FR0604787A 2005-06-17 2006-05-30 Dispositif et procede pour proteger l'integrite de donnees. Expired - Fee Related FR2887352B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102005028221A DE102005028221B4 (de) 2005-06-17 2005-06-17 Vorrichtung und Verfahren zum Schutz der Integrität von Daten

Publications (2)

Publication Number Publication Date
FR2887352A1 FR2887352A1 (fr) 2006-12-22
FR2887352B1 true FR2887352B1 (fr) 2012-12-07

Family

ID=37497997

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0604787A Expired - Fee Related FR2887352B1 (fr) 2005-06-17 2006-05-30 Dispositif et procede pour proteger l'integrite de donnees.

Country Status (4)

Country Link
US (1) US8250659B2 (fr)
KR (1) KR100887003B1 (fr)
DE (1) DE102005028221B4 (fr)
FR (1) FR2887352B1 (fr)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100836758B1 (ko) * 2006-09-11 2008-06-10 삼성전자주식회사 메모리 카드의 암호화 장치 및 그것에 따른 데이터 기입 및독출 방법
EP2150922B1 (fr) * 2007-05-03 2014-11-12 Kevin Loughrey Système d'étiquetage d'identification par un grand nombre
FR2916594A1 (fr) * 2007-05-23 2008-11-28 France Telecom Procede d'authentification d'une entite par une entite verificatrice
EP2091256A1 (fr) * 2008-02-18 2009-08-19 Nagravision S.A. Procédé pour l'élimination d'artéfacts d'un signal audio/vidéo transmis
US8612777B2 (en) * 2009-01-09 2013-12-17 Infineon Technologies Ag Apparatus and method for writing data to be stored to a predetermined memory area
US8438344B2 (en) * 2010-03-12 2013-05-07 Texas Instruments Incorporated Low overhead and timing improved architecture for performing error checking and correction for memories and buses in system-on-chips, and other circuits, systems and processes
FR2983597B1 (fr) 2011-12-01 2014-01-24 Viaccess Sa Procede de detection d'une erreur de lecture d'une donnee
DE102013108073B4 (de) * 2013-07-29 2019-12-19 Infineon Technologies Ag Datenverarbeitungsanordnung und verfahren zur datenverarbeitung
US10594491B2 (en) * 2015-12-24 2020-03-17 Intel Corporation Cryptographic system memory management
CN106130712B (zh) * 2016-06-14 2019-09-06 刘雷波 一种基于ins网络的随机感染抗故障攻击方法
US11093588B2 (en) * 2017-06-26 2021-08-17 Micron Technology, Inc. Memory system including data obfuscation
EP3506548A1 (fr) * 2017-12-27 2019-07-03 Secure-IC SAS Capteur numérique quantitatif
IT201800009905A1 (it) * 2018-10-30 2020-04-30 St Microelectronics Srl Procedimento per la generazione di dati personalizzati di profile package in carte a circuito integrato, corrispondente sistema e prodotto informatico
KR102364047B1 (ko) 2019-11-19 2022-02-16 기초과학연구원 구조화된 행렬들에 기초한 공개키 암호를 위한 방법과 장치
US11829376B2 (en) * 2020-05-06 2023-11-28 Intel Corporation Technologies for refining stochastic similarity search candidates
CN118659926B (zh) * 2024-08-16 2024-11-19 北京航空航天大学杭州创新研究院 基于加密与检测的分布式系统中间人攻击防御方法及装置

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4569050A (en) * 1983-01-14 1986-02-04 Honeywell Inc. Data communication system with fixed weight error correction and detection code
US5285456A (en) * 1991-05-15 1994-02-08 International Business Machines Corporation System and method for improving the integrity of control information
JPH0520219A (ja) * 1991-07-17 1993-01-29 Nec Corp 入出力制御装置
EP1315092B1 (fr) * 1995-06-30 2007-04-18 Sony Corporation Procédé et appareil d'enregistrement de données, et méthode et appareil de reproduction de données
US5757826A (en) * 1995-07-12 1998-05-26 Quantum Corporation Word-wise processing for reed-solomon codes
US5862225A (en) * 1996-12-16 1999-01-19 Ut Automotive Dearborn, Inc. Automatic resynchronization for remote keyless entry systems
US6445797B1 (en) * 1998-12-16 2002-09-03 Secure Choice Llc Method and system for performing secure electronic digital streaming
US6717406B2 (en) * 2000-03-14 2004-04-06 Beth Israel Deaconess Medical Center, Inc. Parallel magnetic resonance imaging techniques using radiofrequency coil arrays
US7536473B2 (en) * 2001-08-24 2009-05-19 Intel Corporation General input/output architecture, protocol and related methods to implement flow control
US6757122B1 (en) * 2002-01-29 2004-06-29 Seagate Technology Llc Method and decoding apparatus using linear code with parity check matrices composed from circulants
JP2003316652A (ja) * 2002-04-25 2003-11-07 Nec Engineering Ltd データファイルストレージサービスシステム及びその動作制御方法
US7370264B2 (en) * 2003-12-19 2008-05-06 Stmicroelectronics, Inc. H-matrix for error correcting circuitry
US6970808B2 (en) * 2004-04-29 2005-11-29 Kingsley E. Abhulimen Realtime computer assisted leak detection/location reporting and inventory loss monitoring system of pipeline network systems
DE102005001953A1 (de) * 2005-01-14 2006-07-27 Infineon Technologies Ag Verfahren und Schaltungsanordnung zur Überprüfung eines Datensatzes mit mehreren Datenworten
TWI341095B (en) * 2007-12-12 2011-04-21 Nat Univ Tsing Hua Light-overhead and flexible wireless sensor message authentication method

Also Published As

Publication number Publication date
KR100887003B1 (ko) 2009-03-04
US8250659B2 (en) 2012-08-21
DE102005028221A1 (de) 2006-12-28
US20070033417A1 (en) 2007-02-08
DE102005028221B4 (de) 2007-10-11
KR20060132514A (ko) 2006-12-21
FR2887352A1 (fr) 2006-12-22

Similar Documents

Publication Publication Date Title
FR2887352B1 (fr) Dispositif et procede pour proteger l'integrite de donnees.
EP1871117A4 (fr) Dispositif de decodage d'image et procede de decodage d'image
FR2922400B1 (fr) Dispositif de camera et procede d'incitation par information
FR2873248B1 (fr) Procede et dispositif pour la localisation de transpondeurs
EP1965349A4 (fr) Dispositif de recuperation d'image et procede de recuperation d'image
EP1744554A4 (fr) Dispositif et procede de formation d'image
FR2884336B1 (fr) Dispositif et procede pour calculer une representation d'un operande de resultat.
EP1909281A4 (fr) Support d'enregistrement de donnees, dispositif et procede d'enregistrement
FR2909464B1 (fr) Dispositif d'entree de donnees et procede de mise en oeuvre du dispositif
FR2887095B1 (fr) Dispositif de communication et procede pour la transmission de donnees
FR2863070B1 (fr) Procede et dispositif d'interface homme - machine
EP1947566A4 (fr) Procede et dispositif de traitement de l'information
EP1852850A4 (fr) Dispositif et procede d'encodage evolutif
EP1990688A4 (fr) Dispositif de formation d'image, procede de formation d'image et système de formation d'image
FR2858257B1 (fr) Procede et dispositif de solidification dirigee
FR2909104B1 (fr) Dispositif et procede d'aiguilletage.
EP1903687A4 (fr) Procede de decodage de donnees et dispositif de decodage de donnees l utilisant
FR2857205B1 (fr) Dispositif et procede de codage de donnees video
FR2909922B1 (fr) Procede et dispositif de marquage d'objets et materiaux.
FR2862834B1 (fr) Procede et dispositif de video-projection
FR2874440B1 (fr) Procede et dispositif de traitement de donnees
FR2857805B1 (fr) Procede et dispositif de transmission de donnees
FR2869486B1 (fr) Procede de traitement de donnees securise et dispositif associe
FR2878113B1 (fr) Dispositif et procede de transformation de donnees
FR2900010B1 (fr) Procede et dispositif de securisation de transferts de donnees

Legal Events

Date Code Title Description
PLFP Fee payment

Year of fee payment: 11

PLFP Fee payment

Year of fee payment: 12

PLFP Fee payment

Year of fee payment: 13

PLFP Fee payment

Year of fee payment: 14

PLFP Fee payment

Year of fee payment: 15

ST Notification of lapse

Effective date: 20220105