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FR2872630B1 - Circuit integre tolerant au phenomene de verrouillage - Google Patents

Circuit integre tolerant au phenomene de verrouillage

Info

Publication number
FR2872630B1
FR2872630B1 FR0407309A FR0407309A FR2872630B1 FR 2872630 B1 FR2872630 B1 FR 2872630B1 FR 0407309 A FR0407309 A FR 0407309A FR 0407309 A FR0407309 A FR 0407309A FR 2872630 B1 FR2872630 B1 FR 2872630B1
Authority
FR
France
Prior art keywords
integrated circuit
locking phenomenon
tolerant integrated
tolerant
phenomenon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0407309A
Other languages
English (en)
Other versions
FR2872630A1 (fr
Inventor
Francois Tailliet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0407309A priority Critical patent/FR2872630B1/fr
Priority to US11/172,609 priority patent/US7868392B2/en
Publication of FR2872630A1 publication Critical patent/FR2872630A1/fr
Application granted granted Critical
Publication of FR2872630B1 publication Critical patent/FR2872630B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • H10D84/854Complementary IGFETs, e.g. CMOS comprising arrangements for preventing bipolar actions between the different IGFET regions, e.g. arrangements for latchup prevention
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
FR0407309A 2004-07-01 2004-07-01 Circuit integre tolerant au phenomene de verrouillage Expired - Fee Related FR2872630B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0407309A FR2872630B1 (fr) 2004-07-01 2004-07-01 Circuit integre tolerant au phenomene de verrouillage
US11/172,609 US7868392B2 (en) 2004-07-01 2005-06-30 Integrated circuit tolerant to the locking phenomenon

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0407309A FR2872630B1 (fr) 2004-07-01 2004-07-01 Circuit integre tolerant au phenomene de verrouillage

Publications (2)

Publication Number Publication Date
FR2872630A1 FR2872630A1 (fr) 2006-01-06
FR2872630B1 true FR2872630B1 (fr) 2006-12-01

Family

ID=34947675

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0407309A Expired - Fee Related FR2872630B1 (fr) 2004-07-01 2004-07-01 Circuit integre tolerant au phenomene de verrouillage

Country Status (2)

Country Link
US (1) US7868392B2 (fr)
FR (1) FR2872630B1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115050736B (zh) * 2022-06-10 2023-05-23 深圳市晶扬电子有限公司 低压工艺的静电保护器件及整体静电防护方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1175503A (fr) * 1981-07-17 1984-10-02 Andreas Demetriou Circuit d'excitation a cmos
JPS60111454A (ja) * 1983-11-21 1985-06-17 Mitsubishi Electric Corp 半導体集積回路
JPS60152055A (ja) * 1984-01-20 1985-08-10 Matsushita Electric Ind Co Ltd 相補型mos半導体装置
US4881107A (en) * 1987-07-03 1989-11-14 Nissan Motor Company, Ltd. IC device having a vertical MOSFET and an auxiliary component
IT1268070B1 (it) * 1994-06-06 1997-02-20 Cselt Centro Studi Lab Telecom Circuito in tecnologia cmos per il pilotaggo ad alta velocita' di sorgenti ottiche.
US5721445A (en) * 1995-03-02 1998-02-24 Lucent Technologies Inc. Semiconductor device with increased parasitic emitter resistance and improved latch-up immunity
US6222254B1 (en) * 1997-03-31 2001-04-24 Intel Corporation Thermal conducting trench in a semiconductor structure and method for forming the same
US6005797A (en) * 1998-03-20 1999-12-21 Micron Technology, Inc. Latch-up prevention for memory cells
JP3928837B2 (ja) * 1999-09-13 2007-06-13 株式会社ルネサステクノロジ 半導体集積回路装置
US6493275B2 (en) * 2000-08-07 2002-12-10 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated circuit device and electronic equipment
JP4199476B2 (ja) * 2002-04-12 2008-12-17 株式会社ルネサステクノロジ 半導体装置の保護回路

Also Published As

Publication number Publication date
US7868392B2 (en) 2011-01-11
FR2872630A1 (fr) 2006-01-06
US20060081938A1 (en) 2006-04-20

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20090331