FR2792794A1 - Analogue frequency modulation carrier phase recovery broadcast reception has difference between sample pair compared to difference of amplitude value to detect discontinuity, and if detected, current sample is aligned with adjacent sample - Google Patents

Abstract

The phase lock receiver ambiguity resolution process inputs the incoming phase at intervals. The difference (a) between each pair of successive samples is calculated. The difference is compared to a representative difference of amplitude value (b) to detect a discontinuity. If a discontinuity is found the current sample is aligned with the adjacent sample (c) constructing a set of corrected samples, producing the non ambiguous reference value.

Description

METHOD FOR DEPLIING A PHASE SIGNAL,

  LINEAR PHASE DEPLIANCE SYSTEM

  AND CARRIER RECOVERY DEVICE

  The present invention relates to a method of

  unfolding of a phase signal, to an unfolding system

  linear phase and a recovery device

corresponding carriers.

  In analogue broadcasting with frequency modulation

  quence, a difference in frequency is reflected, after demodulation

  tion, by a continuous component. This difference in frequency or "disagreement" is easy to correct, because it suffices to filter this continuous component. Such a process of

  correction is performed in all analogue receivers

good quality.

  In the case of the transmission of a digital signal

  that, the problem of carrier synchronization is

  much more critical because a frequency deviation

  by a rotation of the constellation of amp states.

  study and phase of the considered modulation, which makes

  impossible any subsequent decoding.

  To ensure carrier recovery, different

  Some solutions have so far been proposed.

  A first solution, as represented by

  gure, consists of conducting a process led by a

  nonlinear decision (DD) applied to a signal u (n) cor-

  phased from a received signal before carrier recovery x (n) = ei () d (n) + w (n) od (n) is the useful signal of power equal to 1 and w (n) a Gaussian white additive noise of variance W. The corresponding device represented in FIG. 1a comprises decision-making, a non-linear circuit, a phase detector, a loop filter, an integrator and a phase correction circuit delivering the corrected signal. in phase u (n) from the received signal x (n). The phase error, in the absence of noise, satisfies the relation s (n) = "n) -ó (n) o 4n) represents the phase of the

  received signal x (n) and (n) the estimate thereof.

  The loop filter H (z) is a low-pass filter whose transfer function is written: H (z) = G, + 2 In FIG. 1a, K denotes the loop gain, K can be taken as equal to 1, the scalar gain of the assembly being

  be included in the values of G1 and G2. Such a provision

  tif corrects a phase difference between the received signal

  x (n) and a reference signal provided either by a sequence

  of learning, either by the decision on the sym-

bols.

  With regard to phase detectors capable of

  can be implemented in these devices, they can perform a detection of the form: lm u (n J- (n)] j E (n) = ar int - u (n) (n) with, for d (n) = d (n) u (n) * (n) = d (nf exp (4 (n) - (n)) + w (n) d (n) exp (- j (n))

  o d * (n) and d * (n) represent the conjugated complex expression

  of the decision taken and the respective useful signal

is lying.

  Many other phase detectors are sus-

  These can be used as described for example in the thesis published by D. MOTTIER: "Association of functions of equalization, synchronization and decoding

  channel for high-performance digital transmissions

  Spectral T, "Doctoral Thesis of the University of Rennes

(France), Nov. 1997.

  Under these conditions, if the phase error is

  ble, (n) - $ (n) <<, and if the noise is weak w (n / Jd (ni) 2 <"1 the phase error s (n) satisfies the relation: s (n) (") n) - + (n) + w '(n) with w' (n) = wi (n) / d (nl2 o wi (n) denotes the imaginary part of w (n) of (n) exp (-) j (n)) = Im [w (n) d exp (-j $ (n)), the system represented

  in the figure can then be reduced to a linear loop.

  risée, as shown in FIG. 1b, the study of which

  established regime can be reduced to that of a

  classical looped neimer whose closed-loop transfer function satisfies the relation: (1- z) + Z-1_Q () (-, 2 + - '(GI (i - z -) + G2)

  The use of this type of device as

  presented in figures la and lb is very common in

  carrier recovery systems in digital communication.

  due to the fact that loop structures have a number of advantages, such as low computational complexity, simplicity of implementation and good performance under steady-state conditions.

  presence of a phase difference or frequency.

  However, this type of device presents

disadvantages.

  First, the process is driven by the non-linear decision, which precludes its use with low signal-to-noise ratios. Such a situation

  causes a spread of errors and an important

gradation of performance.

  In the second place, such a system presents

  related inconveniences, no longer to decision-making, but to the use of a looped structure. The first of these drawbacks relates to the hanging, or acquisition,

  of the loop, in particular for imbalances of

  this acquisition has the character of a

  slow and random phenomenon. Confer H.MEYR and ai. "Syn-

  chronization in Digital Communications ", Vol 1, Wiley,

  1990. Indeed, if the frequency difference is too large

  the linear model is no longer valid and the time of

  convergence, or acquisition, increases significantly

  aunt. This drawback appears to be of major importance

  for the use of looped structures for the recovery of

  carrier, such structures, for this reason.

  sound, not being practically used in the modes of

  packet transmission, for which the structures

  Rails or Feed Forward are used.

  The second of these drawbacks relates to the lack of robustness of these systems in steady state, since the phase to be compensated does not correspond to a phase deviation and / or fixed frequency, confer the article entitled "A Survey of Digital Phase-Locked Loops "published by W. LINDSEY, CM CHIE, Proceedings of the IEEE, Vol.69,

No.4, Apr.1981.

  The present invention aims to overcome the drawbacks of the carrier recovery systems of

  the prior art previously mentioned.

  In particular, for this purpose, an object of the

  This invention is the implementation of a method for

  folding of a phase signal allowing, because of this unfolding operation, the phase signal being thus made substantially continuous over any time interval of implementation, to make the phase detection conducted

  on this substantially linear interval.

  For the same purpose, an object of the present invention

  In addition, the implementation of a system of unfolding

  phase of substantially linear phase to deliver

  a corresponding unfolded phase signal.

  Another object of the present invention is also

  the implementation, from a system of unfolding

  substantially linear phase as mentioned above

  of a carrier recovery device of a

  received, whose speed of convergence, or acquisition, is substantially improved vis-à-vis that of the carrier synchronization devices of

the prior art.

  The process of unfolding a phase signal

  an interval, object of the invention, a process in which

  which the amplitude s (n) of this signal is detected by sampling

  succession, is remarkable in that one cal-

  separates the difference 5n, n-1 = s (n) -s (n-1) between each pair of successive samples, formed by a sample

  current and an adjacent sample, this difference is compared

  8n, n-1 to a reference value representative of the amplitude value equal to each interval, in order to detect a discontinuity of this signal. In the presence of such a discontinuity, the value of the sample is aligned

  current, respectively adjacent, and the value of the

  the following factors, by shifting the value of these

  correlates the amplitude value equal to each interval and builds a series of sampled values sd (n) corrected. This makes it possible to deliver an unfolded signal whose unfolding range is equal to the sum of all the heights on which the sampling detection

successively is realized.

  The linear phase unfolding system of a

  continuous phase signal at intervals, the object of the

  According to the invention, this signal consisting of a series of current sample digital samples s (n) is remarkable in that, in order to deliver a signal of

  unfolded phase consisting of a series of samples cor-

  corrected sample ruled stream sd (n), this system com-

  carries a subtraction circuit receiving, on a first input, the sequence of current sample digital samples s (n) and, on a second input, the sequence of corrected sample corrected samples previous sd (n-1) prior to the current corrected sample sd (n) This subtractor circuit delivers a difference signal

  Oa (n) = ú (n) - sd (n-1) between the pair of samples

  of the current sample ú (n) and the sample

  corrected tillon previous sd (n-1). A module for calculating an offset value is provided, which comprises a

  difference signal comparator to the zero value, de-

  giving a value of sign k = 1 of this difference, and a circuit for calculating an offset value Ob (n) = rem (Oa (n) + kp, 2p) -kp, remainder of the division by 2p of the value of this difference, increased respectively by the half-interval p as a function of the sign value of this difference, remains decreased respectively increased by the half-interval p as a function of the value of the

  sign of this difference, this circuit for calculating a

  their offset delivering this offset value. A

  module receives, on a first input, the value of

  their offset Ob (n) = rem (Oa (n) + kp, 2p) -kp and, on a

  second entry, the series of samples corrected for

  previous corrected chord sd (n-1) prior to the current corrected sample Ed (n). The summing module delivers the set of corrected samples of current sample Ed (n)

  checking the relation sd (n) = Ob (n) + sd (n-1) constituting the

  Phase diagram unfolded. A delay module of a sampling period receives the corrected current corrected sample sequence sd (n) and delivers the following corrected sample sequence cd (n-1)

  prior to the current corrected sample sd (n) to the moduli

the subtractor and summator.

  The carrier recovery device of a

  The signal received, following samples of rank n current, object of the invention comprises a phase locked loop. This loop allows from an estimated parasitic phase value $ (n) to generate a corrected received signal u (n, u (n), U) = x (n) .exp (-j4 (n)), x (n) representing the received signal sum of a useful signal eió (n) .d (n) and an additive noise,

  w (n). Entity (n) represents the phase argument para-

  site of the received signal. Received signal corrected, estimate

  of a common symbol, is subject to a decision-making process

  non-linear generation to generate a decided symbol. One

  dule phase detector makes it possible to subject the corrected signal u (n) and the decided symbol d (n) to a detection of

  phase to generate a phase error signal s (n)

  be the corrected received signal u (n) and the decided symbol d (n).

  The phase-locked loop makes it possible to calculate, from the phase error signal s (n), the estimated parasitic phase argument for the following sample of rank n + 1 according to this current sample from a loop filter H (z) = GI + G2 delivering an error signal of

  filtered phase Ef (n) and of an integrating operator

  setting, from the filtered phase error signal, the

  their estimated parasitic phase for the next sample.

  The carrier recovery device, object of the present invention, is remarkable in that the module

  phase detector consists of an unfolding system

  a linear phase signal delivering a phase signal de-

  folded previously cited. This system receives the signal

  corrected u (n) and the decided symbol d (n), and delivers a

  unintense phase error code Ed (n). The loop with

  phase rust makes it possible to calculate, from the signal

  phase error error gd (n), the phase argument para-

  estimated site for the next sample of rank n + 1, followed by

this current sample.

  The invention finds application to any receiver of a carrier frequency transmission signal, such as

  than a radio or television signal.

  It will be better understood by reading the

  and following the drawings below in the-

  which, in addition to FIGS. 1a and 1b relating to the prior art: FIG. 2a represents a general flowchart

  illustrating the stages of implementation of the method of

  folding a phase signal according to the subject of the present invention;

  FIG. 2b represents an illustrative flowchart

  trant stages of implementation of the unfolding process

  a phase signal in accordance with the purpose of this

  in a preferred, non-limiting embodiment

  tative; FIG. 2c represents, in the form of functional block diagrams, a linear phase unfolding process, implementing the method illustrated in FIG. 2b; - Figure 3 shows the block diagram

  of a linear phase unfolding system in a real

  hardware, operating in accordance with the steps of Figure 2b and the functional blocks illustrated in Figure 2c;

  FIG. 4a shows a device for recovering

  carrier in accordance with the purpose of this

  vention; FIG. 4b represents a detail of embodiment of FIG. 4a; FIG. 4c and FIG.

  diagrams or diagrams for presenting a justification

  theoretical concept of the carrier recovery device illustrated in FIGS. 4a and 4b; FIG. 4e represents the response to a frequency deviation of a carrier recovery device as represented in FIG. 4a or 4b; FIG. 4f represents the response of the carrier recovery device as represented in FIG. 4a, in the case of a frequency difference Af.Ts = 0.1 for a QAM-4 type modulation and a signal-to-noise ratio 15 dB;

  FIG. 5a shows a device for recovering

  carrier arrangement according to that shown in Figure 4a but wherein a blister module of the corrected phase error has been introduced;

  FIG. 5b represents a diagram of the

  their corrected phase error, the value of the prediction error and the mean squared error in dB as a function of the number of iterations or samples; FIG. 5c represents an unfolded phase error diagram for a ramp of frequencies of slope n, = -4 obtained thanks to the implementation of a device of

  carrier recovery as shown in Figure 5a.

  A more detailed description of the process of

  folding of a phase signal, of the unfolding system of

  linear phase and a device for recovering

  in accordance with the subject of the present invention will now be given in connection with FIGS. 2a, 2b and following. In the first place, considerations relating to the improvement of phase-locked loops will be

given below.

  As recalled with respect to the devices of the prior art, the carrier recovery process

  led by a non-linear decision can be seen in

  gime established as a phase locked loop of

classic type.

  It is therefore proposed to improve the estimation of the phase by the loop and then to apply these results to the

carrier recovery.

  A phase locked loop is a structure

  looped circuit for recovering the phase value, and therefore the frequency value, of a signal embedded in noise.

  According to an initial analysis, it is

  The linearized phase lock key is similar to a near phase detector carrier recovery device. Indeed, in a phase locked loop, the phase detection is performed on the signal

a).

  The acquisition time of a phase locked loop is generally evaluated for a given frequency deviation. The phase signal then verifies the relation: @ (n) = Q0nf (n) In this relation, Q0 represents the reduced pulsation difference and F (n) is the unit step defined by F (n) = 0 if

n <0 and F (n) = l otherwise.

  Given the previous relationship, we indicate that Q0 = 2nAfFs where Af is the frequency difference considered and

  Ts the sampling period of the signal.

  For a sufficiently small frequency difference, the

  phase-locked loop remains in the

  in this case, the frequency difference is compensated by a second order loop and the phase error satisfies the relation (1): E (n) = Qo (C2 + 2) n / 2 sin (nO )

  The phase error therefore appears as an amorphous sinusoid

  tie. In linear mode, it is noted that the frequency difference only intervenes in the amplitude of the response. In the previous relation, a, 3 and 0 are parameters of the

  phase locked loop. However, such a relationship

  tion is valid only in the linear range of the de-

  phase detector, that is for low frequency deviations. By way of example, the tangent arc detector delivering a phase signal E (n) = arctan Im [u (n)] Re [u (n) J)

is linear for Is (nj (.

  On the contrary, when the frequency difference is

  too important, the aforementioned linear model is no longer

  lable and any exact analytical study is made difficult.

  because of the strong non-linearity of the acquisition period. In such a case, the simulation alone can give

  an evaluation of the performance of the

phase rusting.

  With reference to the work of H. MEYR and others,

  In the article entitled "Synchronization in Digital Communications", Vol.i, Wiley, 1990, it is indicated that the acquisition time is proportional to the square of the frequency difference and appears in any case clearly.

  higher than in the case of the linear model.

  In some cases, for example, for a difference in

  importantly, the acquisition time may exceed several

  tens of thousands of samples.

  In a number of applications such as for example packet data transmission, such

  acquisition time is unacceptable, the linear models

  res the prior art can not be used.

  Referring to the preceding considerations, it is indicated that the operation of a phase-locked loop in the linearity range of the loop is, on the one hand, simpler to study and makes, on the other hand,

  convergence, or acquisition, of this lo-

  pide. The subject of the present invention is therefore the implementation of a phase-locked loop making it possible to

  have a range of linearity that can be made

  finite, that is to say a corresponding linearity range

  the sum of all the intervals over which the detection

  successive sampling of a continuous phase signal at intervals is carried out. It is thus understood that the range of linearity of the phase detection system, object of the present invention, can be made as large as necessary depending on the requirements of the use of this loop, this range of linearity.

  so that it can be described as infinite.

  The previously indicated goal is achieved and achieved in accordance with the method, object of the present invention, by a process of unfolding the phase signal, which

  allows to linearize the phase detection system cor-

  respondent, as mentioned above.

  The process of unfolding a phase signal

  tinu interval, consistent with the purpose of this

  invention will now be described in connection with the

gures 2a and 2b.

  Referring to FIG. 2a, it is indicated that the

  E (n) of the phase signal considered is detected by successive sampling. We thus have a series of phase signal samples denoted E (n), n denoting

the rank of the current sample.

  By continuous phase signal at intervals, it is indicated that the phase signal is continuous on tracks

  of fixed amplitude Ai, the amplitude of the phase signal varies

  laughing between a minimum amplitude -p and a maximum amplitude + p on each of the intervals Ai considered. We

  in particular, that the process, object of the present invention,

  invention, can be implemented for a signal of

  linear phase on each corresponding interval Ai.

  In this case and by way of nonlimiting example, the value of s (n) can be given by the relation relative to a classical phase detector: (n) = arctan (Imru (n)]) [Re [ a)]]

  With reference to FIG. 2a, following the exchange

  the corresponding phase signal s (n), the

  According to one embodiment of the present invention, the method of calculating, in a step a), the difference 8n, n-1 = e (n) -s (n-1) between each pair of successive samples formed by a current sample

  of rank n and an adjacent sample of rank n-1.

  The aforesaid step a) is then followed by a step b) consisting of detecting a discontinuity by comparing the difference a n, n-1 with a reference value, denoted Vref in FIG. 2a, 6n, n -1> Vref or

  En, n-1 <-Vref. As a non-limitative example, we indicate

  that the reference value may be constituted by any value greater than or equal to a value such that the

  half amplitude of the fixed amplitude range Ai.

* Step b) is then followed by a step c)

  to align the values of the sample.

  current sample s (n) and subsequent samples on the value s (n-1), which constitutes a sample prior to the current sample. The alignment process can be performed by shifting the value of these samples by the amplitude value equal to each interval so as to unfold the signal, that is to say to substantially eliminate any discontinuity. Step c) is then completed by a process of constructing a series of sampled values Ed (n) corrected. This process carried out in step c) then makes it possible to deliver an unfolded signal, following corrected samples sd (n) and whose unfolding range is equal to the sum of all the ranges denoted by Ai and on which the detection by sampling i

successively is realized.

  The procedure as shown in FIG. 2a

  for the implementation of the process which is the subject of this

  This invention merely involves storing sample E (n-1) prior to the current sample of the unfolded phase signal. Such a procedure can be implemented without difficulty but it involves a double storage, that is to say the storage of the previous sample s (n-1) and the current sample

  ú (n) of the unfolded phase signal and, of course, the

  Morisation of the suite of samples sd (n) constitutive

unfolded signal.

  A preferred embodiment of the method of unfolding a phase signal in accordance with the subject of the present invention, allowing practical realization

  a phase unfolding system of the loop-type

  phase rusting will now be given in connection with

Figure 2b.

  As shown in the above figure, in

  this preferred embodiment, the method of

  folding of a phase signal, object of the present invention.

  following the detection of the amplitude g (n) of the aforesaid phase signal by successive sampling, the signal

  phase being continuous over intervals Ai and present

  amplitude 2p, consists in memorizing the value of

  the previous corrected sample sd (n-1). Such an operation

  implies a negligible additional cost since the value of the previous corrected sample sd (n-1) can

  be easily obtained from the following sequence of

  successive corrected marks constituting the unfolded signal.

  In FIG. 2b, the storage operation can be performed by applying a delay of a sampling period, denoted z-1, in step 1001, to obtain the sampled value gd (n-1 ) corresponding from

  of the sequence of corrected samples sd (n).

  Step 1001 is then followed by a step 1002 of calculating the difference verifying the relation

(2):

  Oa (n) = ú (n) - Ed (n-1) between the pair of successive samples formed by the current sample of amplitude ú (n) and the sample

corrected previous Ed (n-1).

  Step 1002 is then followed by a step 1003 of comparing this difference with the value zero by a comparison test of superiority or equality to

this zero value.

  On a true answer to the aforementioned test 1003, the procedure

  The object of the present invention is to calculate, in a step 1004, an offset value, denoted Ob (n), obtained by the remainder of the division of the value Oa (n) + p.

  by the value 2p, this remainder being reduced by half

  interval p. If on the contrary, the difference calculated in step 1003 is less than zero, strictly, that is to say

  Oa (n) <0, the process which is the subject of the present invention

  is to calculate this offset value, denoted Ob (n), obtained by the remainder of the division of the value Oa (n) -p by 2p plus the half-interval p. Thus, with reference to FIG. 2b, it is indicated that the offset value satisfies the relation (3): If Oa (n) 2 0, Ob (n) = rem (Oa (n) + p, 2p) -p or the relation (4): If Oa (n) <O, Ob (n) = rem (Oa (n) -p, 2p) + p In the previous relations, we indicate that the symbol rem (X, Y) represents the remainder of the division of X by Y. The steps 1004 and 1005 of calculating the offset value are then followed by a step 1006 of calculating the value of the corrected sample sd (n) for the current sample. This corrected sample value satisfies the relation (5): Ed (n) = sd (n-1) + Ob (n)

  The process of unfolding the aforementioned phase signal can be implemented provided that the detection

  undeployed phase signal z (n) has a periodic and continuous phase characteristic at intervals. This is particularly the case for the function

arctangente for example.

  In a general way, the period of the phase detector for delivering the signal s (n),

  for an arctangent detector, it comes p = n.

  The method of unfolding a phase signal as represented in FIG. 2b can be implemented by a

  iterative process buckled as shown in Figure 2c.

  In this case, for any unfolded phase signal s (n), obtained under the aforementioned conditions of continuity and periodicity, the iterative process can be schematized by the loop represented in FIG. 2c in which a subtraction process at each

  phase sample s (n) of the sample values corri-

  ge sd (n-1) is carried out, to obtain the difference value Oa (n), then application to this value of

  difference of a phase unfolding process to ob-

  hold the offset value Ob (n), and add or accumulate

  lation at this first offset value of the value

  Fd (n-1) according to relation (5) to obtain the desired

  their sample sample corrected sd (n) current. A delay of a sampling period z-1 makes it possible to obtain the value of the corrected sample Ed (n-1) prior to the value

  corrected sample sd (n) current.

  With reference to FIGS. 2b and 2c above, the method which is the subject of the present invention makes it possible to define

  a linear phase unfolding system, as represented

felt in figure 3.

  With reference to the aforementioned figure, it is indicated that

  the phase signal being constituted by the following

  s (n), this system comprises a subtractor circuit, denoted 1, receiving on a first input the sequence of current sample digital samples s (n) and on a second input, the input of subtraction, the sequence of corrected sample corrected samples previous Ed (n-1) prior to

  the corrected current sample sd (n). The circuit subtracting

  In this way, transmitter 1 delivers a difference signal verifying the re-

  lation (2), the difference between the pair of successive samples formed by the current sample E (n) of the unfolded phase signal and the corrected previous sample sd (n-1).

  In addition, the phase unfolding system

  the object of the invention comprises a module 2 for calculating

  ass of an offset value, this offset value

  checking relations (3) and (4) previously mentioned

born in the description.

  The offset value calculation module 2 may comprise, as shown in FIG. 3 in a non-limiting embodiment, a comparator circuit 20 of the

  difference signal Oa (n) at the value 0, this circuit compares

  20 delivering a value of sign k = 1 of the difference

  mentioned above. Module 2 for calculating the value of

  offset also comprises a circuit 21 for calculating

  their offset Ob (n) satisfying the relation (6): Ob (n) = rem (Oa (n) + kp, 2p) -kp This offset value is constituted by the rest of the

  division by 2p of the value of this difference, increases

  respectively diminished by the half-interval p

  the value of the sign of the above-mentioned difference, this

  remainder decreased respectively increased by half

  interval p depending on the value of the sign of the dif-

  mentioned above. The calculation circuit 21 of the offset value and the module 2 for calculating the offset value deliver the aforementioned offset value Ob (n). A summing circuit 3 receives on a first input the aforementioned offset value Ob (n) and on a second input

  following corrected samples of the previously corrected sample

  tooth sd (n-1) prior to the current corrected sample. The

  summing circuit 3 delivers the sequence of samples corri-

  corrected current sample sd (n) verifying the rela-

  tion (5) previously mentioned in the description.

  Finally, a delay circuit of one period

  sample, circuit 4, receives the following sample

  corrected sample corrected samples current sd (n) and delivers the set of sample corrected samples

  corrected previous Ed (n-1) prior to the corri-

  current ge Ed (n) to the subtractor circuit 1, that is to say to the subtraction input of the aforementioned subtractor circuit,

  and summing circuit 3 previously mentioned.

  A more detailed description of a device for

  carrier recovery of a received signal, according to the subject of the present invention, will now be given

  in connection with Figures 4a, 4b and 4c.

  FIG. 4a shows a carrier recovery device of a received signal, in accordance with the subject of the present invention, in which this signal

  received x (n) consists of a series of samples

  presenting a useful signal and an additive noise w (n).

  The received signal thus satisfies the relation (7): x (n) = ei (n) .d (n) + w (n) In this relation, (n) represents the phase argument

  parasite of this received signal, n denotes the rank of the sample

  current tillon. The carrier recovery device, object

  of the present invention, comprises a loop with

  phase rust allowing, from a value of

  estimated parasitic phase 4 (n), of generating, multi-circuit

  plier 30, a corrected received signal u (n), verifying the relation: u (n) = x (n) .exp (-j (n)) this corrected received signal consisting of an estimation of a current symbol. The phase locked loop allows

  to subject the corrected signal u (n) to a process of de-

  non-linear direction 32a, 32b, to generate a symbol

  decided d (n). A phase detector module makes it possible to

  setting the corrected signal u (n) and the decided symbol d (n) to phase detection to generate an error signal

  phase s (n) between this corrected received signal u (n) and the symbol

  decided b (n). The phase-locked loop makes it possible to calculate, from the phase error signal s (n), the estimated parasitic phase argument for the sample

  following order of rank n + 1 according to the current sample,

  firing a loop filter bearing the references 34, 35 and denoted H (z) = Gl + G2. The loop filter delivers a filtered phase error signal I-z 'ef (n) and an integrating operator with the references 36, 37 delivers, from the signal

  filtered phase error of (n), the para- phase

  estimated site for the next sample. The operator 38 delivers the correction term to the multiplier circuit 30. In accordance with a particularly remarkable aspect of the carrier recovery device, object of the present invention, as shown in FIG. 4a, the phase detector module 33 is constituted by a system

  linear phase unfolding AZ as described above.

  in the description and represented for example in

  FIG. 3. The phase detector module 33 receives the corrected signal u (n), in particular the real part and the imaginary part of the latter by the modules 31a, 31b, and

  that the decided symbol d (n) obtained after a decision not

  neon on the real and imaginary parts of the signal u (n)

  as shown in Figure 4a previously mentioned

  born. In FIG. 4a, the linear phase unfolding system is denoted AM. It delivers an unfolded phase error signal, denoted sd (n), replacing the error signal of

  phase ú (n) devices of the prior art.

  The phase locked loop as shown

  FIG. 4a then makes it possible to calculate, from said unfolded phase error signal Ed (n), the estimated parasitic phase argument for the next sample of

  rank n + 1 according to the current sample.

  A theoretical justification of the operating mode of the carrier recovery device shown in FIG. 4a will now be given in connection with FIGS. 4b,

4c and 4d.

  For a phase detector of the arctangent type, the phase error g (n) satisfies the relation: (Im [u (n) d * (n)] s (n) = arctan Re [u (n) d * ( n)] j Re [u (n) d * (n)] This phase error can be unfolded as well as

  represented in FIG. 4b to provide the phase error de-

folded sd (n).

  With reference to FIG. 4c, it is indicated that the

  operation of the phase locked loop

  putting the embodiment of the carrier recovery device according to the subject of the present invention and as shown in FIG. 4c, is substantially

  simplified. Indeed, if we consider the whole

  4c, for a signal r (n) - ej <(n) + w (n)

  o + (n) represents the phase of the wanted signal and w (n) represents a

  noise, this set, incorporating the functional elements

  incorporated in the phase locked loop

  represented in FIG. 4a constituting the device for

  carrier recovery, object of the present invention,

  includes the signal detection system of the cor-

  ruler u (n) and linear phase unfolding system AZ in accordance with the object of the present invention, allowing

  to output the corrected phase error signal sd (n) and

  if the phase locked loop itself,

  comprising the loop filter and the integrating system.

  Thus, the phase correction system previously mentioned

  in the description, may be reduced to the whole

  represented in FIG. 4d, which constitutes a sensory block

  linearly with regard to phase, phase

  parasite @ (n) and estimated parasitic phase @ (n).

  Indeed, with reference to FIG. 4d, the corrected phase error signal $ d (n) satisfies the relation (8): sd (n) - = O (n) - @ ((n)

  In this relationship, the value of the phase error corri-

  dd (n) is linear with respect to the parasitic phase @ (n) as well as with respect to the estimated parasitic phase @ (n). Thus, the response of the lock loop of

  constituent phase of the device for recovering

  subject of the present invention, during a frequency deviation Af corresponding to the value Q0 previously

  mentioned in the description can be written according to the

  lation (9): Ed (n) = Qo (2 +: 2) n / 2 sin (nO) We thus note that the pulse difference Q0 = 2nAfTs only intervenes in the amplitude of the response to

  the frequency difference and the time constant of the

  response only depends on filter parameters a, c and 0

of loop.

  FIG. 4e shows the response of the phase-locked loop constituting the device.

  carrier recovery, object of the present invention.

  tion, shown in Figure 4a, for various frequency deviations

  quence in the absence of noise and with a phase difference

initial null.

  On observing the above-mentioned figure, it can be seen that the phase unfolding operation of the phase signal allows the implementation of an operation of the

  linear loop irrespective of the frequency deviation

  the acquisition of the carrier being obtained at the end

  number of iterations not exceeding 300, this operation

  which makes it possible to simplify the study of

  of the phase-locked loop and the carrier acquisition device while increasing

  considerably the speed of acquisition of this last

deny.

  Thus, according to a particularly remarkable aspect

  of the present invention, to study the response of the latter and the phase-locked loop constituting the latter to simple signals such as phase deviation, frequency, frequency ramp and sinusoidal signal it

  It is thus possible to resume the study of loops in re-

  a linear study, as for example the article "A Survey of Digital Phase Locked Loops" published by W.LINSEY, C.M. CHIE, Proceedings of the

IEEE, Vol.69, No.4, April 1981.

  The carrier recovery device as

  shown in Figure 4a has been tested and tested.

  which have validated the model of

is lying.

  In the case of the reception of symbols of a

  4-QAM type modulation in the presence of noise and for a signal-to-noise ratio of 15 dB in the presence of a frequency deviation, the carrier recovery is performed using a training sequence. The maximum frequency deviation encountered was chosen to correspond to a value Af.Ts = 0.1 whereas the monolateral noise band was imposed at a value Bl.Ts = 1.25 10-2.

  The result of the response of the recovery device

  carrier ration as shown in FIG.

  The value of the corrected phase error ed (n) as a function of the number of iterations is shown in FIG. 4f. While a synchronization through a

  conventional carrier recovery device

  non-linear training would require a training sequence

  wise very important, 20,000 samples with a

  sinusoidal detector, so that, on the contrary, it is possible

  4f, the response of the constitutive loop

  of the carrier recovery device, object of

  the present invention, with unfolding of the phase,

  responds substantially to the linear model. To ensure the convergence of the set, the number Na of learning symbols must be such that IEd (n) l <n / 4 for n

  > Na due to the symmetry of the QAM-4 constellation.

  The convergence of the device is obtained for Na = 170 samples, which represents a considerable gain by

compared to the sinusoidal detector.

  A preferred embodiment of a device

  carrier recovery according to the subject of the present invention will now be described in connection with

  Figure 5a and the following figures.

  FIG. 5a shows a carrier recovery device according to the device of the present invention as represented in FIG. 4a and

  in which the same references designate the same elements

  However, the phase-locked loop further includes an expander phase error signal whitening device sd (n) for generating, from said unfolded phase error signal, a signal. estimated unfolded phase error, denoted gd (n), for

the current sample.

  The blemish module of the unfolded phase error signal sd (n) is referenced 39 in FIG.

5a.

  In addition, the device represented in FIG. 5a comprises a phase correction module 40 of the received signal.

  corrected u (n) by the unfolded phase error signal.

  m d (n) to generate an estimated corrected received signal, denoted v (n). In this case, the corrected received signal estimated above

  v (n) is the best estimate of the current symbol and

  equates the relation (10): v (n) = u (n) exp (- jd (n))

  Thus, the modules for whitening the error signal

  Deployed phase signal sd (n) 39 and phase corrector module 40 allow, by submitting the estimated corrected received signal v (n) to the nonlinear decision process, in place

  and place the corrected received signal u (n), to generate a sym-

bole decided estimated, noted dv (n).

  As shown in a nonlimiting manner in FIG. 5a, the module 39 for bleaching the unfolded phase error signal comprises at least one linear prediction filter, denoted 39a, comprising a control input

  prediction error and receiving on a thread input

  tring the unfolded phase error signal sd (n). The linear prediction filter 39a outputs the estimated unfolded phase error signal êd (n + 1) for the sample following the current sample.

  In addition, the module 39 includes a delay circuit

  39b of a sampling period delivering from the estimated unfolded phase error signal d (n + 1), the estimated unfolded phase error signal gd (n) for

the current sample.

  Finally, the module 39 for bleaching the error signal

  The unfolded phase detector comprises a circuit 39c subtracting

  receiver, receiving the unfolded phase error signal sd (n)

  and the estimated unfolded phase error signal gd (n) and de-

  delivering a prediction error signal ep (n) to the prediction error prediction command input of the prediction filter

linear 39a.

  With regard to the correction module 40 of the

  phase of the corrected received signal u (n), the latter may

  ter, as represented in FIG. 5a, a module 40a for calculating a complex correction term, denoted exp (-jêd (n)),

  from the estimated unfolded phase error signal gd (n).

  The module 40a is followed by a multiplier module 40b

  complex of the corrected received signal u (n) receiving on a first

  first and second multiplication input the signal

  corrected receipt u (n) and the complex correction term pre-

  cited and delivering said estimated corrected received signal v (n).

  Comparative tests of a recovery device

  a conventional non-linear decision carrier arrangement and a carrier recovery device according to the subject of the present invention, wherein in addition a corrected phase error bleaching process has been introduced in accordance with the embodiment of the

Figure 5a, were made.

  Whereas, in the case of the implementation of a carrier recovery device by conventional nonlinear decision, the convergence of this device is

  obtained after about 15 000 symbols, the conversion time

  being therefore relatively important in the

  sure o the frequency difference in the conditions

  experiment accounted for only 2.5% of the

  sampling, the implementation of a process

* unfolding phase and a predictor filter

  as shown in Figure 5a has led to

  In the absence of a training sequence, there is almost instantaneous convergence, as shown in FIG. 5b, for the same QAM-4 modulation for Af.Ts = 0.025 and a signal-to-noise ratio of 15 dB. Sure

  Figure 5b shows the value of the error

  corrected phase error sd (n) and the error signal of pre-

  diction ep (n) as a function of the number of samples, respectively the value of the mean squared error, denoted EQM, in dB, as a function of the number of iterations,

  EQM = E [] dv (n) -v (n)], where E [.] Denotes the mathematical expectation

than.

  This value can be evaluated recursively by the relation: EQM (n) = X.EQM (n -1) + (1- -). d (n) - v (n)

with X = 0.99 and EQM (0) = 0.1.

  The predictor filter 39a consisted of a RIF filter with a Finite Impulse Response of two

  coefficients. The coefficients were adapted by an

  recursive least squares RCR gorithm. The instantaneous nature of the convergence of the device represented in FIG. 5a corresponds in fact to the convergence time of

  the MCR algorithm used in the prediction.

  Various indications will be given regarding

  relates to the robustness of synchronization.

  In many practical cases, the recovery phase

  rer obeys a complex model taking into account the drift

  oscillator frequency, which is reflected in the

  ception by a ramp of frequencies.

  In the presence of a frequency ramp, a

  conventional carrier recovery, that is to say only implementing a non-linear decision,

  has an operating threshold that depends on the geo-

  metry of the constellation. The steady-state phase error must therefore not exceed the limits of the

  range of linearity of the phase detector and, for a

  64-QAM type, this limit is given by the relation:

IE (n) <7.5 degrees.

  It is thus possible to define a value of

  limit of the tolerable frequency range for

  Such gain parameters as the G2 parameter of the phase locked loop constituting these conventional carrier recovery devices. For a gain G2 = 8.8910-5, the threshold limit value is of the order of, 8910-6 for the slope of the tolerable frequency ramp. With the implementation of a predictor filter as shown in FIG. 5a, the threshold disappears, the only limitation introduced being in the range of

phase detector.

  For a conventional linear tangent arc detector from -n to K, it is therefore possible to compensate for a frequency ramp whose limiting value is given by lr

+ G2.

  The implementation of a phase unfolding process in accordance with the subject of the present invention, makes it possible to extend the correction capabilities. It therefore appears that the process of phase unfolding is particularly remarkable and of major interest, even

  if the loop is not linear in the acquisition phase.

  Figure 5c shows the acquisition or con-

  vergence during a slope frequency ramp Q1 = 10-4

  with an arbitrary initial phase shift and a frequency deviation

  initial quence zero. In this case, the true phase signal

fie the relation: (n) = Q1 x n2

  n denoting the rank of the sample.

  On observing FIG. 5c, it can be seen that the phase error is stabilized and the acquisition obtained for a

  number of iterations less than 200.

  The carrier recovery process is thus made more robust when the phase error is stained in steady state, the coloring being introduced from the

does the frequency ramp.

  It thus appears that the implementation of a filter

  of linear prediction lies above all in the performance

  these of the latter in periods of difficult reception as the acquisition and variations of the phase model to recover. In a period of easy reception, steady state with a phase or frequency difference, the system with a linear predictor filter is suboptimal because the

  predictive filter increases the noise level, and the de-

  phase detector is also suboptimal. Thus, the linear prediction error filter can be used only in a so-called convergence mode and can thus be reversibly switched, if necessary, to a

  tracking mode that uses an optimal detector.

  Furthermore, if it is possible in the context of

  purpose of being confronted with frequency ramps

  these important, then, it is advantageous to use the unfolding of the phase in this specific mode. When the

  reception becomes easy, it is then possible to

  to the tracking mode using an

  timal, such as for example a detector delivering a phase error signal Emv = Im [u (n) d * (n)]. In this mode, the linear predictor filter becomes useless. Switching from the tracking mode to the acquisition mode, or vice versa, can be performed from the power of the error

  phase, which can be used to define the

  switchboard. The power of the phase error can be estimated recursively according to the relation (11): Ps (n) = 0.99PE (n-1) + 0.0 g12 (n)

  When the power of the phase error is

  below a certain threshold value, such as -23 dB for example, in M-AQ-64 modulation, it is then possible

to switch to the tracking mode.

  It has thus been described a method of unfolding a

  phase signal, a phase unfolding system

  and a carrier recovery device

  highly efficient to the extent that these developments make it possible to improve the estimation of a

  phase signal in a phase locked loop.

  In general, the process of unfolding

  phase allows operation of the feedback loop.

  phase rust in the linear domain thus simplifying the study of the loop and accelerating

  acquisition, that is to say the time of con-

  vergence, especially in the presence of a frequency deviation

important.

  Moreover, the introduction of a linear prediction error filter for whitening the phase error improves the phase estimation when the phase error is spectrally colored, i.e., in phase

  in some cases.

  Tests carried out have shown that,

  especially in the case of synchronization without learning sequence, the convergence is obtained after a few samples in the case of constant envelope modulation, such as a frequency modulation signal,

  whereas in the case of non-con-

  convergence, the convergence is significantly accelerated

  the ability to correct a frequency ramp.

quences are extended.

  The present invention thus makes it possible to accelerate the speed of convergence and to improve the robustness of the carrier recovery processes in the case of a supervised or self-learning reception. In any case, the carrier recovery devices have

  identical to the traditional recovery process

  carrier ration by non-linear decision in the

easy reception times.

Claims (7)

  1. Method of unfolding a phase signal   interval interval in which the amplitude is detected   g (n) of this signal by successive sampling,   in that: a) calculating the difference 8n, n-1 = 8 (n) -s (n-1) between each pair of successive samples formed by a current sample and an adjacent sample;   b) comparing this difference Èn, n-1 with a value of   representative of the equal amplitude value   at each interval, in order to detect a discontinuity   this signal and, in the presence of such disconti- nuity,   c) align the value of the sample, current   sample, and the value of the following samples, by shifting the value of   these samples the amplitude value equal to each   that interval and one builds a sequence of values   sampled $ d (n) corrected, which allows for   an unfolded signal whose range of unfolding is   equal to the sum of all the heights over which   the detection by successive sampling is carried out. 2. Method according to claim 1, characterized   in that it consists, following the detection of the am-   the amplitude E (n) of this phase signal by successive sampling:   - to memorize the value of the previously corrected sample   tooth Ed (n-1); to calculate the difference Oa (n) = s (n) - sd (n-1) between   couple of successive samples formed by the sample   amplitude current ú (n) and the previous corrected sample sd (n1); comparing this difference with the value zero and if this difference is greater than or equal to zero, Oa (n)> 0; calculating an offset value Ob (n) = rem (Oa (n) + p, 2p) -p, remainder of the division of the value Oa (n) + p by 2p decreased by the half-interval, and, if this difference is less than zero, Oa (n) <O, - calculating an offset value Ob (n) = rem (Oa (n) + p, 2p) + p, remainder of the division of the value Oa (n ) -p by 2p increased by the half interval; calculating the value of the corrected sample sd (n) for the current sample satisfying the relation sd (n) = sd (n-1) + Ob (n), sum of the preceding sample and the   offset value, depending on the sign of this diffi-   which makes it possible to establish the said sequence of   their iteratively corrected samplings by returning to the step of storing the value of the corrected sample current sd (n) for the next sample of amplitude s (n + 1), said sequence of values   corrected samples constituting the said de- folded.   3. System of linear phase unfolding of a continuous phase signal at intervals, this signal being   consisting of a series of digital samples of samples   current s (n), characterized in that, in order to de-   delivering an unfolded phase signal constituted by a sequence of corrected sample corrected samples current gd (n), this system comprises:   a subtractor circuit receiving, on a first   first input, said sequence of current sample digital samples E (n) and, on a second input, said sequence of corrected sample corrected samples   preceding Ed (n-1) prior to the corrected sample   Ed (n), said subtractor circuit delivering a signal   difference Oa (n) = g (n) - $ d (n-1) between the pair of samples   successive ticks formed by this current sample g (n) and this previous corrected sample Ed (n-1); means for calculating an offset value comprising: a comparator means of said difference signal at the zero value, delivering a value of sign k = 1 of this difference, and a circuit for calculating an offset value Ob (n) = rem (Oa (n) + kp, 2p) -kp, remainder of the division by 2p   the value of this difference, increased respectively   less the half-interval p depending on the   value of the sign of this difference, diminished   increased by the half-interval p as a function of   value of the sign of this difference, the calibration circuit   ass of an offset value outputting this offset value; summing means receiving, on a first input, said offset value Ob (n) = rem (Oa (n) + kp, 2p) -kp and, on a second input, said   following corrected samples of the previously corrected sample   tooth sd (n-1) prior to the corrected sample current Ed (n), said summing means delivering said following   corrected sample corrected samples   rifying the relation Ed (n) = Ob (n) + gd (n-1) constituting the- said unfolded phase signal;   - delaying means of a trading period   sampling receiving said sequence of corrected samples corrected sample current sd (n) and delivering said   following corrected samples of the previously corrected sample   tooth gd (n-1) prior to the corrected current sample   Ed (n) to said subtractor circuit and summing means.   4. Carrier recovery device of a   received, this received signal being constituted by a series of representative samples of a useful signal and an additive noise w (n) satisfying the relation: x (n) = ei (n) .d (n) + w (not)   4 (n) representing the parasitic phase argument of this   gnal received, n denoting the rank of the current sample, this device comprising a phase-locked loop allowing, from a parasitic phase value   estimated + (n), to generate a corrected received signal u (n),   estimating the relation u (n) = x (n) .exp (-j; (n)), estimation of a current symbol, to subject the corrected signal u (n) to a   non-linear decision process, to generate a sym-   decided decision (n), and the means of detecting   putting to submit this corrected signal u (n) and the symbol   decided (d) on a phase detection to generate a   Phase error signal s (n) between this corrected received signal   u (n) and the decided symbol d (n), this green loop   phase rusting making it possible to calculate, from this   phase error signal s (n), the phase argument para-   estimated site for the next sample of rank n + 1 following this current sample, from a loop filter H (z) = G G + 02 delivering a filtered phase error signal sf (n) and an integrating operator delivering   from this filtered phase error signal, said variable   their estimated parasitic phase for the next sample,   characterized in that it comprises at least means de-   phase detectors constituted by a linear phase unfolding system according to claim 3, said system receiving said corrected signal u (n) and said decided symbol d (n) and delivering an unfolded phase error signal sd (n), said phase locked loop for calculating from said unfolded phase error signal   sd (n) the estimated parasitic phase argument for this sample.   next round of rank n + 1 according to this sample rant.   5. Device according to claim 4, characterized   in that said phase locked loop   further comprises: - means for bleaching said unfolded linear phase error signal Ed (n), making it possible to generate from said unfolded phase error signal Ed (n), a   estimated unfolded phase error signal d (n) for the sample current tillon;   - phase correcting means of said signal   corrected u (n) by said unfolded phase error signal gd (n), to generate an estimated corrected received signal v (n), best estimate of the current symbol and verifying the relation v (n) = u (n) .exp (-jêd (n)), which allows by submission   said estimated corrected received signal v (n) to the process of determining   non-linear decision, in place of the signal received cor-   rigé u (n), to generate an estimated decided symbol dv (n).   6. Device according to claim 5, characterized   in that said means for bleaching said unfolded phase error signal comprise at least: - a linear prediction filter having a prediction error control input and receiving on   a filter input, said phase error signal   unfolded negative Ed (n), said linear prediction filter outputting said estimated unfolded phase error signal d (n + 1);   - a delay circuit of one trading period   leaching delivering from the phase error signal   estimated unfolded said unfolded phase error signal es-   timed Md (n) for the current sample; a subtractor circuit receiving said unfolded phase error signal sd (n) and said error signal   estimated unfolded phase Md (n) and delivering an error signal   predictor at said error control input of   prediction of the linear prediction filter.   7. Device according to one of claims 3 or   4, characterized in that said phase correcting means of said corrected received signal comprise: - means for calculating a complex correction term exp (-jd (n)) from said estimated unfolded phase error signal d ( not); complex multiplier means of the corrected received signal u (n) receiving on a first and a   second multiplication input, said received signal corri-   ge u (n) and said complex correction term exp (-jd (n))   and delivering said estimated corrected received signal v (n).