EP1173960A1

EP1173960A1 - Method and system for linear phase unwrapping

Info

Publication number: EP1173960A1
Application number: EP00920828A
Authority: EP
Inventors: Dominique Nussbaum
Original assignee: Telediffusion de France ets Public de Diffusion
Current assignee: Telediffusion de France ets Public de Diffusion
Priority date: 1999-04-23
Filing date: 2000-04-18
Publication date: 2002-01-23
Also published as: FR2792794A1; WO2000065796A1; FR2792794B1

Abstract

The invention concerns a method and a system for linear phase unwrapping by unfolding said phase signal and their use for recovering the carrier. The phase error signal ε(n) continuous by fixed or height Ai amplitude ranges is sampled. A computation (a) of the difference δn,n-1 = ε(n) - ε(n-1) between successive samples is carried out and the detection (b) of a discontinuity is performed by comparing that difference with a reference value Vref. An alignment (c) of the sample value ε(n) and the following samples on the sample value ε(n-1) enables to obtain a series of corrected sample values εd(n) constituting the unwrapped signal over an unwrapping range equal to the sum of the heights Ai. The invention is useful for the recovery of the carrier of a transmission signal on carrier frequency of telebroadcasting or the like.

Description

LINEAR PHASE DEPLOYMENT METHOD AND SYSTEM

The present invention relates to a method for unfolding a phase signal, to a linear phase unfolding system and to a corresponding carrier recovery device.

In analog frequency modulation broadcasting, a frequency difference results, after demodulation, in a DC component. This frequency difference or "detuning" is easy to correct, because it suffices to filter this continuous component. Such a correction process is carried out in all good quality analog receivers.

In the case of the transmission of a digital signal, the problem of carrier synchronization is much more critical, since a frequency deviation results in a rotation of the constellation of amplitude and phase states of the modulation considered, which makes any subsequent decoding impossible.

To ensure carrier recovery, various solutions have so far been proposed.

A first solution, as shown in FIG. 1 a, consists in carrying out a process directed by a non-linear decision (DD) applied to a signal u (n) corrected in phase from a signal received before recovery of the carrier x (n) = e ^{jφ (n} \ d (n) + w (n) where d (n) is the useful signal power equal to 1 and w (n) an additive white Gaussian noise of variance σ _^,. The corresponding device shown in Figure la comprises a ^'decision making, non-linear circuit, a phase detector, a loop filter, an integrator and a phase correction circuit delivering the signal corrected in phase u (n) from the signal received x (n).

The phase error, in the absence of noise, checks the relation ε (n) = φ (n) -φ (n) where φ (n) represents the phase of the received signal x (n) and φ (n) the estimation of it.

The loop filter H (z) is a low-pass filter whose transfer function is written:

H (z) = G ₁

1-z ^"

In FIG. 1a, K denotes the loop gain, K being able to be taken equal to 1, the scalar gain of the set being able to be included in the values of d and G ₂ . Such a device makes it possible to correct a phase shift between the received signal x (n) and a reference signal supplied either by a learning sequence or by the decision on the symbols.

As regards the phase detectors which may be used in these devices, they can detect the form:

with, for d (n) = d (n) u (n) d ^* (n) = | d (nj ² exp j (φ (n) - φ (n)) + w (n) d ^* (n) exp (- jφ (n)) where d ^* (n) ^* and (n) represent the complex expression conjugate of the decision and the respective useful signal ^¬.

Many other phase detectors are likely to be used as described for example in the thesis published by D. MOTTIER: "Combination of equalization, synchronization and channel decoding functions for digital transmissions at great spectral efficiency ", Doctoral thesis of the University of Rennes (France), Nov. 1997.

Under these conditions, if the phase error is small, φ (n) -φ (n) “l, and if the noise is low (| w (n) (/ | d (n) |)“ 1 l ' phase error ε (n) checks the relation:

with

where ι (n) denotes the imaginary part of w (n) d ^* (n) exp (-jφ (n)] = Im [w (n) d ^* exp (- jφ (n) j], the system represented in FIG. 1a can then be reduced to a linearized loop, as shown in FIG. 1b, the study of which in steady state can be reduced to that of a conventional linear looped system whose transfer function in closed loop verifies the relationship:

The use of this type of device as shown in FIGS. 1a and 1b is very widespread in carrier recovery systems in digital communication, due to the fact that loop structures have a certain number of advantages, such as low computational complexity, great simplicity of implementation and good performance under an established regime in the presence of a phase or frequency deviation.

However, this type of device has drawbacks.

First, the process is driven by non-linear decision, which excludes its use with weak signal-to-noise ratios. Such a situation causes propagation of errors and a significant deterioration in performance.

Secondly, such a system has drawbacks linked, no longer to decision-making, but to the use of a looped structure. The first of these drawbacks relates to the attachment, or acquisition, of the loop, in particular for large frequency deviations, this acquisition having the character of a slow and random phenomenon. Confer H. EYR et al. "Syn - chroniza tion in Digi tal Communica tions", Vol. 1, Wiley, 1990. In fact, if the frequency difference is too large, the linear model is no longer valid and the convergence or acquisition time increases significantly. This drawback appears to be of major importance for the use of looped structures for carrier recovery, such structures, for this reason, not being used in practice in the modes of packet transmission, for which direct structures or Feed Forward are used.

The second of these drawbacks relates to the absence of robustness of these systems in steady state, as soon as the phase to be compensated does not correspond to a phase and / or fixed frequency deviation, see the article entitled "A Survey of Digi tal Phase-Locked Loops "published by W. LINDSEY, CM. CHIE, Proceedings of the IEEE, Vol.69, No.4, Apr.1981. The object of the present invention is to remedy the drawbacks of the carrier recovery systems of the prior art mentioned above.

In particular, for this purpose, an object of the present invention is the implementation of a method of unfolding a phase signal making it possible, owing to this unfolding operation, the phase signal thus being rendered substantially continuous over any time interval of implementation, to make the phase detection conducted over this interval substantially linear. For the same purpose, an object of the present invention is also the implementation of a substantially linear phase unfolding system making it possible to deliver a corresponding unfolded phase signal.

Another object of the present invention is also the implementation, from a substantially linear phase unfolding system as mentioned above, of a device for recovering the carrier of a received signal whose speed of convergence, or acquisition, is significantly improved compared to that of the carrier synchronization devices of the prior art. The method of unfolding a phase signal con tinuous ^¬ intervals, obi and the invention proceeds wherein the amplitude ε is detected (n) of this signal by sam pling ^¬ successive, is characterized in that '' we calculate the difference δn, nl = ε (n) - ε (nl) between each pair of successive samples, formed by a current sample and an adjacent sample, we compare this difference δn, nl to a reference value representative of the amplitude value equal to each interval, in order to detect a discontinuity of this signal. In the presence of such a discontinuity, the value of the current sample, respectively adjacent, is aligned with the value of the following samples, by shifting the value of these samples by the amplitude value equal to each interval and constructing a series of sampled values εd (n) corrected. This makes it possible to deliver an unfolded signal whose unfolding range is equal to the sum of all the heights, over which detection by successive sampling is carried out. The linear phase unfolding system of a continuous phase signal by intervals, object of the present invention, this signal being constituted by a series of digital samples of current sample ε (n) is remarkable in that, in view to deliver an unfolded phase signal constituted by a series of corrected samples of current corrected sample εd (n), this system comprises a subtractor circuit receiving, on a first input, the series of digital samples of current sample ε ( n) and, on a second entry, the series of corrected samples of corrected sample precedes εd (nl) prior to the current corrected sample εd (n). This subtractor circuit delivers a difference signal θa (n) = ε (n) - εd (nl) between the pair of successive samples formed by the current sample ε (n) and the previous corrected sample εd (nl) . A module for calculating an offset value is provided, which comprises a comparator of the difference signal to the zero value, delivering a sign value k = ± 1 of this difference, and a circuit for calculating an offset value θb (n) = rem (θa (n) + kp, 2p) -kp, remainder of the division by 2p of the value of this difference, increased respectively decreased by the half-interval p according to the value of the sign of this difference , remains decreased respectively increased by the half-interval p as a function of the value of the sign of this difference, this circuit for calculating an offset value delivering this offset value. A summing module receives, on a first input, the offset value θb (n) = rem (θa (n) + kp, 2p) -kp and, on a second input, the series of corrected samples corrected previous εd (nl) prior to the current corrected sample εd (n). The summing module delivers the series of corrected samples of current sample εd (n) verifying the relation εd (n) = θb (n) + εd (nl) constituting the unfolded phase signal. A delay module for a sampling period receives the series of corrected samples of current corrected sample εd (n) and delivers the series of corrected samples of previous sample εd (nl) prior to the current corrected sample εd (n) to the subtractor and summing modules. The device for recovering the carrier of a received signal, following samples of current rank n, object of the invention, comprises a phase locked loop. This loop allows starting from an estimated parasitic phase value φ (n) to generate a corrected received signal u (n), u (n) = x (n) -exp (-jφ (n) J, x ( n) representing the received signal sum of a useful signal e ^jφ ^ -d (n) and an additive noise, (n) The entity φ (n) represents the parasitic phase argument of the received signal. corrected received signal, estimation of a current symbol, is subjected to a non-linear decision process to generate a decided symbol A phase detector module enables the corrected signal u (n) and the decided symbol d (n) to be subjected to phase detection to generate a phase error signal ε (n) between the corrected received signal u (n) and the decided symbol d (n). The phase locked loop is used to calculate, from the phase error signal ε (n), the parasitic phase argument estimated for the next sample of rank n + 1 according to this current sample from a filter

loop H (z) = G ₁ + ^ - delivering an error signal of

1-z filtered phase εf (n) and an integrating operator delivering, from the filtered phase error signal, the parasitic phase value estimated for the following sample. The carrier recovery device, object of the present invention, is remarkable in that the phase detector module is constituted by a linear phase unfolding system delivering a previously mentioned unfolded phase signal. This system receives the signal corrected u (n) and the decided symbol d (n), and delivers an unfolded phase error signal εd (n). The phase locked loop makes it possible to calculate, from the unfolded phase error signal εd (n), the parasitic phase argument estimated for the next sample of rank n + 1, according to this current sample.

The invention finds application to any receiver of a carrier frequency transmission signal, such as a radio or television signal. It will be better understood on reading the description and on observing the drawings below in which, in addition to FIGS. 1a and 1b relating to the prior art:

- Figure 2a shows a general flowchart illustrating the steps for implementing the method of unfolding a phase signal according to the subject of the present invention;

- Figure 2b shows a flowchart illustrating the steps for implementing the method of unfolding a phase signal according to the object of the present invention in a preferred non-limiting embodiment;

- Figure 2c shows, in the form of block diagrams, functional, a linear phase unfolding process, implementing the method illustrated in Figure 2b;

- Figure 3 shows the block diagram of a linear phase unfolding system in a hardware embodiment, operating in accordance with the steps of Figure 2b and the functional blocks illustrated in Figure 2c; - Figure 4a shows a carrier recovery device according to the object of the present invention;

- Figure 4b shows a detail of embodiment of Figure 4a;

- Figure 4c and Figure 4d show diagrams or diagrams for presenting a theoretical justification of the carrier recovery device illustrated in Figures 4a and 4b; - Figure 4e shows the response to a frequency difference of a carrier recovery device as shown in Figure 4a or 4b;

- Figure 4f shows the response of the carrier recovery device as shown in Figure 4a, in the case of a frequency difference Δf.Ts = 0.1 for a modulation of MAQ-4 type and a signal to noise ratio 15 dB;

- Figure 5a shows a carrier recovery device according to that shown in Figure 4a but in which a module for bleaching the corrected phase error has been introduced;

FIG. 5b represents a diagram of the corrected phase error value, of the value of the prediction error and of the mean square error in dB as a function of the number of iterations or of samples;

- Figure 5c shows an unfolded phase error diagram for a slope frequency ramp Ωi = 10 ^{~ 4} obtained through the implementation of a carrier recovery device as shown in Figure 5a. A more detailed description of the method for unfolding a phase signal, the unfolding system for linear phase and a carrier recovery device according to the object of the present invention will now be given in connection with Figures 2a, 2b and following. First, considerations for improving the phase locked loops will be given below.

As recalled with respect to the devices of the prior art, the carrier recovery process carried out by a non-linear decision can be seen in steady state as a phase-locked loop of conventional type.

It is therefore proposed to improve the estimation of the phase by the loop and then to apply these results to carrier recovery.

A phase locked loop is a looped structure allowing to find the phase value, and therefore the frequency value, of a signal embedded in noise. According to a first analysis, it is indicated that a linearized phase locked loop is similar to a carrier recovery device except for the phase detector. Indeed, in a phase locked loop, phase detection is performed on the signal u (n).

The acquisition time of a phase locked loop is generally evaluated for a given frequency difference. The phase signal then checks the relationship:

φ (n) = Ω ₀ nT (n) In this relation, Ω ₀ represents the reduced pulse deviation and T (n) is the unit step defined by T (n) = 0 if n <0 and T (n) = l otherwise.

Taking into account the previous relation, it is indicated that Ω ₀ = 2πΔfT _s where Δf is the frequency deviation considered and

T _s the signal sampling period.

For a sufficiently small frequency difference, the phase locked loop remains in the linear domain and in this case, the frequency difference is compensated by a second order loop and the phase error checks the relation (1) :

The phase error therefore appears as a damped sinusoid. In a linear regime, we note that the frequency difference only intervenes in the amplitude of the response. In the previous relation, α, β and θ are parameters of the phase locked loop. However, such a relation is only valid in the linearity range of the phase detector, that is to say for small frequency deviations. For example, the arc detector

tangent delivering a phase signal ε (n) = is linear for | ε (n) | <π.

On the contrary, when the frequency difference is too large, the above-mentioned linear model is no longer valid and any exact analytical study is made difficult because of the strong non-linearity of the acquisition period. In such a case, the simulation alone can give an evaluation of the performance of the phase locked loop.

With reference to the work of H. MEYR and others, published in the article entitled "Synchroniza tion in Digi tal Communica tions", Vol.l, iley, 1990, it is indicated that the acquisition time is proportional to the square of the frequency difference and appears in any case significantly higher than in the case of the linear model. Thus, in some cases, for a large frequency difference, the acquisition time can exceed several tens of thousands of samples.

In a certain number of applications such as for example the transmission of data in packets, such an acquisition time is unacceptable, the linear models of the prior art therefore not being able to be used.

With reference to the preceding considerations, it is indicated that the operation of a phase-locked loop in the linearity range of the loop is, on the one hand, simpler to study and, on the other hand, makes convergence, or acquisition, of this faster loop.

A subject of the present invention is therefore the implementation of a phase locked loop making it possible to present a range of linearity which can be made infinite, that is to say a range of linearity corresponding to the sum of all the intervals over which the detection by successive sampling of a continuous phase signal by intervals is carried out. It is thus understood that the range of linearity of the phase detection system, object of the present invention, can be made as large as necessary according to the necessities of the use of this loop, this range of linearity can therefore be qualified as infinite.

The above-mentioned object is achieved and achieved in accordance with the method which is the subject of the present invention, by a process of unfolding the phase signal, which makes it possible to linearize the corresponding phase detection system, as mentioned previously.

The method of unfolding a continuous phase signal at intervals, in accordance with the object of the present invention, will now be described in conjunction with FIGS. 2a and 2b.

Referring to FIG. 2a, it is indicated that the amplitude ε (n) of the phase signal considered is detected by successive sampling. There is thus a series of phase signal samples denoted ε (n), n denoting the rank of the current sample.

By continuous phase signal at intervals, it is indicated that the phase signal is continuous over ranges of fixed amplitude Ai, the amplitude of the phase signal varying between a minimum amplitude -p and a maximum amplitude + p over each of the intervals. A _x considered. It will be understood in particular that the method which is the subject of the present invention can be implemented for a linear phase signal over each corresponding interval A _x . In this case and by way of nonlimiting example, the value of ε (n) can be given by the relation relating to a conventional phase detector:

Im [u (n)] ε (n) = arctan Re [u (n) l With reference to FIG. 2a, following the sampling of the corresponding phase signal ε (n), the method of unfolding a phase signal, object of the present invention, consists in calculating, in a step a), the difference δn, nl = ε (n) -ε (nl) between each pair of successive samples formed by a current sample of rank n and an adjacent sample of rank n-1.

The aforementioned step a) is then followed by a step b) consisting in carrying out the detection of a discontinuity by comparing the difference δn, nl to a reference value, denoted Vref in FIG. 2a, δn, nl> Vref or δn, nl <-Vref. By way of nonlimiting example, it is indicated that the reference value can be constituted by any value greater than or equal to a value such as the half-amplitude of the fixed amplitude range Ai.

Step b) is then followed by a step c) consisting in carrying out an alignment of the values of the current sample ε (n) and of the following samples with the value ε (nl), which constitutes a sample prior to the current sample. The alignment process can be carried out by shifting the value of these samples by the amplitude value equal to each interval so as to unfold the signal, that is to say to remove substantially any discontinuity. Step c) is then completed by a process consisting in constructing a series of sampled values εd (n) corrected. This process carried out in step c) then makes it possible to deliver an unfolded signal, following a series of corrected samples εd (n) and whose unfolding range is equal to the sum of all the ranges noted A, and on which detection by sampling

successive is carried out.

The operating mode as shown in FIG. 2a for implementing the method which is the subject of the present invention, simply involves storing the sample ε (n-1) prior to the current sample of the phase signal before unfolding. Such an operating mode can be implemented without difficulty but it involves a double memorization, that is to say the memorization of the previous sample ε (nl) and of the current sample ε (n) of the phase signal not unfolded and of course the storage of the series of samples εd (n) constituting the unfolded signal.

A preferred embodiment of the method of unfolding a phase signal in accordance with the object of the present invention, allowing a practical embodiment of a phase unfolding system of the phase-locked loop type will now be given in link with Figure 2b. As shown in the aforementioned figure, in this preferred embodiment, the method of unfolding a phase signal, object of the present invention, following the detection of the amplitude ε (n) of the phase signal mentioned above by successive sampling, the phase signal being continuous over intervals i and having an amplitude 2p, consists in storing the value of the previous corrected sample εd (nl). Such an operation involves a negligible additional cost since the value of the previous corrected sample εd (nl) can be easily obtained from the result of sam ples ^¬ corrected successive constituent of the expanded signal. In FIG. 2b, the storage operation can be performed by applying a delay of a sampling period, denoted z ^-1 , in step 1001, to obtain the corresponding sampled value εd (nl) from the series of corrected samples εd (n).

Step 1001 is then followed by step 1002 consisting in calculating the difference verifying the relation (2): θa (n) = ε (n) - εd (n-l)

between the pair of successive samples formed by the current sample of amplitude ε (n) and the previous corrected sample εd (n-l).

Step 1002 is then followed by a step 1003 consisting in comparing this difference to the value zero by a comparison test of superiority or equality with this value zero. On a true response to the aforementioned test 1003, the method which is the subject of the present invention consists in calculating, in a step 1004, an offset value, noted θb (n), obtained by the remainder of the division of the value θa (n ) + p by the value 2p, this remainder being reduced by the i-interval p.

If on the contrary, the difference calculated in step 1003 is less than zero, strictly, that is to say θa (n) <0, the method which is the subject of the present invention consists in calculating this offset value, denoted θb (not), obtained by the remainder of the division of the value θa (n) -p by 2p increased by the half-interval p.

Thus, with reference to FIG. 2b, it is indicated that the offset value satisfies the relation (3):

If θa (n)> 0, θb (n) = rem (θa (n) + p, 2p) -p

or the relation (4): If θa (n) <0, θb (n) = rem (θa (n) -p, 2p) + p

In the preceding relations, it is indicated that the symbol rem (X, Y) represents the remainder of the division of X by Y.

The steps 1004 and 1005 for calculating the offset value are then followed by a step 1006 consisting in calculating the value of the corrected sample εd (n) for the current sample. This corrected sample value checks relation (5):

εd (n) = εd (n-l) + θb (n)

The above-mentioned phase signal unfolding process can be implemented provided that the detection of the unfolded phase signal ε (n) has a periodic and continuous phase characteristic at intervals. This is the case in particular of the arctangent function for example. Generally, we note 2p the period of the phase detector allowing to deliver the signal ε (n), for an arctangent detector, it comes p = π.

The method of unfolding a phase signal as shown in Figure 2b can be implemented by an iterative looped process as shown in Figure 2c.

In this case, for any unfolded phase signal ε (n), obtained under the aforementioned conditions of continuity and periodicity, the iterative process can be diagrammed by the loop represented in FIG. 2c in which a process of subtraction from each sample phase ε (n) of the corrected sample values εd (nl) previous is carried out, to obtain the difference value θa (n), then application to this difference value of a phase unfolding process to obtain the value of offset θb (n), and addition or accumulation to this first offset value of the value εd (nl) in accordance with equation (5) to obtain the current corrected sample value εd (n). A delay of a sampling period z ^'1 makes it possible to obtain the value of the corrected sample εd (nl) prior to the value of the corrected sample εd (n) current.

With reference to FIGS. 2b and 2c above, the method which is the subject of the present invention makes it possible to define a linear phase unfolding system, as shown in FIG. 3.

With reference to the above-mentioned figure, it is indicated that the phase signal being constituted by the series of digital samples of current sample ε (n), this system includes a subtractor circuit, denoted 1, receiving on a first input the series of digital samples of current sample ε (n) and on a second input, the subtraction input, the series of corrected samples of previous corrected sample εd (nl) prior to the current corrected sample εd (n). The subtractor circuit 1 thus delivers a difference signal verifying the relation (2), difference between the pair of successive samples formed by the current sample ε (n) of the unfolded phase signal and the previous corrected sample εd (nl) .

In addition, the linear phase unfolding system, object of the invention, comprises a module 2 for calculating an offset value, this offset value verifying the relationships (3) and (4) previously mentioned in the description.

The offset value calculation module 2 can comprise, as shown in FIG. 3 in a nonlimiting embodiment, a circuit 20 for comparing the difference signal θa (n) to the value 0, this comparator circuit 20 delivering a value of sign k = ± 1 of the aforementioned difference. The module 2 for calculating the offset value also includes a circuit 21 for calculating the offset value θb (n) verifying the relation (6):

θb (n) = rem (θa (n) + kp, 2p) -kp

This offset value is constituted by the remainder of the division by 2p of the value of this difference, increased respectively decreased by the half-interval p as a function tion of the value of the sign of the aforementioned difference, this remainder being decreased respectively increased by the half-interval p as a function of the value of the sign of the aforementioned difference. The circuit 21 for calculating the offset value and the module 2 for calculating the offset value deliver the above-mentioned offset value θb (n). A summing circuit 3 receives on a first input the above-mentioned offset value θb (n) and on a second input the series of corrected samples of previous corrected sample εd (nl) prior to the current corrected sample. The summing circuit 3 delivers the series of corrected samples of current corrected sample εd (n) verifying the relation (5) previously mentioned in the description.

Finally, a delay circuit of a sampling period, circuit 4, receives the series of corrected samples of current corrected sample εd (n) and delivers the series of corrected samples of previous corrected sample εd (nl) to the current corrected sample εd (n) at the subtractor circuit 1, that is to say at the subtraction input of the aforementioned subtractor circuit, and at the summing circuit 3 previously mentioned.

A more detailed description of a device for recovering the carrier of a received signal, in accordance with the object of the present invention, will now be given in conjunction with FIGS. 4a, 4b and 4c.

FIG. 4a shows a device for recovering the carrier of a received signal, in accordance with the object of the present invention, in which this received signal x (n) consists of a series of representative samples a useful signal and an additive noise w (n). The received signal thus checks the relation (7): x (n) = e ^{jφ (n)} .d (n) + w (n)

In this relation, φ (n) represents the parasitic phase argument of this received signal, n denotes the rank of the current sample.

The carrier recovery device, object of the present invention, comprises a phase locked loop making it possible, from an estimated parasitic phase value φ (n), to generate, received a multiplier circuit 30, a received signal corrected u (n), checking the relation: u (n) = x (n) .exp (-jφ (n)) this corrected received signal consisting of an estimation of a current symbol. The phase locked loop allows the corrected signal u (n) to be subjected to a non-linear decision process 32a, 32b, to generate a decided symbol d (n). A phase detector module enables the corrected signal u (n) and the decided symbol d (n) to be subjected to phase detection to generate a phase error signal ε (n) between this received corrected signal u (n) and the decided symbol d (n). The phase locked loop makes it possible to calculate, from the phase error signal ε (n), the parasitic phase argument estimated for the next sample of rank n + 1 according to the current sample, from shot of a loop filter bearing the references 34, 35 and - _* denoted H (z) = G, H - -. Loop filter outputs signal

1-z ^"1 filtered phase error εf (n) and an integrating operator bearing the references 36, 37 delivers, from the signal filtered phase error εf (n), the parasitic phase value estimated for the following sample. The operator 38 delivers the correction term to the multiplier circuit 30. According to a particularly remarkable aspect of the carrier recovery device, object of the present invention, as shown in FIG. 4a, the phase detector module 33 consists of a linear phase unfolding system ΔΣ as described previously in the description and represented for example in FIG. 3. The phase detector module 33 receives the corrected signal u (n), in particular the real part and the imaginary part of this last by modules 31a, 31b, as well as the decided symbol d (n) obtained after a non-linear decision on the real and imaginary parts of the signal u (n) as shown in FIG. 4a previously mentioned. In FIG. 4a, the linear phase unfolding system is denoted ΔΣ. It delivers an unfolded phase error signal, noted εd (n), replacing the phase error signal ε (n) of the devices of the prior art.

The phase locked loop as shown in FIG. 4a then makes it possible to calculate, from said unfolded phase error signal εd (n), the parasitic phase argument estimated for the next sample of rank n + 1 according to the current sample.

A theoretical justification of the operating mode of the carrier recovery device represented in FIG. 4a will now be given in conjunction with FIGS. 4b, 4c and 4d. For an arctangent type phase detector, the phase error ε (n) checks the relationship:

Im [u (n) d * (n)] ε (n) = arctan Re [u (n) d * (n)]

This phase error can be unfolded as shown in FIG. 4b to provide the unfolded phase error εd (n).

With reference to FIG. 4c, it is indicated that the operation of the phase-locked loop allowing the production of the carrier recovery device according to the object of the present invention and as shown in FIG. 4c, is considerably simplified. Indeed, if we consider the set represented in Figure 4c, for a signal r (n) = e ^{jφ (n)} + w (n) where φ (n) represents the phase of the useful signal and w (n) a noise signal, this assembly, incorporating the functional elements incorporated in the phase-locked loop represented in FIG. 4a constituting the carrier recovery device, object of the present invention, comprises the detection system of argument of the corrected signal u (n) and the linear phase unfolding system ΔΣ in accordance with the object of the present invention, making it possible to deliver the corrected phase error signal εd (n) as well as the locked loop phase proper, comprising the loop filter and the integrator system. Thus, the phase correction system previously mentioned in the description, can be reduced to the assembly represented in FIG. 4d, which constitutes a sensitive block definitely linear with respect to the phase arguments, parasitic phase Φ (n) and estimated parasitic phase Φ (n).

Indeed, with reference to FIG. 4d, the corrected phase error signal εd (n) checks the relation (8):

εd (n) = Φ (n) -Ô (n)

In this relation, the value of the corrected phase error εd (n) is linear compared to the parasitic phase Φ (n) as well as compared to the estimated parasitic phase φ (n). Thus, the response of the phase locked loop constituting the carrier recovery device, object of the present invention, during a frequency difference Δf corresponding to the value Ω ₀ previously mentioned in the description can be written according to the relation (9):

2 sin (nθ) εd (n) = Ω ₀ (α ² + β ² ) ^{n /}

It can thus be seen that the pulse deviation Ω ₀ = 2πΔfT _s occurs only in the amplitude of the response to the frequency deviation and the time constant of the response depends only on the parameters α, β and θ of the filter. loop.

In FIG. 4e, the response of the phase locked loop constituting the carrier recovery device, object of the present invention, represented in FIG. 4a, has been represented for various deviations of frequency. quence in the absence of noise and with a zero initial phase difference.

By observing the above-mentioned figure, it can be seen that the phase unfolding phase signal phase allows the implementation of an operation of the loop in linear mode regardless of the frequency difference, the carrier acquisition being obtained after a number of iterations not exceeding 300, this operation thus making it possible to simplify the study of the convergence of the phase locked loop and of the carrier acquisition device while considerably increasing the acquisition speed of the latter.

Thus, according to a particularly remarkable aspect of the carrier recovery device, object of the present invention, for studying the response of the latter and of the constituent phase-locked loop of the latter to simple signals such as deviation of phase, frequency, frequency ramp and sinusoidal signal, it is thus possible to resume the study of loops in linear regime, study as carried out for example in the article entitled "A Survey of Digi tal Phase Locked Loops" published by .LINSEY, CM. CHIE, Proceedings of the IEEE, Vol. 69, No. 4, April 1981. The carrier recovery device as shown in FIG. 4a was the subject of tests and simulations which were able to validate the operating model. .

When receiving symbols from an MAQ-4 modulation in the presence of noise and for a signal-to-noise ratio of 15 dB in the presence of a deviation of frequency, carrier recovery is performed using a learning sequence. The maximum frequency difference encountered was chosen so as to correspond to a value Δf.T _s = 0.1 while the monolateral noise band was imposed at a value B1.T _S = 1.25 10 ^"2 .

The result of the response of the carrier recovery device as shown in FIG. 4a, response in value of the corrected phase error εd (n) as a function of the number of iterations is represented in FIG. 4f. While synchronization via a conventional carrier recovery device with non-linear decision would require a very large learning sequence, 20,000 samples with a sinusoidal detector, as can instead be obtained. server in FIG. 4f, the response of the constituent loop of the carrier recovery device, object of the present invention, with unfolding of the phase, corresponds substantially to the linear model. To ensure the convergence of the set, the number N _a of learning symbols must be such that | εd (n) | <π / 4 for n> N _a due to the symmetry of the constellation MAQ-4. The convergence of the device is obtained for N _a = 170 samples, which represents a considerable gain compared to the sinusoidal detector. A preferred embodiment of a carrier recovery device according to the object of the present invention will now be described in connection with FIG. 5a and the following figures.

FIG. 5a shows a carrier recovery device in accordance with the device which is the subject of the present invention as shown in FIG. 4a and in which the same references designate the same elements but in which the phase-locked loop further comprises a device for whitening the unfolded phase error signal εd (n) making it possible to generate, from the error signal of above unfolded phase, an estimated unfolded phase error signal, denoted εd (n), for the current sample.

The bleaching module of the unfolded phase error signal εd (n) bears the reference 39 in FIG. 5a.

In addition, the device represented in FIG. 5a comprises a module 40 phase corrector of the received signal corrected u (n) by the estimated unfolded phase error signal εd (n) to generate an estimated corrected received signal, noted v (n ). In this case, the aforementioned estimated corrected received signal v (n) is the best estimate of the current symbol and verifies the relation (10):

v (n) = u (n) exp (-jεd (n))

Thus, the whitening modules of the unfolded phase error signal εd (n) 39 and phase corrector module 40 allow, by submitting the estimated corrected received signal v (n) to the non-linear decision process, instead of the received signal corrected u (n), to generate an estimated decided symbol, noted dv (n).

As shown in a nonlimiting manner in FIG. 5a, the module 39 for bleaching the unfolded phase error signal comprises at least one linear prediction filter, noted 39a, comprising a control input error message and receiving the unfolded phase error signal εd (n) on a filter input. The linear prediction filter 39a outputs the estimated unfolded phase error signal εd (n + l) for the sample according to the current sample.

In addition, the module 39 includes a delay circuit 39b of a sampling period delivering from the estimated unfolded phase error signal εd (n + l), the estimated unfolded phase error signal εd (n) for the current sample.

Finally, the module 39 for bleaching the unfolded phase error signal comprises a subtractor circuit 39c, receiving the unfolded phase error signal εd (n) and the estimated unfolded phase error signal εd (n) and de - delivering a prediction error signal e _p (n) to the prediction error control input of the linear prediction filter 39a.

As regards the corrector module 40 of the phase of the corrected received signal u (n), this can include, as shown in FIG. 5a, a module 40a for calculating a complex correction term, noted exp (-jεd (n)), from the estimated unfolded phase error signal εd (n). The module 40a is followed by a module 40b complex multiplier of the corrected received signal u (n) receiving on a first and a second multiplication input the corrected received signal u (n) and the abovementioned complex correction term and delivering said estimated corrected received signal v (n).

Comparative tests of a conventional nonlinear decision carrier recovery device and a carrier recovery device conforming to the object of the present invention, in which in addition a process for laundering the corrected phase error has been introduced in accordance with the embodiment of Figure 5a, have been carried out. Whereas, in the case of the implementation of a carrier recovery device by conventional nonlinear decision, the convergence of this device is obtained after approximately 15,000 symbols, the convergence time being therefore relatively long in the measurement where the frequency deviation in the experimental conditions represented only 2.5% of the sampling frequency, the implementation of a phase unfolding process and a linear prediction filter as well that represented in FIG. 5a made it possible to obtain, in the absence of training sequence, an almost instantaneous convergence, as represented in FIG. 5b, for the same modulation of the MAQ-4 type for Δf.T _s = 0.025 and a signal-to-noise ratio of 15 dB. In FIG. 5b, the value of the corrected phase error εd (n) and of the prediction error signal e _p (n) are plotted respectively according to the number of samples, respectively the value of l '' mean square error, denoted EQM, in dB, as a function of the number of iterations,

2

EQM = E [d _v (n) - v (n)], E [.] Denoting mathematical expectation.

This value can be evaluated recursively by the relation:

EQM (n) = λ.EQM (n - 1) + (1 - λ) .d _v (n) - v (n)

with λ = 0.99 and EQM (0) = 0.1. The predictor filter 39a consisted of a finite impulse response RIF type filter with two coefficients. The coefficients were adapted by an MCR recursive least squares algorithm. The instantaneous nature of the convergence of the device represented in FIG. 5a in fact corresponds to the convergence time of the MCR algorithm used in the prediction.

Different indications will be given with regard to the robustness of the synchronization. In many practical cases, the phase to be recovered obeys a complex model taking into account the frequency drift of the oscillators, which results in reception by a frequency ramp.

In the presence of a frequency ramp, a conventional carrier recovery device, that is to say implementing only a non-linear decision, has an operating threshold which depends on the geometry of the constellation. The phase error in steady state must therefore not exceed the limits of the linearity range of the phase detector and, for a modulation of MAQ-64 type, this limit is given by the relation: fε (n) | <7.5 degrees.

It is thus possible to define a limit threshold value of the tolerable frequency ramp for various gain parameters such as the parameter G ₂ of the phase-locked loop constituting these conventional carrier recovery devices. For a gain G ₂ = 8.8910 ^"5 , the threshold limit value is of the order of 5.8910 ^{~ 6} for the slope of the tolerable frequency ramp.

Thanks to the implementation of a predictor filter as shown in FIG. 5a, the threshold disappears, the only limitation introduced residing in the linearity range of the phase detector.

For a conventional detector of linear tangent arc type from -π to π, it is therefore possible to compensate for a frequency ramp whose limit value is given by π - ± -G,.

2 ²

The implementation of a phase unfolding process in accordance with the object of the present invention further enables the correction capacities to be extended. It therefore appears that the phase unfolding process is particularly remarkable and of major interest, even if the loop is not linear in the acquisition phase.

FIG. 5c represents the acquisition or the convergence during a frequency ramp with a slope Ω _x = 10 ^"4 with an arbitrary initial phase shift and a zero initial frequency difference. In this case, the phase signal checks the relationship :

n denoting the rank of the sample. Upon observation of FIG. 5c, it can be seen that the phase error is stabilized and the acquisition obtained for a number of iterations less than 200.

The carrier recovery process is therefore made more robust when the phase error is colored. in steady state, the coloring being introduced due to the frequency ramp.

It thus appears that the implementation of a linear prediction filter mainly resides in the performances of the latter in periods of difficult reception such as the acquisition and the variations of the phase model to be recovered.

During an easy reception period, steady state with a phase or frequency deviation, the system fitted with a linear predictor filter is suboptimal, because the predictor filter increases the noise level, and the phase detector is also under -optimal. Thus, the linear prediction error filter can only be used in a so-called convergence mode and can thus be switched reversibly, if necessary, to a tracking mode which uses an optimal detector.

In addition, if it is possible in the context of the intended application to be confronted with significant frequency ramps, then it is advantageous to use the unfolding of the phase in this specific mode. When reception becomes easy, it is then possible to switch to the tracking mode which uses an optimal detector, such as for example a detector delivering a phase error signal ε _mv = Im [u (n) d * (n )]. In this mode, the linear predictor filter becomes useless. Switching from tracking mode to acquisition mode, or vice versa, can be carried out from the power of the phase error, which can be used to define the switching criterion. The power of the phase error can be recursively estimated according to equation (11): Pε (n) = 0.99Pε (n - 1) + O.Olε ² (n)

When the power of the phase error is lower than a certain threshold value, such as -23 dB for example, in M-AQ-64 modulation, it is then possible to switch to tracking mode.

We have thus described a method of unfolding a phase signal, a linear phase unfolding system and a carrier recovery device which are particularly efficient insofar as these developments make it possible to improve the estimation of a signal. phase in a phase locked loop.

In general, the phase unfolding process allows the phase-locked loop to operate in the linear domain, thereby simplifying the study of the loop and considerably speeding up acquisition, that is to say the convergence time, in particular in the presence of a large frequency difference.

Furthermore, the introduction of a linear prediction error filter making it possible to whiten the phase error improves the estimation of the phase when the phase error is spectrally colored, that is to say in phase. acquisition and steady state in some cases.

Tests carried out have made it possible to show that, in particular in the case of synchronization without learning sequence, convergence is obtained after a few samples in the case of modulation with constant envelope, such as a signal with frequency modulation, then that in the case of modulation with an inconsistent envelope Aunt, convergence is accelerated significantly and the correction capabilities of a frequency ramp are extended.

The present invention thus makes it possible to accelerate the speed of convergence and to improve the robustness of the carrier recovery processes in the case of a supervised or self-taught reception. In all cases, the carrier recovery devices exhibit performances identical to the conventional process of carrier recovery by non-linear decision in the periods of easy reception.

Claims

1. Method of unfolding a continuous phase signal at intervals in which the amplitude ε (n) of this signal is detected by successive sampling and a series of sampled values ε (d) corrected by alignment of the value of the current sample respectively of the adjacent sample, and of the value of the following samples, by shifting the value of these samples and the amplitude value equal to each interval, characterized in that the latter consists in: memorizing the value of the previous corrected sample εd (nl); to calculate the difference θa (n) = ε (n) - εd (nl) between the pair of successive samples formed by the current sample of amplitude ε (n) and the previous corrected sample εd (nl) ; comparing this difference to the value zero and if this difference is greater than or equal to zero, θa (n)>0; - to calculate an offset value θb (n) = rem (θa (n) + p, 2p) -p, rest of the division of the value θa (n) + p by 2p minus the half interval, and, if this difference is less than zero, θa (n) <0, to calculate an offset value θb (n) = rem (θa (n) + p, 2p) + p, rest of the division of the value θa (n) -p by 2p increased by the half interval; to calculate the value of the corrected sample εd (n) for the current sample verifying the relation εd (n) = εd (nl) + θb (n), sum of the previous sample and the offset value, depending on the sign of the dif ference ^¬, thereby to establish said series of sampled will ^¬ their corrected iteratively by returning to the step of storing the sample value corrected current εd ( n) for the following sample of amplitude ε (n + l), said series of corrected sampled values constituting said unfolded signal.

2. Linear phase unfolding system of a continuous phase signal at intervals, this signal being constituted by a series of digital samples of current sample ε (n), characterized in that, with a view to delivering a signal of unfolded phase consisting of a series of corrected samples of current corrected sample εd (n), this system includes:

a subtractor circuit receiving, on a first input, said series of digital samples of current sample ε (n) and, on a second input, said series of corrected samples of corrected sample previous εd (nl) prior to l corrected current sample εd (n), said subtractor circuit delivering a difference signal θa (n) = ε (n) -εd (nl) between the pair of successive samples formed by this current sample ε (n) and this corrected sample previous εd (nl); means for calculating an offset value comprising:

"means for comparing said difference signal to the value zero, delivering a sign value k = ± l of this difference, and ¹ a circuit for calculating an offset value θb (n) = rem (θa (n) + kp, 2p) -kp, rest of the division by 2p of the value of this difference, increased respectively ^¬ less by half -interval p as a function of the value of the sign of this difference, decreased respecti ^¬ vely increased by the half-interval p as a function of the value of the sign of this difference, the circuit for calculating an offset value delivering this offset value ; - summing means receiving, on a first input, said offset value θb (n) = rem (θa (n) + kp, 2p) -kp and, on a second input, said series of corrected samples of corrected sample previous εd (nl) prior to the current corrected sample εd (n), said summing means delivering said series of corrected samples of current corrected sample verifying the relation εd (n) = θb (n) + εd (nl) constituting said unfolded phase signal;

- means delaying a sampling period receiving said series of corrected samples of current corrected sample εd (n) and delivering said series of corrected samples of previous corrected sample εd (nl) prior to current corrected sample εd (n) to said subtracting circuit and summing means.

3. Device for recovering the carrier of a received signal, this received signal consisting of a series of samples representative of a useful signal and of an additive noise w (n) verifying the relation:

x (n) = e ^{jφ (π)} .d (n) + w (n) φ (n) representing the parasitic phase argument of this received signal, n designating the rank of the current sample, this device comprising a phase locked loop allowing, from an estimated parasitic phase value φ (n ), generate a corrected received signal u (n), checking the relation u (n) = x (n) .exp (-jφ (n)), estimation of a current symbol, submit the corrected signal u ( n) to a non-linear decision process, to generate a decided symbol d (n), and phase detector means allowing this corrected signal u (n) and the decided symbol d (n) to be detected phase to generate a phase error signal ε (n) between this corrected received signal u (n) and the decided symbol d (n), this phase locked loop making it possible to calculate, from this error signal phase ε (n), the parasitic phase argument estimated for the next sample of rank n + 1 according to this current sample, from a filter of

loop H (z) = G, + - - delivering an error signal of

1-z ^"1 filtered phase εf (n) and of an integrating operator delivering from this filtered phase error signal said parasitic phase value estimated for the following sample, characterized in that it comprises at least phase detector means constituted by a linear phase unfolding system according to claim 3, said system receiving said corrected signal u (n) and said decided symbol d (n) and delivering an unfolded phase error signal εd (n ), said phase locked loop making it possible to calculate from said unfolded phase error signal εd (n) the estimated parasitic phase argument for this ^¬ sam ple following of rank n + 1 following this sample neck ^¬ rant.

4. Device according to claim 3, characterized in that said phase-locked loop further ^comprises :

means for bleaching said unfolded linear phase error signal εd (n), making it possible to generate, from said unfolded phase error signal εd (n), an estimated unfolded phase error signal εd (n ) for the current sample;

- phase correcting means of said received received signal corrected u (n) by said unfolded phase error signal εd (n), to generate an estimated corrected received signal v (n), best estimation of the current symbol and verifying the relation v (n) = u (n) .exp (-jεd (n)), which allows by submission of said estimated corrected received signal v (n) to the non-linear decision process, in place of the corrected received signal u (n ), to generate a decided symbol estimated dv (n).

5. Device according to claim 4, characterized in that said means for whitening said unfolded phase error signal comprise at least:

a linear prediction filter comprising a prediction error control input and receiving on a filtering input said unfolded linear phase error signal εd (n), said linear prediction filter outputting said error signal estimated unfolded phase εd (n + l);

a circuit delaying a sampling period delivering from the phase error signal unfolded estimated said estimated unfolded phase error signal εd (n) for the current sample;

a subtractor circuit receiving said unfolded phase error signal εd (n) and said estimated unfolded phase error signal εd (n) and delivering a prediction error signal to said prediction error control input of the linear prediction filter.

6. Device according to one of claims 2 or 3, characterized in that said phase correcting means of said corrected received signal comprise:

- means for calculating a complex correction term exp (-jεd (n)) from said estimated unfolded phase error signal εd (n);

- complex multiplier means of the corrected received signal u (n) receiving on a first and a second multiplication input said corrected received signal u (n) and said complex correction term exp (-jέd (n)) and delivering said received signal estimated corrected v (n).