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FR2792760B1 - Memoire a reglage optimise des instants de precharge - Google Patents

Memoire a reglage optimise des instants de precharge

Info

Publication number
FR2792760B1
FR2792760B1 FR9905328A FR9905328A FR2792760B1 FR 2792760 B1 FR2792760 B1 FR 2792760B1 FR 9905328 A FR9905328 A FR 9905328A FR 9905328 A FR9905328 A FR 9905328A FR 2792760 B1 FR2792760 B1 FR 2792760B1
Authority
FR
France
Prior art keywords
preloading
moments
setting memory
optimized setting
optimized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR9905328A
Other languages
English (en)
Other versions
FR2792760A1 (fr
Inventor
Christophe Frey
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR9905328A priority Critical patent/FR2792760B1/fr
Priority to US09/556,044 priority patent/US6424580B1/en
Publication of FR2792760A1 publication Critical patent/FR2792760A1/fr
Application granted granted Critical
Publication of FR2792760B1 publication Critical patent/FR2792760B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
FR9905328A 1999-04-23 1999-04-23 Memoire a reglage optimise des instants de precharge Expired - Lifetime FR2792760B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR9905328A FR2792760B1 (fr) 1999-04-23 1999-04-23 Memoire a reglage optimise des instants de precharge
US09/556,044 US6424580B1 (en) 1999-04-23 2000-04-21 Memory with an optimized setting of precharge times

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9905328A FR2792760B1 (fr) 1999-04-23 1999-04-23 Memoire a reglage optimise des instants de precharge

Publications (2)

Publication Number Publication Date
FR2792760A1 FR2792760A1 (fr) 2000-10-27
FR2792760B1 true FR2792760B1 (fr) 2001-08-17

Family

ID=9544923

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9905328A Expired - Lifetime FR2792760B1 (fr) 1999-04-23 1999-04-23 Memoire a reglage optimise des instants de precharge

Country Status (2)

Country Link
US (1) US6424580B1 (fr)
FR (1) FR2792760B1 (fr)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4522623B2 (ja) * 2001-09-17 2010-08-11 ルネサスエレクトロニクス株式会社 遅延制御装置
US6762961B2 (en) 2002-04-16 2004-07-13 Sun Microsystems, Inc. Variable delay compensation for data-dependent mismatch in characteristic of opposing devices of a sense amplifier
US7177201B1 (en) 2003-09-17 2007-02-13 Sun Microsystems, Inc. Negative bias temperature instability (NBTI) preconditioning of matched devices
US7164612B1 (en) 2003-10-10 2007-01-16 Sun Microsystems, Inc. Test circuit for measuring sense amplifier and memory mismatches
US7020035B1 (en) 2003-10-10 2006-03-28 Sun Microsystems, Inc. Measuring and correcting sense amplifier and memory mismatches using NBTI
KR100539252B1 (ko) * 2004-03-08 2005-12-27 삼성전자주식회사 데이터 버스 및 커맨드/어드레스 버스를 통해 전송되는신호의 충실도를 향상시킬 수 있는 메모리 모듈 및 이를포함하는 메모리 시스템
US8335115B2 (en) 2004-12-30 2012-12-18 Samsung Electronics Co., Ltd. Semiconductor memory module and semiconductor memory system having termination resistor units
US7996590B2 (en) 2004-12-30 2011-08-09 Samsung Electronics Co., Ltd. Semiconductor memory module and semiconductor memory system having termination resistor units
US9443571B2 (en) * 2014-09-02 2016-09-13 Kabushiki Kaisha Toshiba Semiconductor memory, memory system and method of controlling semiconductor memory

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5819793A (ja) * 1981-07-27 1983-02-04 Toshiba Corp 半導体メモリ装置
US5742557A (en) * 1996-06-20 1998-04-21 Northern Telecom Limited Multi-port random access memory
US5734613A (en) * 1996-06-20 1998-03-31 Northern Telecom Limited Multi-port random access memory
KR19990069337A (ko) * 1998-02-06 1999-09-06 윤종용 복합 반도체 메모리장치의자기 테스트 회로 및 이를 이용한 자기 테스트 방법

Also Published As

Publication number Publication date
US6424580B1 (en) 2002-07-23
FR2792760A1 (fr) 2000-10-27

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