FR2641108A1 - Display device having a cathode ray tube screen - Google Patents

Abstract

Flat cathode ray tube screen which includes an electron-emitting planar array and a matrix of anodes 5. Each anode 5 is coupled to a line conductor 50 via an insulating layer 51 acting as a storage capacitor. Each anode 5 is also coupled via a diode 53, 54, 55 to a line conductor 52. The storage capacitor enables the luminance to be considerably increased. Applications: large-area screens (> 1 m<2>).

Description

DISPLAY DEVICE
WITH CATHODIC SCREEN
The invention relates to a cathode-ray display device and in particular to a flat-screen display device.

We describe a cathode ray display device in which the display is by logical addressing on the anode rather than by deflection of a cathode beam. This process allows the device to be considerably flatter than a scanning screen and therefore to produce screens of very large dimensions for a reasonable weight.

In the field of cathode beam viewing screens, it is known, in addition to beam deflection devices, two embodiments of flat screens
- cold cathode screens using the field effect of a tip to extract electrons
- Linear or Vacuum filament screens
Fluorescent Display.

The only known addressing mode is based on row-column multiplexing using the rectifying diode effect formed by the intersection of the cathode and the addressed anode or the gate effect of the stripping electrode. spiked cathodes. The drawback of this method is the low addressing time and therefore the low brightness of the screen thus addressed.

The invention relates to a different screen structure which makes it possible to avoid this drawback.

The invention therefore relates to a cathode-ray display device comprising
a flat-shaped display screen connected in a sealed manner to a flat surface of a substrate and defining therewith a sealed enclosure constituting the interior of the display device with a cathode-ray screen
- a lattice of conductive wires constituting the cathode of the device brought to a determined potential and arranged in the enclosure parallel to the flat faces of the substrate and of the screen
- a matrix of anodes arranged on the flat face of the substrate, in rows and columns, characterized in that it also comprises
- line conductors arranged on the flat face of the substrate
- capacitors each connecting an anode to a line conductor
- column conductors arranged on the flat face of the substrate and insulated from row conductors
- diodes each connecting an anode to a column conductor.

The various objects and characteristics of the invention will appear in more detail in the description which follows, given by way of example, with reference to the appended figures which represent
- Figure 1, a sectional view of a flat screen to which the invention is applied;
FIG. 2, an equivalent electrical circuit representing an embodiment of a display screen according to the invention;
FIG. 3, a perspective view of a display screen according to the invention;
- Figure 4, an alternative embodiment of the screen of Figure 3
FIG. 5, a row-column addressing diagram of the screen according to the invention ;;
FIG. 6, a diagram making it possible to evaluate the efficiency of the thermionic emission of a screen according to the invention
- Figure 7, an embodiment of the cathode device
- Figure 8, an alternative embodiment of the cathode device of Figure 6.

Figure 1, helps to understand the operation of a VFD. Such a device comprises a vacuum chamber 3 produced by a substrate 2 and part 1 of the screen acting as a viewing tube. It further comprises, on the face 20 of the substrate 2, anodes 5. Between the anodes 5 and the display face of the screen is an array of cathodes 4 brought to a potential + V by a source S.

In the vacuum chamber, the cathode 4 is heated by the Joule effect, consisting of a mesh of fine wires covered with an electro-emissive oxide such as thorium oxide. This cathode is brought to a positive potential relative to the anode 5 which receives electrons and emits light by electroluminescence. The position of the observer is preferably on the side of the cathode so as to be able to deposit the anode circuit on any type of material, even opaque. The potential separating the anode from the cathode is always less than the point where the secondary emission from the anode would be greater than the reception of electrons However, the secondary emission effect is taken advantage of to reduce the currents of anodic addressing.

FIG. 2 represents an electric diagram of an exemplary embodiment of a display screen according to the invention and more precisely the system for controlling the anodes of the screen.

The anodes are controlled by an array of row conductors such as 50, and column conductors such as 52.

Each anode is located at the intersection of a row conductor and a column conductor.

An anode 5, for example, is connected to a row conductor 50 by a capacitor C and to a column conductor 52 by a suitably oriented diode D.

There may be stray capacitances C ′ and C ″ which have no functional utility and which should be minimized for efficient operation of the assembly.

An energy balance is necessary in order to establish the characteristics of the components of such a screen.

sous un potentiel maximum de 50 Volts
C = ioe pF
Le courant de commande à passer dans la diode est alors
I = 50 V x 100 pF/10 lls = 0,5 mA
Dans le cas de réalisation d'une diode PIN en silicium amorphe, le courant maximum tolérable en direct est 50 A/cm2 d'où une surface de composant : Sur1000 cul2. Consider a screen of size 1m xl m resolving 1000 points x 1000 points addressed in 10 Fs per line. Under domestic conditions of use, it is known that such a screen requires a power of approximately 40 Watts. The cross-over potential, to which the phosphorus of the anodes must not be carried on pain of switching to fast electron mode, is of the order of 50 volts. This secondary emission will however be profitable for reducing the powers to be switched in a ratio of the order of 3. The energy to be stored in a pixel will therefore be

under a maximum potential of 50 Volts
C = ioe pF
The control current to pass through the diode is then
I = 50 V x 100 pF / 10 lls = 0.5 mA
In the case of making a PIN diode in amorphous silicon, the maximum tolerable direct current is 50 A / cm2, hence a component surface area: Sur1000 cul2.

The parasitic capacitance of such a diode is: C's O, 1 pF. It should be checked that this capacity does not significantly affect the control power, that is to say that 1000 C 'is not much greater than C. Likewise, the capacity C "should not be much greater. at C / 1000. However, this capacitance corresponding to the row-column intersection is linked to the section of the row and column conductors itself defined by the constraint of a low RC time constant compared to the addressing time For conductors of lines of width 1 mm and a thickness of a few micrometers and conductors of columns of width 30 u, and of the same thickness we can estimate
RCV: 30,000 Ra x 3000C '
RCH = 1000 RZ x 1000C
For R = 10 (1.5 wu of copper or 4 CL of aluminum), the time constants are less than 1 lls.

The dielectric thickness, making it possible to ensure the capacitance C = 100 pF, is

the dielectric thickness, separating the rows and the columns, defines the parasitic capacitance C ", for e = 1, u:

It is therefore tolerable to use the same dielectric layer for the realization of the capacitance and the row-column insulation.

FIG. 3 gives an exemplary embodiment of an anode control device structure conforming to the diagram of FIG. 2. In this figure only the elements necessary for controlling an anode have been shown.

On the face 20 of a substrate 2 there is a line conductor 50. This line conductor 50 and the face 20 are covered with a layer 51 of an insulating material. On the layer 51 there is a column conductor 52 covered by layers of semiconductor materials 53, 54, 55 forming the diode D of FIG. 2. For example, this diode D being a PIN diode, the layer 53 is doped of the type. p, layer 54 is an intrinsic semiconductor layer, layer 55 is an n-type doped semiconductor layer.

The anode 5 is made near the intersection of the row conductor 50 and the column conductor 52. It is located above the row conductor 50 so that the layer 51 insulator located between the anode 5 and the line conductor 50 constitutes the capacitor C of FIG. 2. The anode 5 further comprises an extension 56 which overlaps the upper part of the layer 55 and which therefore makes the connection between the PIN diode and the anode 5.

The anode 5 is covered with a layer 6 of a photoemissive material such as phosphorus. The anode 5 will then be advantageously reflective and the display of the screen will be according to the arrow F1 indicated in FIG. 1.

Such a structure can be produced by successive deposits and etchings or by serigraphs.

According to an alternative embodiment shown in FIG. 4, the layer 6 of photosensitive material is located between the anode 5 and the layer 51. The substrate 2 and the layers 50 and 51 are then transparent. The anode 5 is preferably reflective without this being compulsory. The screen is displayed according to the arrow F2 in figure 1.

FIG. 5 gives a logical addressing diagram of such a screen. Addressing is done by generating a negative-V pulse on the row conductors as shown on the right of the figure and not applying a negative pulse of value to a column conductor.
-V + VS where VS is the voltage applied to the picture element located at the intersection of a row conductor and a column conductor.

The diagram in FIG. 6 makes it possible to evaluate the thermal power dissipated by the filament for a thermionic current of the order of 1A. It can be seen that reasonable powers can be obtained if the cathode surface does not exceed 50 cm 2.

This requires the use of cathodes distributed in a network as shown in FIG. 7. Two highly conductive lattices consisting on the one hand of horizontal conductors such as Th1, Th2, Th3i and, on the other hand, of vertical conductors Tvî, Tv2, Tv3 supply the cathodes located at the intersections of the horizontal and vertical conductors. These cathodes are formed by resistors such as W1. 1, W1.2, W2.1.

A variant of the invention shown in FIG. 8 uses a cathode in a network of tips. Contrary to the known art, the potential of the tear gates is fixed.

According to this variant embodiment, part 1 of the screen of FIG. 1 is provided with an array of spiked cathodes. Such a network is known in the art. It comprises spitting electrodes 40 which, according to the example of FIG. 8, are all connected to the same potential + Vg. Set back from the surface of these stripping electrodes, are located emission electrodes 41 in the form of spikes. These electrodes 41 are joined by a conductive network 42 and brought to the same potential -V.

The substrate 2 is provided with a structure described above and in particular a structure such as that of FIG. 4.

Under these conditions, the network of spiked cathodes plays the role of an electron emission network. The screen will be displayed according to the arrow F2 indicated in figure 8.

It is obvious that the foregoing description has been given only by way of non-limiting example. Other variants can be envisaged without departing from the scope of the invention.

In particular, the numerical examples have only been provided to illustrate the description.

Claims (4)

1. Cathode screen display device comprising - a viewing screen (1) of planar form connected in a sealed manner to a planar surface (20) of a substrate (2) and defining therewith a waterproof enclosure (3) constituting the interior of the viewing device to cathode ray screen - an electron emitting network (4) constituting the cathode of the device brought to a determined potential and arranged in the enclosure (3) parallel to the plane faces of the substrate and of the screen - an anode matrix (5) arranged on the flat face (20) of the substrate (2), in rows and columns, and provided with a layer (6) of a photoemissive material, characterized in that also comprises - line conductors (50) arranged on the flat face (20) of the substrate (2) ;; - capacitors (C) each connecting an anode (5) to a line conductor - column conductors (52) arranged on the flat face (20) of the substrate (2) and insulated from the row conductors (50) - diodes (D) each connecting an anode to a column conductor. 2. Cathode screen display device according to claim 1, characterized in that - the line conductors (50) are each arranged on the flat face (20) of the substrate (2) under a line of anodes (5) - a layer (51) of an insulating material covers the line conductors, thus insulating the anodes (5) - a column conductor (52) is arranged on the layer (51) of insulating material and associated with each column of anodes between two columns of anodes - a first layer (53) of doped semiconductor of a first type, of p type, for example, covers each column conductor (52) - a second layer (54) of intrinsic semiconductor covers each first layer (53) of semiconductor - a third layer (55) of doped semiconductor of a second type different from the first type, of an n type for example, covers each second layer (54) of semiconductor - Conductive elements (56) covers each third semiconductor layer (55) and are each electrically connected to an anode of a column. 3. Cathode screen display device characterized in that the electron emitting network (4) is a lattice of conductive wires. 4. Cathode screen display device characterized in that the electron emitting array (4) is a cathode array of tips.