[go: up one dir, main page]

FR2432768A1 - Procede pour la metallisation des circuits integres - Google Patents

Procede pour la metallisation des circuits integres

Info

Publication number
FR2432768A1
FR2432768A1 FR7915950A FR7915950A FR2432768A1 FR 2432768 A1 FR2432768 A1 FR 2432768A1 FR 7915950 A FR7915950 A FR 7915950A FR 7915950 A FR7915950 A FR 7915950A FR 2432768 A1 FR2432768 A1 FR 2432768A1
Authority
FR
France
Prior art keywords
integrated circuits
metallizing
laser
relates
metallization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7915950A
Other languages
English (en)
Other versions
FR2432768B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of FR2432768A1 publication Critical patent/FR2432768A1/fr
Application granted granted Critical
Publication of FR2432768B1 publication Critical patent/FR2432768B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H01L23/5258—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/2636—Bombardment with radiation with high-energy radiation for heating, e.g. electron beam heating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32115—Planarisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/7684—Smoothing; Planarisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76892—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern
    • H01L21/76894—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern using a laser, e.g. laser cutting, laser direct writing, laser repair
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Optics & Photonics (AREA)
  • Electromagnetism (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

L'invention concerne un procédé de formation de circuits integrés. Elle se rapporte à un procédé selon lequel les aspérités qui apparaissent dans les dessins de métallisation 12, formées par les opérations classiques d'attaque, peuvent être éliminées par fusion instantanée à l'aide d'impulsions courtes d'un laser ou d'un faisceau d'électrons. L'écoulement est minimal étant donné la brièveté de la période pendant laquelle la matière est à l'état fondu, mais la tension superficielle provoque la suppression des coins aigus. Dans le cas du silicium polycristallin, la conductivité de la métallisation est aussi accrue. Application à la fabrication de circuits intégrés.
FR7915950A 1978-06-22 1979-06-21 Procede pour la metallisation des circuits integres Granted FR2432768A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US91784178A 1978-06-22 1978-06-22

Publications (2)

Publication Number Publication Date
FR2432768A1 true FR2432768A1 (fr) 1980-02-29
FR2432768B1 FR2432768B1 (fr) 1982-12-03

Family

ID=25439402

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7915950A Granted FR2432768A1 (fr) 1978-06-22 1979-06-21 Procede pour la metallisation des circuits integres

Country Status (4)

Country Link
JP (1) JPS5519895A (fr)
DE (1) DE2924866A1 (fr)
FR (1) FR2432768A1 (fr)
GB (1) GB2023926B (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1174285A (fr) * 1980-04-28 1984-09-11 Michelangelo Delfino Ecoulement de materiaux structurels de circuits integres obtenu au moyen d'un laser
JPS56160050A (en) * 1980-05-14 1981-12-09 Fujitsu Ltd Semiconductor device and manufacture thereof
KR900005785B1 (ko) * 1985-05-13 1990-08-11 닛뽄덴신덴와 가부시끼가이샤 평탄성 박막의 제조방법

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2307814A1 (de) * 1972-02-18 1973-08-30 Hitachi Ltd Verfahren zur herstellung elektrischer verbindungen
US4022930A (en) * 1975-05-30 1977-05-10 Bell Telephone Laboratories, Incorporated Multilevel metallization for integrated circuits
US4082958A (en) * 1975-11-28 1978-04-04 Simulation Physics, Inc. Apparatus involving pulsed electron beam processing of semiconductor devices

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2307814A1 (de) * 1972-02-18 1973-08-30 Hitachi Ltd Verfahren zur herstellung elektrischer verbindungen
US4022930A (en) * 1975-05-30 1977-05-10 Bell Telephone Laboratories, Incorporated Multilevel metallization for integrated circuits
US4082958A (en) * 1975-11-28 1978-04-04 Simulation Physics, Inc. Apparatus involving pulsed electron beam processing of semiconductor devices

Also Published As

Publication number Publication date
JPS5519895A (en) 1980-02-12
GB2023926B (en) 1983-03-16
FR2432768B1 (fr) 1982-12-03
GB2023926A (en) 1980-01-03
DE2924866A1 (de) 1980-01-17

Similar Documents

Publication Publication Date Title
FR2445620B1 (fr) Procede d'attaque par plasma pour la fabrication de dispositifs a semi-conducteurs
FR2652423B1 (fr) Procede de microlithographie pour la realisation de structures superficielles submicrometriques sur un substrat du type d'une plaquette de silicium, ainsi qu'un dispositif le mettant en óoeuvre.
FR2354577A1 (fr) Materiau et procede pour former un motif grave par irradiation notamment en vue de la fabrication d'elements semi-conducteurs et de circuits integres
FR2432768A1 (fr) Procede pour la metallisation des circuits integres
GB1285258A (en) Improvements in or relating to semiconductor devices
FR2339582A1 (fr) Procede pour la fabrication d'un objet en nitrure de silicium
FR2396411A2 (fr)
FR2387515A1 (fr) Procede de formation d'un contact pour un circuit integre
FR2496706B1 (fr) Procede de fabrication d'acier au silicium oriente
FR2331885A1 (fr) Procede pour la realisation sur un substrat d'une metallisation
FR2319714A1 (fr) Procede pour la fabrication de feuillards d'acier au silicium pour applications magnetiques
JPS5458409A (en) Production of cantilever
FR2566581B1 (fr) Procede de mise a la masse de dispositifs semi-conducteurs plans et de circuits integres, et produits ainsi obtenus
JPH0684731A (ja) 半導体ウェハー
JPH02220508A (ja) 圧電振動子の周波数調整方法
SE9802751L (sv) Metalliska byggelement för optoelektronik
JPS53146300A (en) Production of silicon carbide substrate
FR2631198B1 (fr) Bruleur a plasma, notamment pour fondre du silicium et approprie en particulier pour la fabrication des semi-conducteurs
KR20000025381A (ko) 반도체 웨이퍼의 이물 발생 방지구조
JP2976986B2 (ja) 位置合わせマークの形成方法
JPH0478167B2 (fr)
JPS57130452A (en) Entry of mark of semiconductor device
FR2431768A1 (fr) Perfectionnement au procede de fabrication de dispositifs semi-conducteurs par auto-alignement et dispositifs obtenus
JPS5478983A (en) Manufacture for electron beam adjusting tool
JPS64720A (en) Manufacture of single crystal thin-film

Legal Events

Date Code Title Description
ST Notification of lapse