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FR2425113A1 - Interface pour systemes a plusieurs ordinateurs - Google Patents

Interface pour systemes a plusieurs ordinateurs

Info

Publication number
FR2425113A1
FR2425113A1 FR7910826A FR7910826A FR2425113A1 FR 2425113 A1 FR2425113 A1 FR 2425113A1 FR 7910826 A FR7910826 A FR 7910826A FR 7910826 A FR7910826 A FR 7910826A FR 2425113 A1 FR2425113 A1 FR 2425113A1
Authority
FR
France
Prior art keywords
master
output gate
gate circuits
programmable input
computers including
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7910826A
Other languages
English (en)
Inventor
Wolfgang Henzler
Karl Herrmann
Eberhard Kehrer
Eberhard Krug
Wolfgang Schone
Gunter Wollenberg
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NUMERIK KARL MARX VEB
Original Assignee
NUMERIK KARL MARX VEB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NUMERIK KARL MARX VEB filed Critical NUMERIK KARL MARX VEB
Publication of FR2425113A1 publication Critical patent/FR2425113A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Multi Processors (AREA)
  • Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

INTERFACE POUR SYSTEMES A PLUSIEURS ORDINATEURS, A SAVOIR UN ORDINATEUR "MAITRE" ET PLUSIEURS ORDINATEURS "ESCLAVES", RELIES ENTRE EUX PAR DES INTERFACES ET DES BUS D'ADRESSES, DE COMMANDE ET DE DONNEES EN VUE DE L'ECHANGE ASYNCHRONE DE DONNEES. POUR CHACUN DES ORDINATEURS EST PREVU UN CIRCUIT PORTE D'ENTREESORTIE EA1 A EA4 COMPORTANT UNE PARTIE DE DONNEES ET UNE PARTIE D'ADRESSES ET DE COMMANDE, CES CIRCUITS PORTE ETANT RELIES ENTRE EUX PAR DES BUS B11, B12, ET A CHAQUE CIRCUIT PORTE EST ASSOCIE UN CIRCUIT DE COMMANDE SPECIAL LS POUR TRANSMETTRE LES SIGNAUX DE COMMANDE PAR L'INTERMEDIAIRE D'UN BUS HS AFIN D'INTERCONNECTER DIRECTEMENT LES ORDINATEURS PARTICIPANT A L'ECHANGE DE DONNEES QUI S'EFFECTUE TOUJOURS ENTRE L'ORDINATEUR "MAITRE" ET UN ORDINATEUR "ESCLAVE". L'INVENTION EST APPLICABLE A LA COMMANDE DE DIVERSES OPERATIONS DE TRAITEMENT ET D'USINAGE.
FR7910826A 1978-05-03 1979-04-27 Interface pour systemes a plusieurs ordinateurs Withdrawn FR2425113A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DD20514178A DD142135A3 (de) 1978-05-03 1978-05-03 Mehrrechnerkopplung

Publications (1)

Publication Number Publication Date
FR2425113A1 true FR2425113A1 (fr) 1979-11-30

Family

ID=5512467

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7910826A Withdrawn FR2425113A1 (fr) 1978-05-03 1979-04-27 Interface pour systemes a plusieurs ordinateurs

Country Status (6)

Country Link
BG (1) BG34874A1 (fr)
CS (1) CS272256B1 (fr)
DD (1) DD142135A3 (fr)
DE (1) DE2912734C2 (fr)
FR (1) FR2425113A1 (fr)
SU (1) SU1337902A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0044033A1 (fr) * 1980-07-11 1982-01-20 Siemens Aktiengesellschaft Dispositif pour le transfert rapide de blocs de données entre deux processeurs opérationnels
EP0142329A2 (fr) * 1983-11-08 1985-05-22 Kabushiki Kaisha Ishida Koki Seisakusho Système de réglage pour un dispositif combinatoire de pesage ou de comptage
EP0171856A1 (fr) * 1984-08-14 1986-02-19 Telecommunications Radioelectriques Et Telephoniques T.R.T. Processeur pour le traitement de signal et structure de multitraitement hiérarchisée comportant au moins un tel processeur

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9008362D0 (en) * 1990-04-12 1990-06-13 Hackremco No 574 Limited Banking computer system
EP0918414B1 (fr) * 1996-12-16 2006-07-19 Samsung Electronics Co., Ltd. Procede de transmission de messages entre dispositifs d'abonnes regroupes en reseau
KR100385239B1 (ko) 1996-12-16 2003-07-16 삼성전자주식회사 근거리망에서 전자 우편 메시지를 전송하기 위한 방법과 장치.

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3634830A (en) * 1969-06-13 1972-01-11 Ibm Modular computer sharing system with intercomputer communication control apparatus
GB1279955A (en) * 1971-04-15 1972-06-28 Standard Telephones Cables Ltd Improvements in or relating to computer systems
DE2446970A1 (de) * 1973-10-12 1975-04-17 Burroughs Corp Datenverarbeitungsanlage mit schnittstellen-einheit zwischen rechenwerken und randeinheiten
US3972023A (en) * 1974-12-30 1976-07-27 International Business Machines Corporation I/O data transfer control system
FR2328248A1 (fr) * 1975-10-14 1977-05-13 Texas Instruments Inc Dispositif de couplage de lignes omnibus de transmission, notamment pour la communication entre multiprocesseurs

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3634830A (en) * 1969-06-13 1972-01-11 Ibm Modular computer sharing system with intercomputer communication control apparatus
GB1279955A (en) * 1971-04-15 1972-06-28 Standard Telephones Cables Ltd Improvements in or relating to computer systems
DE2446970A1 (de) * 1973-10-12 1975-04-17 Burroughs Corp Datenverarbeitungsanlage mit schnittstellen-einheit zwischen rechenwerken und randeinheiten
US3972023A (en) * 1974-12-30 1976-07-27 International Business Machines Corporation I/O data transfer control system
FR2328248A1 (fr) * 1975-10-14 1977-05-13 Texas Instruments Inc Dispositif de couplage de lignes omnibus de transmission, notamment pour la communication entre multiprocesseurs

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
EXBK/75 *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0044033A1 (fr) * 1980-07-11 1982-01-20 Siemens Aktiengesellschaft Dispositif pour le transfert rapide de blocs de données entre deux processeurs opérationnels
EP0142329A2 (fr) * 1983-11-08 1985-05-22 Kabushiki Kaisha Ishida Koki Seisakusho Système de réglage pour un dispositif combinatoire de pesage ou de comptage
EP0142329A3 (en) * 1983-11-08 1986-04-02 Kabushiki Kaisha Ishida Koki Seisakusho Control system for combinatorial weighing or counting apparatus
US4658919A (en) * 1983-11-08 1987-04-21 Kabushiki Kaisha Ishida Koki Seisakusho Control system for combinatorial weighing or counting apparatus
EP0171856A1 (fr) * 1984-08-14 1986-02-19 Telecommunications Radioelectriques Et Telephoniques T.R.T. Processeur pour le traitement de signal et structure de multitraitement hiérarchisée comportant au moins un tel processeur
FR2569290A1 (fr) * 1984-08-14 1986-02-21 Trt Telecom Radio Electr Processeur pour le traitement de signal et structure de multitraitement hierarchisee comportant au moins un tel processeur

Also Published As

Publication number Publication date
DE2912734C2 (de) 1985-01-17
DD142135A3 (de) 1980-06-11
BG34874A1 (en) 1983-12-15
SU1337902A1 (ru) 1987-09-15
DE2912734A1 (de) 1979-11-15
CS272256B1 (en) 1991-01-15

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Legal Events

Date Code Title Description
ST Notification of lapse