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FI954241A - Framställningsförfarande för en halvledaranordning - Google Patents

Framställningsförfarande för en halvledaranordning Download PDF

Info

Publication number
FI954241A
FI954241A FI954241A FI954241A FI954241A FI 954241 A FI954241 A FI 954241A FI 954241 A FI954241 A FI 954241A FI 954241 A FI954241 A FI 954241A FI 954241 A FI954241 A FI 954241A
Authority
FI
Finland
Prior art keywords
semiconductor device
preparation process
preparation
semiconductor
Prior art date
Application number
FI954241A
Other languages
English (en)
Finnish (fi)
Other versions
FI954241A0 (sv
FI110642B (sv
Inventor
Kazuhiro Yoshida
Original Assignee
Murata Manufacturing Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co filed Critical Murata Manufacturing Co
Publication of FI954241A0 publication Critical patent/FI954241A0/sv
Publication of FI954241A publication Critical patent/FI954241A/sv
Application granted granted Critical
Publication of FI110642B publication Critical patent/FI110642B/sv

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/061—Manufacture or treatment of FETs having Schottky gates
    • H10D30/0612—Manufacture or treatment of FETs having Schottky gates of lateral single-gate Schottky FETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
    • H01L21/28581—Deposition of Schottky electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
    • H01L21/28587—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds characterised by the sectional shape, e.g. T, inverted T

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
FI954241A 1994-09-12 1995-09-11 Framställningsförfarande för en halvledaranordning FI110642B (sv)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP21751394 1994-09-12
JP06217513A JP3077524B2 (ja) 1994-09-12 1994-09-12 半導体装置の製造方法

Publications (3)

Publication Number Publication Date
FI954241A0 FI954241A0 (sv) 1995-09-11
FI954241A true FI954241A (sv) 1996-03-13
FI110642B FI110642B (sv) 2003-02-28

Family

ID=16705414

Family Applications (1)

Application Number Title Priority Date Filing Date
FI954241A FI110642B (sv) 1994-09-12 1995-09-11 Framställningsförfarande för en halvledaranordning

Country Status (6)

Country Link
US (1) US5712175A (sv)
EP (1) EP0701272B1 (sv)
JP (1) JP3077524B2 (sv)
KR (1) KR100195293B1 (sv)
DE (1) DE69506646T2 (sv)
FI (1) FI110642B (sv)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09283621A (ja) * 1996-04-10 1997-10-31 Murata Mfg Co Ltd 半導体装置のｔ型ゲート電極形成方法およびその構造
JP2780704B2 (ja) * 1996-06-14 1998-07-30 日本電気株式会社 半導体装置の製造方法
JP4093395B2 (ja) * 2001-08-03 2008-06-04 富士通株式会社 半導体装置とその製造方法
TW569077B (en) * 2003-05-13 2004-01-01 Univ Nat Chiao Tung Method for fabricating nanometer gate in semiconductor device using thermally reflowed resist technology
US8878245B2 (en) 2006-11-30 2014-11-04 Cree, Inc. Transistors and method for making ohmic contact to transistors
US9634191B2 (en) * 2007-11-14 2017-04-25 Cree, Inc. Wire bond free wafer level LED
US8368100B2 (en) * 2007-11-14 2013-02-05 Cree, Inc. Semiconductor light emitting diodes having reflective structures and methods of fabricating same
US8384115B2 (en) * 2008-08-01 2013-02-26 Cree, Inc. Bond pad design for enhancing light extraction from LED chips
US8741715B2 (en) * 2009-04-29 2014-06-03 Cree, Inc. Gate electrodes for millimeter-wave operation and methods of fabrication
JP5521447B2 (ja) 2009-09-07 2014-06-11 富士通株式会社 半導体装置の製造方法
US9070851B2 (en) 2010-09-24 2015-06-30 Seoul Semiconductor Co., Ltd. Wafer-level light emitting diode package and method of fabricating the same
USD826871S1 (en) 2014-12-11 2018-08-28 Cree, Inc. Light emitting diode device
CN205944139U (zh) 2016-03-30 2017-02-08 首尔伟傲世有限公司 紫外线发光二极管封装件以及包含此的发光二极管模块
CN113646870B (zh) * 2019-04-04 2022-11-25 Hrl实验室有限责任公司 微型场板t型栅极及其制造方法
CN113097307B (zh) * 2021-03-31 2022-07-19 浙江集迈科微电子有限公司 GaN器件结构及其制备方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59135773A (ja) * 1983-01-24 1984-08-04 Nec Corp 半導体装置の製造方法
US4959326A (en) * 1988-12-22 1990-09-25 Siemens Aktiengesellschaft Fabricating T-gate MESFETS employing double exposure, double develop techniques
JPH0414212A (ja) * 1990-05-02 1992-01-20 Dainippon Printing Co Ltd レジストパターン形成方法
FR2663155B1 (fr) * 1990-06-12 1997-01-24 Thomson Composants Microondes Procede de realisation d'une grille de transistor.
US5147812A (en) * 1992-04-01 1992-09-15 Motorola, Inc. Fabrication method for a sub-micron geometry semiconductor device
DE4228836A1 (de) * 1992-08-29 1994-03-03 Daimler Benz Ag Selbstjustierendes Verfahren zur Herstellung von Feldeffekttransistoren
JP3082469B2 (ja) * 1992-09-22 2000-08-28 株式会社村田製作所 ゲート電極の形成方法

Also Published As

Publication number Publication date
DE69506646D1 (de) 1999-01-28
US5712175A (en) 1998-01-27
EP0701272A3 (sv) 1996-03-27
FI954241A0 (sv) 1995-09-11
KR960012550A (ko) 1996-04-20
DE69506646T2 (de) 1999-06-17
JPH0883809A (ja) 1996-03-26
KR100195293B1 (ko) 1999-06-15
EP0701272B1 (en) 1998-12-16
EP0701272A2 (en) 1996-03-13
FI110642B (sv) 2003-02-28
JP3077524B2 (ja) 2000-08-14

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