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ES458222A1 - Perfeccionamientos introducidos en una unidad de control de dispositivo periferico con logica de escrutinio mejorada, para utilizacion en un sistema de tratamiento de datos. - Google Patents

Perfeccionamientos introducidos en una unidad de control de dispositivo periferico con logica de escrutinio mejorada, para utilizacion en un sistema de tratamiento de datos.

Info

Publication number
ES458222A1
ES458222A1 ES458222A ES458222A ES458222A1 ES 458222 A1 ES458222 A1 ES 458222A1 ES 458222 A ES458222 A ES 458222A ES 458222 A ES458222 A ES 458222A ES 458222 A1 ES458222 A1 ES 458222A1
Authority
ES
Spain
Prior art keywords
input
data transfer
transfer requests
output interrupt
cycle steal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES458222A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of ES458222A1 publication Critical patent/ES458222A1/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/32—Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer
    • G06F13/34—Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer with priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Small-Scale Networks (AREA)

Abstract

Perfeccionamientos introducidos en una unidad de control de dispositivo periférico con lógica de escrutinio mejorada, para utilización en un sistema de tratamiento de datos que incluye una unidad central de tratamiento, una unidad de memoria, una unidad lógica de control de entrada-salida y una línea general de acoplamiento (I/F).
ES458222A 1976-04-30 1977-04-27 Perfeccionamientos introducidos en una unidad de control de dispositivo periferico con logica de escrutinio mejorada, para utilizacion en un sistema de tratamiento de datos. Expired ES458222A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/681,983 US4038641A (en) 1976-04-30 1976-04-30 Common polling logic for input/output interrupt or cycle steal data transfer requests

Publications (1)

Publication Number Publication Date
ES458222A1 true ES458222A1 (es) 1978-02-01

Family

ID=24737695

Family Applications (1)

Application Number Title Priority Date Filing Date
ES458222A Expired ES458222A1 (es) 1976-04-30 1977-04-27 Perfeccionamientos introducidos en una unidad de control de dispositivo periferico con logica de escrutinio mejorada, para utilizacion en un sistema de tratamiento de datos.

Country Status (11)

Country Link
US (1) US4038641A (es)
JP (2) JPS6030983B2 (es)
AU (1) AU510240B2 (es)
BR (1) BR7702817A (es)
CA (1) CA1103326A (es)
CH (1) CH620778A5 (es)
DE (1) DE2719278C3 (es)
ES (1) ES458222A1 (es)
GB (1) GB1557117A (es)
NL (1) NL7704654A (es)
SE (1) SE431373B (es)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4181934A (en) * 1976-12-27 1980-01-01 International Business Machines Corporation Microprocessor architecture with integrated interrupts and cycle steals prioritized channel
US4339793A (en) * 1976-12-27 1982-07-13 International Business Machines Corporation Function integrated, shared ALU processor apparatus and method
JPS53107252A (en) * 1977-03-01 1978-09-19 Sanyo Electric Co Ltd Interruption answer system
US4159518A (en) * 1977-07-05 1979-06-26 International Business Machines Corporation Auto-selection priority circuits for plural channel adapters
DE2828685A1 (de) * 1978-06-30 1980-01-10 Festo Maschf Stoll G Vorrichtung zur prioritaetsermittlung von unterbrechungssignalen in steuersystemen mit daten-transfer-leitungen
US4453211A (en) * 1981-04-28 1984-06-05 Formation, Inc. System bus for an emulated multichannel system
WO1983001851A1 (en) * 1981-11-23 1983-05-26 Burroughs Corp Peripheral unit adapted to monitor input/output interface
US4543629A (en) * 1982-04-29 1985-09-24 Honeywell Information Systems Inc. Apparatus for maximizing bus utilization
WO1984000222A1 (en) * 1982-06-30 1984-01-19 Elxsi I/o channel bus
US4564899A (en) * 1982-09-28 1986-01-14 Elxsi I/O Channel bus
JPS60126945A (ja) * 1983-12-14 1985-07-06 Hitachi Ltd ポ−リング方式
US5130983A (en) * 1990-03-27 1992-07-14 Heffner Iii Horace W Method of polling to determine service needs and the like
US5144230A (en) * 1990-11-26 1992-09-01 The Boeing Company Method and system for testing integrated circuits by cycle stealing
US5471618A (en) * 1992-11-30 1995-11-28 3Com Corporation System for classifying input/output events for processes servicing the events
US5414858A (en) * 1992-12-11 1995-05-09 International Business Machines Corporation System and method for dynamically varying between interrupt and polling to service requests of computer peripherals
FR2715509B1 (fr) * 1994-01-27 1996-02-16 Accumulateurs Fixes Générateur électrochimique secondaire à électrolyte aqueux sans maintenance.
US5884556A (en) * 1997-09-30 1999-03-23 Koncept Kreations, Ltd. Trash handling device
US9055687B2 (en) 2010-08-20 2015-06-09 Rockwell Automation Technologies, Inc. Input/output circuits and devices having physically corresponding status indicators

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3680054A (en) * 1970-07-06 1972-07-25 Ibm Input/output channel
US3828325A (en) * 1973-02-05 1974-08-06 Honeywell Inf Systems Universal interface system using a controller to adapt to any connecting peripheral device
JPS5749932B2 (es) * 1974-06-06 1982-10-25
JPS50156848A (es) * 1974-06-06 1975-12-18
JPS518292A (en) * 1974-07-13 1976-01-23 Oriental Yeast Co Ltd Adenoshin jifuosufueetono seiseiho
JPS5177144A (ja) * 1974-12-27 1976-07-03 Sanyo Electric Co Nyushutsuryokusochinodeetatensoseigyohoshiki

Also Published As

Publication number Publication date
SE7704959L (sv) 1977-10-31
CA1103326A (en) 1981-06-16
JPS6035697B2 (ja) 1985-08-16
SE431373B (sv) 1984-01-30
DE2719278B2 (de) 1980-11-20
AU510240B2 (en) 1980-06-19
US4038641A (en) 1977-07-26
CH620778A5 (es) 1980-12-15
DE2719278A1 (de) 1977-11-17
NL7704654A (nl) 1977-11-01
GB1557117A (en) 1979-12-05
JPS6030983B2 (ja) 1985-07-19
AU2474477A (en) 1978-11-09
JPS53941A (en) 1978-01-07
BR7702817A (pt) 1978-02-28
JPS534439A (en) 1978-01-17
DE2719278C3 (de) 1981-08-13

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