EP1843650A3 - Mehrschichtige Leiterplatte und Verfahren zu deren Herstellung - Google Patents
Mehrschichtige Leiterplatte und Verfahren zu deren Herstellung Download PDFInfo
- Publication number
- EP1843650A3 EP1843650A3 EP07013524A EP07013524A EP1843650A3 EP 1843650 A3 EP1843650 A3 EP 1843650A3 EP 07013524 A EP07013524 A EP 07013524A EP 07013524 A EP07013524 A EP 07013524A EP 1843650 A3 EP1843650 A3 EP 1843650A3
- Authority
- EP
- European Patent Office
- Prior art keywords
- circuit board
- printed circuit
- conductive circuit
- multilayered printed
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/36—Removing material
- B23K26/38—Removing material by boring or cutting
- B23K26/382—Removing material by boring or cutting by boring
- B23K26/389—Removing material by boring or cutting by boring of fluid openings, e.g. nozzles, jets
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
- H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
- H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
- H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
- H05K3/0038—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material combined with laser drilling through a metal layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
- H05K3/383—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by microetching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0352—Differences between the conductors of different layers of a multilayer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0358—Resin coated copper [RCC]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/06—Thermal details
- H05K2201/062—Means for thermal insulation, e.g. for protection of parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09827—Tapered, e.g. tapered hole, via or groove
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09863—Concave hole or via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09881—Coating only between conductors, i.e. flush with the conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0307—Providing micro- or nanometer scale roughness on a metal surface, e.g. by plating of nodules or dendrites
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0353—Making conductive layer thin, e.g. by etching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0548—Masks
- H05K2203/0554—Metal used as mask for etching vias, e.g. by laser ablation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0756—Uses of liquids, e.g. rinsing, coating, dissolving
- H05K2203/0773—Dissolving the filler without dissolving the matrix material; Dissolving the matrix material without dissolving the filler
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
- H05K2203/107—Using laser light
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/12—Using specific substances
- H05K2203/121—Metallo-organic compounds
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
- H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0055—After-treatment, e.g. cleaning or desmearing of holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0094—Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/381—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
- H05K3/384—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4661—Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Plasma & Fusion (AREA)
- Mechanical Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Applications Claiming Priority (9)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24938298A JP2000077851A (ja) | 1998-09-03 | 1998-09-03 | 多層プリント配線板の製造方法 |
JP28194298A JP2000091750A (ja) | 1998-09-16 | 1998-09-16 | スルーホールの形成方法、多層プリント配線板の製造方法、およびスルーホール形成基板、多層プリント配線板 |
JP28194098A JP2000091742A (ja) | 1998-09-16 | 1998-09-16 | プリント配線板の製造方法 |
JP30324798A JP2000114727A (ja) | 1998-10-09 | 1998-10-09 | 多層プリント配線板 |
JP04351599A JP4127442B2 (ja) | 1999-02-22 | 1999-02-22 | 多層ビルドアップ配線板及びその製造方法 |
JP04351499A JP4127441B2 (ja) | 1999-02-22 | 1999-02-22 | 多層ビルドアップ配線板の製造方法 |
JP6024099A JP2000261149A (ja) | 1999-03-08 | 1999-03-08 | 多層プリント配線板およびその製造方法 |
JP11624699A JP4137279B2 (ja) | 1999-04-23 | 1999-04-23 | プリント配線板及びその製造方法 |
EP99933214A EP1121008B1 (de) | 1998-09-03 | 1999-07-30 | Mehrschichtige leiterplatte und verfahren zu deren herstellung |
Related Parent Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP99933214.1 Division | 1999-07-30 | ||
EP99933214A Division EP1121008B1 (de) | 1998-09-03 | 1999-07-30 | Mehrschichtige leiterplatte und verfahren zu deren herstellung |
Publications (3)
Publication Number | Publication Date |
---|---|
EP1843650A2 EP1843650A2 (de) | 2007-10-10 |
EP1843650A3 true EP1843650A3 (de) | 2007-11-07 |
EP1843650B1 EP1843650B1 (de) | 2012-03-07 |
Family
ID=27572302
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP07013524A Expired - Lifetime EP1843650B1 (de) | 1998-09-03 | 1999-07-30 | Verfahren zur Herstellung einer mehrschichtigen Leiterplatte |
EP99933214A Expired - Lifetime EP1121008B1 (de) | 1998-09-03 | 1999-07-30 | Mehrschichtige leiterplatte und verfahren zu deren herstellung |
EP07013523A Withdrawn EP1843649A3 (de) | 1998-09-03 | 1999-07-30 | Mehrschichtige Leiterplatte und Verfahren zu deren Herstellung |
Family Applications After (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP99933214A Expired - Lifetime EP1121008B1 (de) | 1998-09-03 | 1999-07-30 | Mehrschichtige leiterplatte und verfahren zu deren herstellung |
EP07013523A Withdrawn EP1843649A3 (de) | 1998-09-03 | 1999-07-30 | Mehrschichtige Leiterplatte und Verfahren zu deren Herstellung |
Country Status (6)
Country | Link |
---|---|
US (5) | US6591495B2 (de) |
EP (3) | EP1843650B1 (de) |
KR (8) | KR20070086864A (de) |
DE (1) | DE69939221D1 (de) |
MY (2) | MY139553A (de) |
WO (1) | WO2000015015A1 (de) |
Families Citing this family (184)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE69934981T2 (de) | 1998-05-19 | 2007-11-15 | Ibiden Co., Ltd., Ogaki | Gedruckte leiterplatte und verfahren zur herstellung |
KR20070086864A (ko) * | 1998-09-03 | 2007-08-27 | 이비덴 가부시키가이샤 | 다층프린트배선판 및 그 제조방법 |
MY139405A (en) * | 1998-09-28 | 2009-09-30 | Ibiden Co Ltd | Printed circuit board and method for its production |
US20030039106A1 (en) * | 2000-04-14 | 2003-02-27 | Tatsunori Koyanagi | Double-sided wiring board and its manufacture method |
WO2002000756A1 (fr) * | 2000-06-28 | 2002-01-03 | Sumitomo Chemical Company, Limited | Composition de resine isolante, composition de resine adhesive et revetement adhesif |
JP2002252446A (ja) * | 2001-02-23 | 2002-09-06 | Sony Chem Corp | フレキシブル配線基板の製造方法 |
JP3941433B2 (ja) * | 2001-08-08 | 2007-07-04 | 株式会社豊田自動織機 | ビアホールのスミア除去方法 |
JP4000796B2 (ja) * | 2001-08-08 | 2007-10-31 | 株式会社豊田自動織機 | ビアホールの銅メッキ方法 |
WO2003030600A1 (en) | 2001-09-28 | 2003-04-10 | Ibiden Co., Ltd. | Printed wiring board and production method for printed wiring board |
US6753480B2 (en) * | 2001-10-12 | 2004-06-22 | Ultratera Corporation | Printed circuit board having permanent solder mask |
US6395625B1 (en) * | 2001-10-12 | 2002-05-28 | S & S Technology Corporation | Method for manufacturing solder mask of printed circuit board |
US6818464B2 (en) * | 2001-10-17 | 2004-11-16 | Hymite A/S | Double-sided etching technique for providing a semiconductor structure with through-holes, and a feed-through metalization process for sealing the through-holes |
JP2003234572A (ja) * | 2002-02-06 | 2003-08-22 | Nitto Denko Corp | 両面配線基板の製造方法 |
EP1491927B1 (de) * | 2002-04-01 | 2013-02-27 | Ibiden Co., Ltd. | Ic-chip-anbringsubstrat, und ic-chip-anbringsubstratherstellungsverfahren. |
US20040012097A1 (en) * | 2002-07-17 | 2004-01-22 | Chien-Wei Chang | Structure and method for fine pitch flip chip substrate |
TWI290016B (en) * | 2002-10-14 | 2007-11-11 | Atotech Deutschland Gmbh | A process and an apparatus for coating printed circuit boards with laser-structurable, thermally curable solder stop lacquers and electroresists |
US6839965B2 (en) * | 2003-02-06 | 2005-01-11 | R-Tec Corporation | Method of manufacturing a resistor connector |
JP4029759B2 (ja) | 2003-04-04 | 2008-01-09 | 株式会社デンソー | 多層回路基板およびその製造方法 |
US6759318B1 (en) * | 2003-04-15 | 2004-07-06 | Kinsus Interconnect Technology Corp. | Translation pad flip chip (TPFC) method for improving micro bump pitch IC substrate structure and manufacturing process |
JP4133560B2 (ja) * | 2003-05-07 | 2008-08-13 | インターナショナル・ビジネス・マシーンズ・コーポレーション | プリント配線基板の製造方法およびプリント配線基板 |
US7476813B2 (en) * | 2003-05-14 | 2009-01-13 | Rambus Inc. | Multilayer flip-chip substrate interconnect layout |
JP2004363478A (ja) * | 2003-06-06 | 2004-12-24 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
JP2005101506A (ja) * | 2003-08-21 | 2005-04-14 | Seiko Epson Corp | 電子部品実装体の製造方法、電気光学装置の製造方法、電子部品実装体、電気光学装置 |
US20060257625A1 (en) * | 2003-09-10 | 2006-11-16 | Yasuhiro Wakizaka | Resin composite film |
JP4226981B2 (ja) * | 2003-09-24 | 2009-02-18 | 三井金属鉱業株式会社 | プリント配線板の製造方法及びその製造方法で得られたプリント配線板 |
JP2005150552A (ja) * | 2003-11-18 | 2005-06-09 | Ngk Spark Plug Co Ltd | 配線基板の製造方法 |
JP2005158848A (ja) * | 2003-11-21 | 2005-06-16 | Nitto Denko Corp | 配線回路基板の製造方法 |
EP1698215A4 (de) * | 2003-12-05 | 2009-06-24 | Commw Of Australia | Verfahren zur herstellung einer elektrischen komponente |
JP2005183720A (ja) * | 2003-12-19 | 2005-07-07 | Brother Ind Ltd | 素子実装基板の製造方法及びプリント基板 |
US7622844B1 (en) * | 2003-12-30 | 2009-11-24 | Hipercon, Llc | Metal fiber brush interface conditioning |
JP4516320B2 (ja) * | 2004-01-08 | 2010-08-04 | シチズン電子株式会社 | Led基板 |
TW200541434A (en) * | 2004-04-30 | 2005-12-16 | Hitachi Via Mechanics Ltd | Printed circuit board and method for processing printed circuit board and method for manufacturing printed circuit board |
JP4536430B2 (ja) * | 2004-06-10 | 2010-09-01 | イビデン株式会社 | フレックスリジッド配線板 |
US20060022339A1 (en) * | 2004-07-30 | 2006-02-02 | Texas Instruments Incorporated | Solder ball opening protrusion for semiconductor assembly |
JP4028863B2 (ja) * | 2004-09-10 | 2007-12-26 | 富士通株式会社 | 基板製造方法 |
JP4346541B2 (ja) * | 2004-11-26 | 2009-10-21 | 日東電工株式会社 | 配線回路基板およびその製造方法 |
JP4955263B2 (ja) * | 2004-12-15 | 2012-06-20 | イビデン株式会社 | プリント配線板 |
US20090032285A1 (en) * | 2005-01-27 | 2009-02-05 | Matsushita Electric Industrial Co., Ltd. | Multi-layer circuit substrate manufacturing method and multi-layer circuit substrate |
CN101180727B (zh) * | 2005-05-23 | 2010-06-16 | 揖斐电株式会社 | 印刷线路板及其制造方法 |
JP2007067216A (ja) * | 2005-08-31 | 2007-03-15 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法、回路基板およびその製造方法 |
JP2007103816A (ja) * | 2005-10-07 | 2007-04-19 | Nec Electronics Corp | 配線基板および電子回路装置 |
JP2007123531A (ja) * | 2005-10-27 | 2007-05-17 | Toshiba Corp | プリント配線基板及びこれを用いたプリント回路基板 |
JP4287458B2 (ja) * | 2005-11-16 | 2009-07-01 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | ペーストバンプを用いた印刷回路基板およびその製造方法 |
US8129623B2 (en) * | 2006-01-30 | 2012-03-06 | Kyocera Corporation | Resin film, adhesive sheet, circuit board, and electronic apparatus |
JP5021216B2 (ja) | 2006-02-22 | 2012-09-05 | イビデン株式会社 | プリント配線板およびその製造方法 |
KR100717909B1 (ko) * | 2006-02-24 | 2007-05-14 | 삼성전기주식회사 | 니켈층을 포함하는 기판 및 이의 제조방법 |
JP2007307599A (ja) * | 2006-05-20 | 2007-11-29 | Sumitomo Electric Ind Ltd | スルーホール成形体およびレーザー加工方法 |
JP4917361B2 (ja) * | 2006-06-13 | 2012-04-18 | 株式会社ディスコ | ビアホールの加工方法 |
KR100744005B1 (ko) * | 2006-06-29 | 2007-07-30 | 주식회사 하이닉스반도체 | 반도체 소자의 금속 패턴 형성방법 |
US8071883B2 (en) | 2006-10-23 | 2011-12-06 | Ibiden Co., Ltd. | Flex-rigid wiring board including flexible substrate and non-flexible substrate and method of manufacturing the same |
US7982135B2 (en) | 2006-10-30 | 2011-07-19 | Ibiden Co., Ltd. | Flex-rigid wiring board and method of manufacturing the same |
JP5029026B2 (ja) * | 2007-01-18 | 2012-09-19 | 富士通株式会社 | 電子装置の製造方法 |
KR100843368B1 (ko) * | 2007-03-02 | 2008-07-03 | 삼성전기주식회사 | 다층 인쇄회로기판의 제조방법 |
TW200906263A (en) * | 2007-05-29 | 2009-02-01 | Matsushita Electric Ind Co Ltd | Circuit board and method for manufacturing the same |
US8440916B2 (en) * | 2007-06-28 | 2013-05-14 | Intel Corporation | Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the method |
KR100841987B1 (ko) * | 2007-07-10 | 2008-06-27 | 삼성전기주식회사 | 다층 인쇄회로기판 제조방법 |
JP5001368B2 (ja) * | 2007-07-10 | 2012-08-15 | イビデン株式会社 | 配線基板及びその製造方法 |
US8044306B2 (en) | 2007-07-11 | 2011-10-25 | Ibiden Co., Ltd. | Wiring board and method of manufacturing the same |
KR100929839B1 (ko) * | 2007-09-28 | 2009-12-04 | 삼성전기주식회사 | 기판제조방법 |
JP5125389B2 (ja) * | 2007-10-12 | 2013-01-23 | 富士通株式会社 | 基板の製造方法 |
JP2009099589A (ja) * | 2007-10-12 | 2009-05-07 | Elpida Memory Inc | ウエハまたは回路基板およびその接続構造体 |
JP2009099621A (ja) * | 2007-10-12 | 2009-05-07 | Fujitsu Ltd | 基板の製造方法 |
US20090114430A1 (en) * | 2007-11-06 | 2009-05-07 | Industry Academic Cooperation Foundation Of Kukmin University | Method for patterning of conductive polymer |
US8309856B2 (en) * | 2007-11-06 | 2012-11-13 | Ibiden Co., Ltd. | Circuit board and manufacturing method thereof |
US7759787B2 (en) * | 2007-11-06 | 2010-07-20 | International Business Machines Corporation | Packaging substrate having pattern-matched metal layers |
CN101658081B (zh) | 2008-03-10 | 2012-05-30 | 揖斐电株式会社 | 挠性线路板及其制造方法 |
US8263878B2 (en) * | 2008-03-25 | 2012-09-11 | Ibiden Co., Ltd. | Printed wiring board |
KR101044103B1 (ko) * | 2008-04-03 | 2011-06-28 | 삼성전기주식회사 | 다층 인쇄회로기판 및 그 제조방법 |
JP2011520142A (ja) * | 2008-05-01 | 2011-07-14 | アドバンスド テクノロジー マテリアルズ,インコーポレイテッド | 高密度注入レジストの除去のための低pH混合物 |
JP2009277916A (ja) * | 2008-05-15 | 2009-11-26 | Shinko Electric Ind Co Ltd | 配線基板及びその製造方法並びに半導体パッケージ |
JP5138459B2 (ja) * | 2008-05-15 | 2013-02-06 | 新光電気工業株式会社 | 配線基板の製造方法 |
JP2009283739A (ja) * | 2008-05-23 | 2009-12-03 | Shinko Electric Ind Co Ltd | 配線基板および配線基板の製造方法 |
US20100006334A1 (en) * | 2008-07-07 | 2010-01-14 | Ibiden Co., Ltd | Printed wiring board and method for manufacturing the same |
US7542302B1 (en) * | 2008-07-14 | 2009-06-02 | International Business Machines Corporation | Minimizing thickness of deadfronted display assemblies |
US8132321B2 (en) * | 2008-08-13 | 2012-03-13 | Unimicron Technology Corp. | Method for making embedded circuit structure |
WO2010052942A1 (ja) * | 2008-11-06 | 2010-05-14 | イビデン株式会社 | 電子部品内蔵配線板及びその製造方法 |
US8431833B2 (en) * | 2008-12-29 | 2013-04-30 | Ibiden Co., Ltd. | Printed wiring board and method for manufacturing the same |
US8872329B1 (en) * | 2009-01-09 | 2014-10-28 | Amkor Technology, Inc. | Extended landing pad substrate package structure and method |
US8410374B2 (en) * | 2009-02-27 | 2013-04-02 | Ibiden Co., Ltd. | Printed wiring board |
US8754337B2 (en) * | 2009-04-01 | 2014-06-17 | Sumitomo Bakelite Co., Ltd. | Printed wiring board fabrication method, printed wiring board, multilayer printed wiring board, and semiconductor package |
KR101019642B1 (ko) * | 2009-04-27 | 2011-03-07 | 삼성전기주식회사 | 인쇄회로기판 제조 방법 |
US9536815B2 (en) | 2009-05-28 | 2017-01-03 | Hsio Technologies, Llc | Semiconductor socket with direct selective metalization |
US9276336B2 (en) | 2009-05-28 | 2016-03-01 | Hsio Technologies, Llc | Metalized pad to electrical contact interface |
US8955215B2 (en) | 2009-05-28 | 2015-02-17 | Hsio Technologies, Llc | High performance surface mount electrical interconnect |
WO2010147939A1 (en) | 2009-06-17 | 2010-12-23 | Hsio Technologies, Llc | Semiconductor socket |
US9136196B2 (en) | 2009-06-02 | 2015-09-15 | Hsio Technologies, Llc | Compliant printed circuit wafer level semiconductor package |
US8955216B2 (en) | 2009-06-02 | 2015-02-17 | Hsio Technologies, Llc | Method of making a compliant printed circuit peripheral lead semiconductor package |
US9184527B2 (en) | 2009-06-02 | 2015-11-10 | Hsio Technologies, Llc | Electrical connector insulator housing |
US8789272B2 (en) | 2009-06-02 | 2014-07-29 | Hsio Technologies, Llc | Method of making a compliant printed circuit peripheral lead semiconductor test socket |
WO2010147934A1 (en) | 2009-06-16 | 2010-12-23 | Hsio Technologies, Llc | Semiconductor die terminal |
US8525346B2 (en) * | 2009-06-02 | 2013-09-03 | Hsio Technologies, Llc | Compliant conductive nano-particle electrical interconnect |
WO2013036565A1 (en) | 2011-09-08 | 2013-03-14 | Hsio Technologies, Llc | Direct metalization of electrical circuit structures |
US9414500B2 (en) | 2009-06-02 | 2016-08-09 | Hsio Technologies, Llc | Compliant printed flexible circuit |
US8618649B2 (en) | 2009-06-02 | 2013-12-31 | Hsio Technologies, Llc | Compliant printed circuit semiconductor package |
US8988093B2 (en) | 2009-06-02 | 2015-03-24 | Hsio Technologies, Llc | Bumped semiconductor wafer or die level electrical interconnect |
US9277654B2 (en) | 2009-06-02 | 2016-03-01 | Hsio Technologies, Llc | Composite polymer-metal electrical contacts |
WO2010141264A1 (en) | 2009-06-03 | 2010-12-09 | Hsio Technologies, Llc | Compliant wafer level probe assembly |
US9231328B2 (en) | 2009-06-02 | 2016-01-05 | Hsio Technologies, Llc | Resilient conductive electrical interconnect |
US8987886B2 (en) | 2009-06-02 | 2015-03-24 | Hsio Technologies, Llc | Copper pillar full metal via electrical circuit structure |
WO2011002709A1 (en) | 2009-06-29 | 2011-01-06 | Hsio Technologies, Llc | Compliant printed circuit semiconductor tester interface |
WO2010141313A1 (en) | 2009-06-02 | 2010-12-09 | Hsio Technologies, Llc | Compliant printed circuit socket diagnostic tool |
WO2012078493A1 (en) | 2010-12-06 | 2012-06-14 | Hsio Technologies, Llc | Electrical interconnect ic device socket |
US9276339B2 (en) | 2009-06-02 | 2016-03-01 | Hsio Technologies, Llc | Electrical interconnect IC device socket |
US9930775B2 (en) | 2009-06-02 | 2018-03-27 | Hsio Technologies, Llc | Copper pillar full metal via electrical circuit structure |
US9699906B2 (en) | 2009-06-02 | 2017-07-04 | Hsio Technologies, Llc | Hybrid printed circuit assembly with low density main core and embedded high density circuit regions |
WO2012061008A1 (en) | 2010-10-25 | 2012-05-10 | Hsio Technologies, Llc | High performance electrical circuit structure |
WO2012074963A1 (en) | 2010-12-01 | 2012-06-07 | Hsio Technologies, Llc | High performance surface mount electrical interconnect |
US9613841B2 (en) | 2009-06-02 | 2017-04-04 | Hsio Technologies, Llc | Area array semiconductor device package interconnect structure with optional package-to-package or flexible circuit to package connection |
US8610265B2 (en) | 2009-06-02 | 2013-12-17 | Hsio Technologies, Llc | Compliant core peripheral lead semiconductor test socket |
WO2010141316A1 (en) | 2009-06-02 | 2010-12-09 | Hsio Technologies, Llc | Compliant printed circuit wafer probe diagnostic tool |
US9184145B2 (en) | 2009-06-02 | 2015-11-10 | Hsio Technologies, Llc | Semiconductor device package adapter |
US9054097B2 (en) | 2009-06-02 | 2015-06-09 | Hsio Technologies, Llc | Compliant printed circuit area array semiconductor device package |
US9318862B2 (en) | 2009-06-02 | 2016-04-19 | Hsio Technologies, Llc | Method of making an electronic interconnect |
US9196980B2 (en) | 2009-06-02 | 2015-11-24 | Hsio Technologies, Llc | High performance surface mount electrical interconnect with external biased normal force loading |
WO2011002712A1 (en) | 2009-06-29 | 2011-01-06 | Hsio Technologies, Llc | Singulated semiconductor device separable electrical interconnect |
WO2010147782A1 (en) | 2009-06-16 | 2010-12-23 | Hsio Technologies, Llc | Simulated wirebond semiconductor package |
DE102009038674B4 (de) * | 2009-08-24 | 2012-02-09 | Epcos Ag | Trägervorrichtung, Anordnung mit einer solchen Trägervorrichtung sowie Verfahren zur Herstellung eines mindestens eine keramische Schicht umfassenden struktururierten Schichtstapels |
TW201110839A (en) * | 2009-09-04 | 2011-03-16 | Advanced Semiconductor Eng | Substrate structure and method for manufacturing the same |
JP5001395B2 (ja) * | 2010-03-31 | 2012-08-15 | イビデン株式会社 | 配線板及び配線板の製造方法 |
US9350093B2 (en) | 2010-06-03 | 2016-05-24 | Hsio Technologies, Llc | Selective metalization of electrical connector or socket housing |
US9689897B2 (en) | 2010-06-03 | 2017-06-27 | Hsio Technologies, Llc | Performance enhanced semiconductor socket |
US10159154B2 (en) | 2010-06-03 | 2018-12-18 | Hsio Technologies, Llc | Fusion bonded liquid crystal polymer circuit structure |
US8758067B2 (en) | 2010-06-03 | 2014-06-24 | Hsio Technologies, Llc | Selective metalization of electrical connector or socket housing |
JP5580135B2 (ja) * | 2010-08-03 | 2014-08-27 | 三井金属鉱業株式会社 | プリント配線板の製造方法及びプリント配線板 |
JP5471987B2 (ja) * | 2010-09-07 | 2014-04-16 | 株式会社大真空 | 電子部品パッケージ用封止部材、電子部品パッケージ、及び電子部品パッケージ用封止部材の製造方法 |
JP5447316B2 (ja) * | 2010-09-21 | 2014-03-19 | 株式会社大真空 | 電子部品パッケージ用封止部材、及び電子部品パッケージ |
US8572840B2 (en) * | 2010-09-30 | 2013-11-05 | International Business Machines Corporation | Method of attaching an electronic module power supply |
JP5602584B2 (ja) * | 2010-10-28 | 2014-10-08 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
US8693203B2 (en) * | 2011-01-14 | 2014-04-08 | Harris Corporation | Method of making an electronic device having a liquid crystal polymer solder mask laminated to an interconnect layer stack and related devices |
US20120250330A1 (en) * | 2011-03-31 | 2012-10-04 | Fusion Optix, Inc. | Optical element and collimating optical assembly |
CN103534802A (zh) * | 2011-06-01 | 2014-01-22 | E.I.内穆尔杜邦公司 | 用于高频应用的低温共烧陶瓷结构及其制造方法 |
JP5953681B2 (ja) * | 2011-09-09 | 2016-07-20 | イビデン株式会社 | プリント配線板の製造方法 |
US9101061B2 (en) | 2011-09-22 | 2015-08-04 | Hitachi Chemical Company, Ltd. | Laminate body, laminate plate, multilayer laminate plate, printed wiring board, and method for manufacture of laminate plate |
US9050780B2 (en) | 2011-09-22 | 2015-06-09 | Hitachi Chemical Company, Ltd. | Laminate body, laminate plate, multilayer laminate plate, printed wiring board, and method for manufacture of laminate plate |
DE102011088256A1 (de) * | 2011-12-12 | 2013-06-13 | Zf Friedrichshafen Ag | Multilayer-Leiterplatte sowie Anordnung mit einer solchen |
JP6011074B2 (ja) | 2012-01-20 | 2016-10-19 | 富士通株式会社 | 電子装置の製造方法及び電子装置の製造装置 |
DE102012200915A1 (de) | 2012-01-23 | 2013-07-25 | Robert Bosch Gmbh | Verfahren zur Herstellung eines strukturierten Mehrschichtsystems |
CN103298247A (zh) * | 2012-02-24 | 2013-09-11 | 宏恒胜电子科技(淮安)有限公司 | 电路板及其制作方法 |
TWI504322B (zh) * | 2012-03-29 | 2015-10-11 | Taiwan Green Point Entpr Co | 雙面電路板及其製備方法 |
US20130293482A1 (en) * | 2012-05-04 | 2013-11-07 | Qualcomm Mems Technologies, Inc. | Transparent through-glass via |
US9761520B2 (en) | 2012-07-10 | 2017-09-12 | Hsio Technologies, Llc | Method of making an electrical connector having electrodeposited terminals |
TWI536508B (zh) * | 2012-08-24 | 2016-06-01 | Ngk Spark Plug Co | Wiring board |
US20140106179A1 (en) * | 2012-10-17 | 2014-04-17 | Raytheon Company | Plating design and process for improved hermeticity and thermal conductivity of gold-germanium solder joints |
JP2014086651A (ja) * | 2012-10-26 | 2014-05-12 | Ibiden Co Ltd | プリント配線板及びプリント配線板の製造方法 |
US10028394B2 (en) * | 2012-12-17 | 2018-07-17 | Intel Corporation | Electrical interconnect formed through buildup process |
US9664509B2 (en) * | 2012-12-18 | 2017-05-30 | Bruker Nano Inc. | Signal sectioning for profiling printed-circuit-bord vias with vertical scanning interferometry |
US8953171B1 (en) * | 2012-12-18 | 2015-02-10 | Bruker Nano Inc | Signal sectioning for profiling printed-circuit-board vias with vertical scanning interferometry |
KR101396704B1 (ko) | 2012-12-20 | 2014-05-16 | 삼성전기주식회사 | 회로 기판 및 그 제조 방법 |
CN103182608B (zh) * | 2013-04-03 | 2015-12-23 | 大族激光科技产业集团股份有限公司 | Pcb板开盖的加工方法 |
JP6162458B2 (ja) * | 2013-04-05 | 2017-07-12 | 新光電気工業株式会社 | 配線基板、半導体装置及び配線基板の製造方法 |
US10667410B2 (en) | 2013-07-11 | 2020-05-26 | Hsio Technologies, Llc | Method of making a fusion bonded circuit structure |
US10506722B2 (en) | 2013-07-11 | 2019-12-10 | Hsio Technologies, Llc | Fusion bonded liquid crystal polymer electrical circuit structure |
CN104349609A (zh) * | 2013-08-08 | 2015-02-11 | 北大方正集团有限公司 | 印刷线路板及其制作方法 |
CN104378907B (zh) * | 2013-08-12 | 2017-06-30 | 富葵精密组件(深圳)有限公司 | 电路板及其制作方法 |
KR101548421B1 (ko) * | 2013-08-27 | 2015-08-28 | 삼성전기주식회사 | 다층인쇄회로기판의 제조방법 |
KR20150033979A (ko) * | 2013-09-25 | 2015-04-02 | 삼성전기주식회사 | 인터포저 기판 및 인터포저 기판 제조 방법 |
JP6316609B2 (ja) | 2014-02-05 | 2018-04-25 | 新光電気工業株式会社 | 配線基板及び半導体装置と配線基板の製造方法及び半導体装置の製造方法 |
CN105657988B (zh) * | 2014-11-21 | 2019-04-23 | 宏启胜精密电子(秦皇岛)有限公司 | 柔性电路板及其制作方法 |
US9559447B2 (en) | 2015-03-18 | 2017-01-31 | Hsio Technologies, Llc | Mechanical contact retention within an electrical connector |
CN105163520A (zh) * | 2015-08-19 | 2015-12-16 | 深圳市迅捷兴电路技术有限公司 | 机械盲、埋孔精细线路印制电路板制作方法 |
JP6834121B2 (ja) * | 2015-09-17 | 2021-02-24 | 味の素株式会社 | 配線板の製造方法 |
US10211071B2 (en) * | 2016-01-29 | 2019-02-19 | Nxp B.V. | IC packaging method and a packaged IC device |
JP2017152536A (ja) * | 2016-02-24 | 2017-08-31 | イビデン株式会社 | プリント配線板及びその製造方法 |
WO2018043682A1 (ja) * | 2016-09-01 | 2018-03-08 | 旭硝子株式会社 | 配線基板およびその製造方法 |
KR101952864B1 (ko) | 2016-09-30 | 2019-02-27 | 삼성전기주식회사 | 팬-아웃 반도체 패키지 |
US10283445B2 (en) | 2016-10-26 | 2019-05-07 | Invensas Corporation | Bonding of laminates with electrical interconnects |
KR20180095350A (ko) * | 2017-02-17 | 2018-08-27 | 삼성전기주식회사 | 기판 및 기판의 제조방법 |
US10892671B2 (en) * | 2017-07-25 | 2021-01-12 | GM Global Technology Operations LLC | Electrically conductive copper components and joining processes therefor |
JP7011946B2 (ja) * | 2017-10-27 | 2022-01-27 | 京セラ株式会社 | 配線基板 |
US10405421B2 (en) | 2017-12-18 | 2019-09-03 | International Business Machines Corporation | Selective dielectric resin application on circuitized core layers |
CN108235591B (zh) * | 2018-01-08 | 2020-08-18 | 昆山首源电子科技有限公司 | 5g通讯高频信号板镀金蚀刻工艺 |
TWI651991B (zh) * | 2018-03-02 | 2019-02-21 | 李俊豪 | 導電線路之製作方法 |
EP3780916B1 (de) * | 2018-04-12 | 2025-03-05 | Fuji Corporation | Verfahren zur herstellung eines bedruckten substrats und vorrichtung zur herstellung eines bedruckten substrats |
TWI667946B (zh) * | 2018-05-29 | 2019-08-01 | 夏爾光譜股份有限公司 | 軟式電路板基材及其製作方法 |
TWI705536B (zh) * | 2018-11-16 | 2020-09-21 | 欣興電子股份有限公司 | 載板結構及其製作方法 |
KR102687513B1 (ko) * | 2018-12-31 | 2024-07-22 | 엘지디스플레이 주식회사 | 마스크 및 이의 제조 방법 |
EP3709779A1 (de) * | 2019-03-12 | 2020-09-16 | AT & S Austria Technologie & Systemtechnik Aktiengesellschaft | Komponententräger und verfahren zur herstellung davon |
US11395412B2 (en) | 2019-04-08 | 2022-07-19 | Nano Dimension Technologies, Ltd. | Systems and methods of fabricating SMT mounting sockets |
JP2021036554A (ja) * | 2019-08-30 | 2021-03-04 | イビデン株式会社 | プリント配線板の製造方法 |
DE102019132314B4 (de) * | 2019-11-28 | 2022-03-03 | Infineon Technologies Ag | Package mit Einkapselung unter Kompressionsbelastung |
TWI715458B (zh) * | 2020-03-04 | 2021-01-01 | 金像電子股份有限公司 | 硬式電路板的製造方法 |
CN112363640A (zh) * | 2020-11-12 | 2021-02-12 | 业成科技(成都)有限公司 | 触控感测模组与形成其之方法 |
WO2022153275A1 (en) * | 2021-01-18 | 2022-07-21 | Vayyar Imaging Ltd. | Systems and methods for improving high frequency transmission in printed circuit boards |
WO2022246708A1 (zh) * | 2021-05-26 | 2022-12-01 | 深南电路股份有限公司 | 一种线路板制备方法以及线路板 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09186456A (ja) * | 1995-12-28 | 1997-07-15 | Hitachi Aic Inc | 多層印刷配線板およびその製造方法 |
JPH09246732A (ja) * | 1996-03-01 | 1997-09-19 | Ibiden Co Ltd | 多層プリント配線板およびその製造方法 |
EP0811480A1 (de) * | 1995-12-26 | 1997-12-10 | Ibiden Co, Ltd. | Metallfilm verbundkörper, verbindungsschicht und bindemittel |
EP0844809A2 (de) * | 1996-11-20 | 1998-05-27 | Ibiden Co, Ltd. | Lötmaskenzusammensetzung und gedruckte Leiterplatten |
EP0855454A1 (de) * | 1995-08-01 | 1998-07-29 | MEC CO., Ltd. | Zusammensetzung zum Mikroätzen von Kupfer und Kupferlegierungen |
US5826330A (en) * | 1995-12-28 | 1998-10-27 | Hitachi Aic Inc. | Method of manufacturing multilayer printed wiring board |
Family Cites Families (82)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AT310843B (de) | 1966-06-28 | 1973-10-25 | Photocircuits Corp | Verfahren zur Herstellung einer gedruckten Leiterplatte |
JPS5123266B2 (de) * | 1972-04-21 | 1976-07-15 | ||
US4211603A (en) * | 1978-05-01 | 1980-07-08 | Tektronix, Inc. | Multilayer circuit board construction and method |
JPS5746679A (en) | 1980-09-01 | 1982-03-17 | Toshiba Corp | Power converter |
FR2520147B1 (fr) * | 1982-01-18 | 1985-10-25 | Commissariat Energie Atomique | Piece d'extremite d'assemblage combustible de reacteurs nucleaires dans laquelle les parois laterales sont elastiques |
JPS58129684A (ja) * | 1982-01-29 | 1983-08-02 | Toshiba Corp | パタ−ン認識装置 |
JPS6199596A (ja) | 1984-10-22 | 1986-05-17 | Hitachi Ltd | 基板の穴あけ方法 |
JPS61207584A (ja) * | 1985-03-11 | 1986-09-13 | Sumitomo Electric Ind Ltd | 回路基板の製造方法 |
JPS6273937A (ja) * | 1985-09-26 | 1987-04-04 | 富士通株式会社 | 多層プリント板 |
JPS62237792A (ja) * | 1986-04-09 | 1987-10-17 | 株式会社日立製作所 | プリント基板のエツチング装置 |
JPS62239591A (ja) | 1986-04-11 | 1987-10-20 | キヤノン株式会社 | プリント配線板の製造方法 |
JPS62272546A (ja) * | 1986-05-20 | 1987-11-26 | Hitachi Cable Ltd | 半導体装置用フイルムキヤリア |
JPS63283098A (ja) | 1987-05-14 | 1988-11-18 | Hitachi Plant Eng & Constr Co Ltd | パタ−ン形成法 |
DE3913966B4 (de) * | 1988-04-28 | 2005-06-02 | Ibiden Co., Ltd., Ogaki | Klebstoffdispersion zum stromlosen Plattieren, sowie Verwendung zur Herstellung einer gedruckten Schaltung |
EP0342669B1 (de) * | 1988-05-20 | 1995-08-23 | Mitsubishi Gas Chemical Company, Inc. | Verfahren zur Herstellung eines mit einer dünnen Kupferfolie kaschierten Substrats für Schaltungsplatten |
US4978639A (en) * | 1989-01-10 | 1990-12-18 | Avantek, Inc. | Method for the simultaneous formation of via-holes and wraparound plating on semiconductor chips |
JPH0734505B2 (ja) * | 1989-01-18 | 1995-04-12 | イビデン株式会社 | 多層プリント配線板およびその製造方法 |
US5108553A (en) * | 1989-04-04 | 1992-04-28 | Olin Corporation | G-tab manufacturing process and the product produced thereby |
JPH0332100A (ja) * | 1989-06-29 | 1991-02-12 | Yokohama Rubber Co Ltd:The | 多層プリント配線板 |
US5063280A (en) * | 1989-07-24 | 1991-11-05 | Canon Kabushiki Kaisha | Method and apparatus for forming holes into printed circuit board |
US5412285A (en) * | 1990-12-06 | 1995-05-02 | Seiko Epson Corporation | Linear amplifier incorporating a field emission device having specific gap distances between gate and cathode |
JP3026580B2 (ja) | 1990-04-20 | 2000-03-27 | 旭光学工業株式会社 | データ信号復調装置 |
JPH045844A (ja) * | 1990-04-23 | 1992-01-09 | Nippon Mektron Ltd | Ic搭載用多層回路基板及びその製造法 |
US5227588A (en) * | 1991-03-25 | 1993-07-13 | Hughes Aircraft Company | Interconnection of opposite sides of a circuit board |
JPH05283866A (ja) * | 1992-04-03 | 1993-10-29 | Hitachi Ltd | ポリマ−印刷抵抗内蔵多層配線板 |
JPH06112649A (ja) | 1992-09-24 | 1994-04-22 | Mitsubishi Gas Chem Co Inc | 多層プリント板の層間接続の製造方法 |
JPH06120139A (ja) * | 1992-10-05 | 1994-04-28 | Ricoh Co Ltd | 半導体材料製造装置 |
JPH06216488A (ja) | 1993-01-19 | 1994-08-05 | Canon Inc | プリント配線板及びその加工方法 |
JPH06314869A (ja) * | 1993-04-30 | 1994-11-08 | Eastern:Kk | プリント配線板のスルーホール形成方法 |
JPH0828581B2 (ja) * | 1993-05-31 | 1996-03-21 | 日本電気株式会社 | 多層印刷配線板およびその製造方法 |
US5446247A (en) * | 1993-11-19 | 1995-08-29 | Motorola, Inc. | Electrical contact and method for making an electrical contact |
JP2781954B2 (ja) * | 1994-03-04 | 1998-07-30 | メック株式会社 | 銅および銅合金の表面処理剤 |
JPH07283538A (ja) | 1994-04-14 | 1995-10-27 | Ibiden Co Ltd | 多層プリント配線板の製造方法 |
JPH07288386A (ja) | 1994-04-19 | 1995-10-31 | Hitachi Chem Co Ltd | 多層配線板 |
JPH07307410A (ja) * | 1994-05-16 | 1995-11-21 | Hitachi Ltd | 半導体装置 |
US5536579A (en) | 1994-06-02 | 1996-07-16 | International Business Machines Corporation | Design of high density structures with laser etch stop |
JPH08116174A (ja) | 1994-08-25 | 1996-05-07 | Matsushita Electric Ind Co Ltd | 回路形成基板およびその製造方法 |
JPH08186376A (ja) * | 1994-12-28 | 1996-07-16 | Hitachi Ltd | 高密度薄膜多層配線基板並びにその実装構造体及びその製造方法 |
JPH08242064A (ja) * | 1995-03-01 | 1996-09-17 | Ibiden Co Ltd | プリント配線板 |
JPH0936551A (ja) | 1995-05-15 | 1997-02-07 | Ibiden Co Ltd | 多層プリント配線板用片面回路基板、および多層プリント配線板とその製造方法 |
JPH08316642A (ja) * | 1995-05-19 | 1996-11-29 | Toagosei Co Ltd | インタースティシャルバイアホールを有する多層プリント配線板およびその製造方法 |
JP3115987B2 (ja) * | 1995-09-14 | 2000-12-11 | 松下電工株式会社 | 多層配線板の製造方法 |
JP3242009B2 (ja) | 1995-10-23 | 2001-12-25 | イビデン株式会社 | 樹脂充填剤 |
JP3172456B2 (ja) | 1995-10-23 | 2001-06-04 | イビデン株式会社 | プリント配線板 |
WO1997016056A1 (fr) * | 1995-10-23 | 1997-05-01 | Ibiden Co., Ltd. | Resine de remplissage et carte de circuits imprimes multicouche |
JP2773715B2 (ja) | 1995-10-31 | 1998-07-09 | 日立エーアイシー株式会社 | 多層プリント配線板の製造方法 |
US6010768A (en) * | 1995-11-10 | 2000-01-04 | Ibiden Co., Ltd. | Multilayer printed circuit board, method of producing multilayer printed circuit board and resin filler |
GB2307351A (en) * | 1995-11-16 | 1997-05-21 | Marconi Gec Ltd | Printed circuit boards and their manufacture |
JPH09186460A (ja) * | 1995-12-28 | 1997-07-15 | C A D Prod:Kk | 多層プリント基板の製造方法 |
AU2993997A (en) * | 1996-05-01 | 1997-11-19 | Allied-Signal Inc. | New method of forming fine circuit lines |
JP4212006B2 (ja) * | 1996-05-28 | 2009-01-21 | パナソニック電工株式会社 | 多層プリント配線板の製造方法 |
JP3865083B2 (ja) * | 1996-06-18 | 2007-01-10 | 日立化成工業株式会社 | 多層プリント配線板の製造方法 |
TW331698B (en) * | 1996-06-18 | 1998-05-11 | Hitachi Chemical Co Ltd | Multi-layered printed circuit board |
JPH1027960A (ja) * | 1996-07-09 | 1998-01-27 | Mitsui Mining & Smelting Co Ltd | 多層プリント配線板の製造方法 |
US5733468A (en) * | 1996-08-27 | 1998-03-31 | Conway, Jr.; John W. | Pattern plating method for fabricating printed circuit boards |
JP3296992B2 (ja) | 1996-09-27 | 2002-07-02 | イビデン株式会社 | 多層プリント配線板の製造方法 |
SG72752A1 (en) * | 1996-10-31 | 2000-05-23 | Hitachi Chemical Co Ltd | Heat resistant resin composition and adhesive sheet using the same |
US5910255A (en) * | 1996-11-08 | 1999-06-08 | W. L. Gore & Associates, Inc. | Method of sequential laser processing to efficiently manufacture modules requiring large volumetric density material removal for micro-via formation |
WO1998020533A2 (en) * | 1996-11-08 | 1998-05-14 | W.L. Gore & Associates, Inc. | Method for using photoabsorptive coatings to enhance both blind and through micro-via entrance quality |
EP0841840A1 (de) * | 1996-11-12 | 1998-05-13 | Hewlett-Packard Company | Verfahren zur Herstellung von Mikrolöthöckern auf Kupferkontaktflächen |
JP3853142B2 (ja) | 1996-11-20 | 2006-12-06 | イビデン株式会社 | ソルダーレジスト組成物およびプリント配線板の製造方法 |
JP3633252B2 (ja) * | 1997-01-10 | 2005-03-30 | イビデン株式会社 | プリント配線板及びその製造方法 |
EP0966185B1 (de) * | 1997-02-28 | 2007-05-30 | Ibiden Co., Ltd. | Verfahren zur herstellung einer gedruckten leiterplatte |
JPH10242654A (ja) | 1997-03-03 | 1998-09-11 | Hitachi Chem Co Ltd | 多層プリント配線板およびその製造法 |
JPH10247784A (ja) | 1997-03-04 | 1998-09-14 | Ibiden Co Ltd | 多層プリント配線板およびその製造方法 |
JPH10323777A (ja) | 1997-05-26 | 1998-12-08 | Sumitomo Heavy Ind Ltd | レーザによるプリント配線基板用穴あけ加工装置 |
JPH1187928A (ja) * | 1997-07-08 | 1999-03-30 | Ibiden Co Ltd | 多層プリント配線板 |
JPH1168291A (ja) | 1997-08-12 | 1999-03-09 | Nippon Carbide Ind Co Inc | プリント配線板及びその製造方法 |
USRE40947E1 (en) * | 1997-10-14 | 2009-10-27 | Ibiden Co., Ltd. | Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole |
TW469228B (en) * | 1998-01-14 | 2001-12-21 | Mitsui Mining & Smelting Co | Method for producing multi-layer printed wiring boards having blind vias |
US6261941B1 (en) * | 1998-02-12 | 2001-07-17 | Georgia Tech Research Corp. | Method for manufacturing a multilayer wiring substrate |
SG77652A1 (en) * | 1998-03-18 | 2001-01-16 | Hitachi Cable | Semiconductor device lead-patterning substrate and electronics device and method for fabricating same |
KR100328807B1 (ko) * | 1998-05-08 | 2002-03-14 | 가네코 히사시 | 제조비용이 저렴하고 충분한 접착 강도가 수득될 수 있는 수지구조물 및 이의 제조 방법 |
JP2000022337A (ja) * | 1998-06-30 | 2000-01-21 | Matsushita Electric Works Ltd | 多層配線板及びその製造方法 |
KR20070086864A (ko) * | 1998-09-03 | 2007-08-27 | 이비덴 가부시키가이샤 | 다층프린트배선판 및 그 제조방법 |
DE60023202T2 (de) * | 1999-02-15 | 2006-07-20 | Mitsubishi Gas Chemical Co., Inc. | Leiterplatte für Plastikhalbleitergehäuse |
TW411737B (en) * | 1999-03-09 | 2000-11-11 | Unimicron Technology Corp | A 2-stage process to form micro via |
JP3635219B2 (ja) * | 1999-03-11 | 2005-04-06 | 新光電気工業株式会社 | 半導体装置用多層基板及びその製造方法 |
JP3585796B2 (ja) * | 1999-12-17 | 2004-11-04 | 新光電気工業株式会社 | 多層配線基板の製造方法、及び半導体装置 |
JP3760101B2 (ja) * | 2001-02-13 | 2006-03-29 | 富士通株式会社 | 多層プリント配線板およびその製造方法 |
US6986454B2 (en) * | 2003-07-10 | 2006-01-17 | Delphi Technologies, Inc. | Electronic package having controlled height stand-off solder joint |
JP2006100489A (ja) * | 2004-09-29 | 2006-04-13 | Ricoh Co Ltd | プリント基板及びそのプリント基板を用いた電子ユニット並びに樹脂流出防止用ダムの形成方法 |
-
1999
- 1999-07-30 KR KR1020077015087A patent/KR20070086864A/ko not_active Application Discontinuation
- 1999-07-30 EP EP07013524A patent/EP1843650B1/de not_active Expired - Lifetime
- 1999-07-30 KR KR1020077015080A patent/KR100855529B1/ko not_active IP Right Cessation
- 1999-07-30 KR KR1020077015081A patent/KR20070086860A/ko not_active Application Discontinuation
- 1999-07-30 DE DE69939221T patent/DE69939221D1/de not_active Expired - Lifetime
- 1999-07-30 EP EP99933214A patent/EP1121008B1/de not_active Expired - Lifetime
- 1999-07-30 EP EP07013523A patent/EP1843649A3/de not_active Withdrawn
- 1999-07-30 WO PCT/JP1999/004142 patent/WO2000015015A1/ja active IP Right Grant
- 1999-07-30 KR KR1020077015082A patent/KR100855530B1/ko not_active IP Right Cessation
- 1999-07-30 KR KR1020077015083A patent/KR20070086862A/ko not_active Application Discontinuation
- 1999-07-30 KR KR1020077015085A patent/KR20070086863A/ko not_active Application Discontinuation
- 1999-07-30 KR KR1020017002801A patent/KR20010088796A/ko not_active Application Discontinuation
- 1999-07-30 KR KR1020077015079A patent/KR100855528B1/ko not_active IP Right Cessation
- 1999-09-02 MY MYPI20044181A patent/MY139553A/en unknown
- 1999-09-02 MY MYPI99003796A patent/MY123228A/en unknown
-
2001
- 2001-03-05 US US09/797,916 patent/US6591495B2/en not_active Expired - Lifetime
-
2003
- 2003-02-03 US US10/356,464 patent/US7415761B2/en not_active Expired - Lifetime
-
2007
- 2007-10-19 US US11/875,486 patent/US8148643B2/en not_active Expired - Fee Related
-
2008
- 2008-04-07 US US12/098,582 patent/US7832098B2/en not_active Expired - Fee Related
-
2012
- 2012-01-25 US US13/357,663 patent/US20120125680A1/en not_active Abandoned
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0855454A1 (de) * | 1995-08-01 | 1998-07-29 | MEC CO., Ltd. | Zusammensetzung zum Mikroätzen von Kupfer und Kupferlegierungen |
EP0811480A1 (de) * | 1995-12-26 | 1997-12-10 | Ibiden Co, Ltd. | Metallfilm verbundkörper, verbindungsschicht und bindemittel |
JPH09186456A (ja) * | 1995-12-28 | 1997-07-15 | Hitachi Aic Inc | 多層印刷配線板およびその製造方法 |
US5826330A (en) * | 1995-12-28 | 1998-10-27 | Hitachi Aic Inc. | Method of manufacturing multilayer printed wiring board |
JPH09246732A (ja) * | 1996-03-01 | 1997-09-19 | Ibiden Co Ltd | 多層プリント配線板およびその製造方法 |
EP0844809A2 (de) * | 1996-11-20 | 1998-05-27 | Ibiden Co, Ltd. | Lötmaskenzusammensetzung und gedruckte Leiterplatten |
Also Published As
Publication number | Publication date |
---|---|
EP1121008B1 (de) | 2008-07-30 |
KR20070086861A (ko) | 2007-08-27 |
US6591495B2 (en) | 2003-07-15 |
MY139553A (en) | 2009-10-30 |
US7415761B2 (en) | 2008-08-26 |
WO2000015015A1 (fr) | 2000-03-16 |
MY123228A (en) | 2006-05-31 |
US8148643B2 (en) | 2012-04-03 |
US20120125680A1 (en) | 2012-05-24 |
EP1843650A2 (de) | 2007-10-10 |
KR20070086859A (ko) | 2007-08-27 |
KR20070086858A (ko) | 2007-08-27 |
EP1121008A1 (de) | 2001-08-01 |
KR100855530B1 (ko) | 2008-09-01 |
EP1843650B1 (de) | 2012-03-07 |
US20080173473A1 (en) | 2008-07-24 |
KR20010088796A (ko) | 2001-09-28 |
EP1843649A3 (de) | 2007-10-31 |
KR20070086863A (ko) | 2007-08-27 |
KR100855528B1 (ko) | 2008-09-01 |
DE69939221D1 (de) | 2008-09-11 |
US20010042637A1 (en) | 2001-11-22 |
EP1121008A4 (de) | 2005-02-02 |
US20080189943A1 (en) | 2008-08-14 |
US20040025333A1 (en) | 2004-02-12 |
KR20070086862A (ko) | 2007-08-27 |
KR100855529B1 (ko) | 2008-09-01 |
EP1843649A2 (de) | 2007-10-10 |
KR20070086860A (ko) | 2007-08-27 |
KR20070086864A (ko) | 2007-08-27 |
US7832098B2 (en) | 2010-11-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP1843650A3 (de) | Mehrschichtige Leiterplatte und Verfahren zu deren Herstellung | |
EP1117283A4 (de) | Gedruckte leiterplatte und verfahren zu deren herstellung | |
EP1194021A3 (de) | Verfahren zur Herstellung einer mehrschichtigen Leiterplatte und mehrschichtige Leiterplatte | |
US6453549B1 (en) | Method of filling plated through holes | |
EP1699279A3 (de) | Mehrlagen Schaltungsplatte und Verfahren zur Herstellung | |
KR100240915B1 (ko) | 회로 기판 및 그의 제조 방법 | |
EP0952762A4 (de) | Leiterplatte und verfahren zur herstellung | |
EP1744609A3 (de) | Gedruckte mehrlagige Schaltungsplatte und Verfahren zur Herstellung | |
EP2111087A3 (de) | Galvanisierlösung, Verfahren zur Herstellung einer Mehrschicht-Leiterplatte unter Verwendung der Lösung und Mehrschicht-Leiterplatte | |
EP1087647A2 (de) | Dünne Verpackung mit integriertem Widerstand/Kondensator/Induktor und Verfahren zu deren Herstellung | |
EP0817549A3 (de) | Leiterplatte und Verfahren zu ihrer Herstellung | |
EP0997935A4 (de) | Gedruckte leitterplatte und verfahren zu deren herstellung | |
SG78343A1 (en) | Method for producing vias in the manufacture of printed wiring boards | |
EP1041867A3 (de) | Gedruckte Schaltungsplatte und Verfahren zur Herstellung | |
EP1271644A4 (de) | Leiterplatte, halbleiterbauelement und verfahren zur herstellung der leiterplatte | |
WO2003092045A3 (en) | Method for producing an electrical circuit | |
EP0282625A3 (de) | Verfahren zur Herstellung einer gedruckten Mehrschichtleiterplatte vom starren Typ | |
EP1069811A3 (de) | Mehrschichtige Leiterplatte und Verfahren zu deren Herstellung | |
EP1194024A4 (de) | Mehrschichtige gedruckte leiterplatte und ihre herstellungsmethode | |
EP1102523A4 (de) | Leiterplatte und verfahren zu ihrer herstellung | |
EP1146780A3 (de) | Leiterplatte und Verfahren zu deren Herstellung | |
EP1713312A3 (de) | Verfahren zur Herstellung einer Leiterplatte | |
WO2003030254A3 (en) | Process for assembling systems and structure thus obtained | |
WO2000046877A3 (en) | Printed circuit boards with solid interconnect and method of producing the same | |
EP1835052A3 (de) | Verfahren zur Herstellung einer mehrschichtigen Leiterplatte und mehrschichtige Leiterplatte |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
PUAL | Search report despatched |
Free format text: ORIGINAL CODE: 0009013 |
|
17P | Request for examination filed |
Effective date: 20070808 |
|
AC | Divisional application: reference to earlier application |
Ref document number: 1121008 Country of ref document: EP Kind code of ref document: P |
|
AK | Designated contracting states |
Kind code of ref document: A2 Designated state(s): DE FI GB NL |
|
AK | Designated contracting states |
Kind code of ref document: A3 Designated state(s): DE FI GB NL |
|
AKX | Designation fees paid |
Designated state(s): DE FI GB NL |
|
17Q | First examination report despatched |
Effective date: 20080627 |
|
GRAP | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOSNIGR1 |
|
RIC1 | Information provided on ipc code assigned before grant |
Ipc: H05K 3/46 20060101AFI20110901BHEP Ipc: B23K 26/38 20060101ALI20110901BHEP Ipc: H05K 3/00 20060101ALI20110901BHEP Ipc: H05K 3/38 20060101ALI20110901BHEP |
|
RTI1 | Title (correction) |
Free format text: METHOD OF MANUFACTURING A MULTILAYERED PRINTED CIRCUIT BOARD |
|
GRAS | Grant fee paid |
Free format text: ORIGINAL CODE: EPIDOSNIGR3 |
|
GRAA | (expected) grant |
Free format text: ORIGINAL CODE: 0009210 |
|
RIN1 | Information on inventor provided before grant (corrected) |
Inventor name: SHOUDA, ATSUSHI Inventor name: HIROSE, NAOHIRO Inventor name: SEGAWA, HIROSHI Inventor name: NODA, KOUTA Inventor name: ASANO, KOUJI Inventor name: EN, HONJIN Inventor name: TSUKADA, KIYOTAKA Inventor name: ISHIDA, NAOTO |
|
AC | Divisional application: reference to earlier application |
Ref document number: 1121008 Country of ref document: EP Kind code of ref document: P |
|
AK | Designated contracting states |
Kind code of ref document: B1 Designated state(s): DE FI GB NL |
|
REG | Reference to a national code |
Ref country code: GB Ref legal event code: FG4D |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R096 Ref document number: 69944092 Country of ref document: DE Effective date: 20120503 |
|
REG | Reference to a national code |
Ref country code: NL Ref legal event code: VDEP Effective date: 20120307 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: NL Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20120307 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: FI Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20120307 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: DE Payment date: 20120831 Year of fee payment: 14 |
|
PLBE | No opposition filed within time limit |
Free format text: ORIGINAL CODE: 0009261 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT |
|
26N | No opposition filed |
Effective date: 20121210 |
|
GBPC | Gb: european patent ceased through non-payment of renewal fee |
Effective date: 20120730 |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R097 Ref document number: 69944092 Country of ref document: DE Effective date: 20121210 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: GB Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20120730 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: DE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20140201 |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R119 Ref document number: 69944092 Country of ref document: DE Effective date: 20140201 |