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EP0910002A1 - Verfahren zur Herstellung eines sehr genauen Stroms - Google Patents

Verfahren zur Herstellung eines sehr genauen Stroms Download PDF

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Publication number
EP0910002A1
EP0910002A1 EP97117804A EP97117804A EP0910002A1 EP 0910002 A1 EP0910002 A1 EP 0910002A1 EP 97117804 A EP97117804 A EP 97117804A EP 97117804 A EP97117804 A EP 97117804A EP 0910002 A1 EP0910002 A1 EP 0910002A1
Authority
EP
European Patent Office
Prior art keywords
transistor
current
value
terminal
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP97117804A
Other languages
English (en)
French (fr)
Other versions
EP0910002B1 (de
Inventor
Tim Bales
Serge Bitz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EM Microelectronic Marin SA
Original Assignee
EM Microelectronic Marin SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EM Microelectronic Marin SA filed Critical EM Microelectronic Marin SA
Priority to EP97117804A priority Critical patent/EP0910002B1/de
Priority to DE69739232T priority patent/DE69739232D1/de
Priority to AT97117804T priority patent/ATE421723T1/de
Priority to TW087116619A priority patent/TW437137B/zh
Priority to JP10290688A priority patent/JPH11249751A/ja
Priority to US09/173,162 priority patent/US6137273A/en
Publication of EP0910002A1 publication Critical patent/EP0910002A1/de
Application granted granted Critical
Publication of EP0910002B1 publication Critical patent/EP0910002B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is DC
    • G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only

Definitions

  • the present invention relates to means for power supply. It relates more precisely to means for supplying high precision current to a external element intended to be connected to these means.
  • FIG. 1 represents a circuit comprising a first example of current supply means 1 classics intended to be connected, by a line of connection 5, to an element 3 outside this circuit.
  • the means 1 are arranged to provide element 3 with a current I1 at a desired predetermined value or value nominal, this value being designated by the reference Io.
  • the means 1 comprise a operational amplifier A1, and a transistor effect T1 field.
  • the means 1 further comprise integrated resistors such as effect transistors field operating in ohmic regime, the reference Rint denoting the resistance equivalent to all of these integrated resistors.
  • the different components of the means 1 are produced by a CMOS type manufacturing widely used in the semiconductor industry. It goes without saying that these components also include a connection terminal to a voltage source (not shown) arranged for supply a supply voltage Vdd to these components.
  • the transistor T1 produced by a die of the type mentioned above typically includes a drain terminal D, a source terminal S and a gate terminal G. Terminal D of transistor T1 is connected to the external element 3 by line 5, and terminal S of transistor T1 is connected to one of the terminals of the resistor Rint.
  • the operational amplifier A1 typically comprises a inverting terminal, a non-inverting terminal and a exit. The inverting terminal of the amplifier operational A1 is connected to supply means tension (not shown) arranged to provide a reference voltage Vref, its non-inverting terminal is connected to terminal S of transistor T1, and the terminal of output of operational amplifier A1 is connected to terminal G of transistor T1.
  • the latter becomes stable when the voltage present at the non-inverting terminal of operational amplifier A1 (i.e. voltage present at the source terminal S) is substantially equal to that present at the non-inverting terminal of operational amplifier A1 (i.e. voltage Vref).
  • the output voltage of the operational amplifier A1 is substantially constant, so this voltage supplied to terminal G of transistor T1, maintains the current I1 which flows through this transistor T1 equal to its nominal value.
  • Figure 2 shows a circuit comprising a second example of means for 6 conventional current supply. We note that this circuit is similar to that shown in Figure 1. Thus, the components shown in Figure 2 and designated by the same references as those represented in FIG. 1, are identical to those designated in figure 1.
  • the means 6 are connected to a Rext external resistance to these means.
  • Rext resistance is connected between terminal S of transistor T1 and the mass.
  • the resistor Rext represented in FIG. 2 allows the current I1 to be adjusted to its nominal value.
  • a drawback of the means of current supply shown in Figure 2 is that it requires the realization of a Rext resistance having a low resistance value, in case the value of current I1 to be supplied must be high. Indeed, in considering that the supply voltage Vdd is known and constant, the voltage present between terminal D of the transistor T1 and the mass is thus determined and substantially constant. As a result, a high value Rext resistance has the effect of reducing the voltage present between terminal D of transistor T1 and its terminal S, since the Rext resistor is connected in series with the external element 3 and the transistor T1. It is therefore necessary to increase the dimensions of the active surface of transistor T1, so that the current I1 flowing through it is equal to said predetermined value.
  • An object of the present invention is to provide means for supplying high precision current, these means remedying the aforementioned drawbacks.
  • Another object of the present invention is to provide such means of current supply, without that it is necessary to integrate with these means additional adjustment elements.
  • Another object of the present invention is to provide such means of current supply, without that it is necessary to connect to these means a external adjustment resistance having a low value of resistance, in case the value of the current to be supplied must be high.
  • Another object of the present invention is to provide such means of current supply capable of supplying current with precision improved, especially in the case of variations in electrical parameters of the external element connected to these means.
  • Another object of the present invention is to provide such means that meet the criteria traditional in the semiconductor industry, complexity, size and cost.
  • An advantage of the arrangement of the means of supply current according to the present invention is able to adjust the value of first current by the value of resistance of the external resistance, without the need for connect additional adjustment elements on the conduction line of the first current. This allows ability to determine dimensions of different components of these means by optimizing the dimensions of the first transistor.
  • Another advantage of the arrangement of the means of current supply according to the present invention is ability to connect external resistance with value of usual resistance, while guaranteeing precision of this resistance of the order of ⁇ 1%, and a low cost of purchase.
  • An advantage of the first and second transistors is to be connected to operate in saturation mode, this has the effect of maintaining the current flowing in the first transistor at its nominal value, especially in the case where the voltage present between the drain terminal of this transistor and its source terminal is modified.
  • Figure 3 shows an electrical diagram of a circuit comprising a first embodiment of current supply means 30 according to the present invention.
  • the means 30 are intended to be connected, by a connection line 5, to an element 3 outside these means.
  • the means 30 are arranged to provide element 3 a first current I3 at a value predetermined desired or nominal value.
  • the means 30 comprise a operational amplifier A2 and at least a first transistor T3 arranged so that the value of the current I3 which passes through it is substantially equal to its value nominal.
  • the various components of the circuit shown in Figure 3 are preferably made by a Widespread CMOS-type manufacturing in the semiconductor industry. It's obvious that these components also include a terminal connection to a voltage source (not shown) arranged to supply a supply voltage Vdd to these components.
  • the voltage source provides a voltage regulated supply, i.e. a voltage Vdd which is substantially constant.
  • the transistor T3 produced by a die of the aforementioned type typically comprises a drain terminal D, a source terminal S and a gate terminal G. It is noted that the terminal G serves as the control terminal of the transistor T3, and is intended for receive a control signal V G. Terminal D of transistor T3 is connected to external element 3 via line 5, and terminal S of transistor T3 is connected to ground.
  • the operational amplifier A2 typically comprises an inverting terminal, a non-inverting terminal and an output terminal connected to the terminal G of the transistor T3 to supply it with the control signal V G.
  • the inverting terminal of the operational amplifier A2 is connected to voltage supply means (not shown) arranged to supply a reference voltage Vref.
  • FIG. 4 shows an example of a diagram electric means of supplying voltage reference 40 intended to be connected to the circuit of the Figure 3.
  • the means 40 include first and second resistors designated R1 and R2, respectively.
  • One of the two terminals of the resistor R1 receives the supply voltage Vdd of the power source also supplying the circuit of FIG. 3, its other terminal is connected with one of the two terminals of the resistance R2, and the other terminal of this resistance is Grounding.
  • the resistance connection point R1 and R2 provide the reference voltage Vref which is proportional to the supply voltage Vdd.
  • the resistance values of resistors R1 and R2 must be chosen to provide a voltage value of reference which is commonly found near the middle the dynamic operating range of the amplifier operational A2. In the case of a typical example, for a voltage Vdd equal to 2 V, the reference voltage Vref is around 1V.
  • the operational amplifier A2 is chosen as a function of the value of the voltage V G to be supplied to the transistor T3, and of the impedance present on the terminal G.
  • the means 30 further include a second transistor T4 arranged to so that it is crossed by a second current I4.
  • the transistor T4 is produced by a type of die CMOS, and typically includes a drain terminal D, a source terminal S and a gate terminal G. It is noted that the terminal G serves as the control terminal of transistor T4.
  • the terminal G of the transistor T4 is connected to that of the transistor T3, so that the control signal V G makes it possible to control both the transistor T3 and the transistor T4.
  • Terminal D of transistor T4 is connected to terminal non-inverting of the operational amplifier A2, and the terminal S of transistor T4 is connected to ground.
  • the transistor T3 and the transistor T4 are advantageously connected to operate in saturation.
  • the transistor T3 is arranged so that the value of the current I3 flowing through the transistor T3 operating in saturation mode, is substantially equal to said nominal value of current I3.
  • the transistor T4 advantageously has a function for monitoring the control voltage V G of the transistor T3, and that it is arranged in a feedback loop making it possible to keep the control voltage V substantially constant. G , which keeps the current I3 flowing in the transistor T3 at a substantially constant value.
  • the transistor T4 is made for have a structure having a symmetry identical to that of transistor T3. This has the effect that the T3 transistors and T4 have common operating characteristics, such as the threshold voltage. We usually speak of "matching" between the two transistors T3 and T4.
  • an external resistor Re1 is connected to means 30 so that the value of current I3 is equal to its nominal value, as will be described below.
  • the resistance external Re1 is connected between terminal D of the transistor T4 and a terminal connected to receive the voltage supply Vdd of said voltage source.
  • the external resistance Re1 makes it possible to advantageously adjust the value of the current I3. Indeed, considering the preferred case where the transistors T3 and T4 are "matched", the resistance Re1 makes it possible to fix the output voltage of the operational amplifier A2, that is to say the control voltage V G of the transistors T4 and T3. It follows that the voltage present between terminal D of transistor T3 and its terminal S, is thus fixed by the value of the external resistance Re1. In other words, the current value I3 passing through the transistor T3 is adjusted by the resistance value of the resistor Re1, to be substantially equal to its nominal value.
  • active area dimensions are typically the length and width of the conduction channel, in the case of a conventional MOS transistor.
  • FIG. 5 represents a diagram electrical of a circuit comprising a second mode of realization of the current supply means 50 according to the present invention, in the event that the voltage Vdd power is supplied by a source such as an accumulator.
  • supply voltage Vdd depends on the load present in the accumulator, i.e. this voltage is not not constant over time.
  • terminal D of transistor T4 of means 50 is connected to one of the terminals of a external resistance Re2, via a current 51 known per se, the other terminal of the resistance Re2 being connected to ground. It turns out that the current flowing through resistor Re2 is I4 / m, the reference m designating the ratio of the current mirror. Typically the ratio is of the order of 2.
  • the resistance value of the external resistance Re2 is around 10 k ⁇ , this value having been obtained by calculations.
  • resistors having a such value, and guaranteeing an accuracy of the order of ⁇ 1%, as well as a low cost, unlike the Rext external resistance described in relation to the figure 2.
  • the resistance value of the resistance Re2 depends in particular on the ratio m.
  • the means of supply current according to the present invention may include a plurality of first identical transistors, each transistor being provided with a control terminal, and the control terminals of these transistors all being connected to the amplifier output terminal operational.
  • the means 30 can include a transistor T4 and n identical transistors T3 to transistor T4. So the dimensions of the surface active transistors T3 are identical to those of transistor T4, and the current I3 supplied by the means 30 (respectively, the means 50) is therefore equal to n times the current I4, which makes it possible to supply a high I3 current.
  • the nominal value of the current I3 is 50 mA, and we want to make 50 T3 transistors likely to be able to each supply a value of 1 mA. Furthermore, we know that the external element 3 is likely to provide a determined voltage between the terminals D and S of transistor T3.
  • the dimensions of the active surface of the transistor T3 are then determined, so that the value of the current I3, when the transistor T3 operates in saturation mode, is equal to 1 mA. Consequently, the value of the control signal V G (that is to say of the gate voltage of the transistors T3 and T4) is determined by the drain current-drain-source voltage characteristic as a function of the gate voltage.
  • resistance Re1 is chosen so that the voltage present between its terminals is equal to the voltage present between terminals D and S of transistor T3, when resistance Re1 is crossed by a value of current I4 equal to 1 mA.
  • Figure 6 shows a curve 60 illustrating the time evolution of the current supplied by the means according to the present invention, following a setting under tension of these means.
  • the reference t0 indicates the moment when the circuit shown in Figure 3 is turned on, and the reference t1 designates the time from which the operation of this circuit is stable. So in assuming that the supply voltage Vdd is 2 V, the Applicant of the present invention has measured that the stabilization time is then of the order of 2 ⁇ s.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electrical Variables (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Amplifiers (AREA)
EP97117804A 1997-10-15 1997-10-15 Verfahren zur Herstellung eines sehr genauen Stroms Expired - Lifetime EP0910002B1 (de)

Priority Applications (6)

Application Number Priority Date Filing Date Title
EP97117804A EP0910002B1 (de) 1997-10-15 1997-10-15 Verfahren zur Herstellung eines sehr genauen Stroms
DE69739232T DE69739232D1 (de) 1997-10-15 1997-10-15 Verfahren zur Herstellung eines sehr genauen Stroms
AT97117804T ATE421723T1 (de) 1997-10-15 1997-10-15 Verfahren zur herstellung eines sehr genauen stroms
TW087116619A TW437137B (en) 1997-10-15 1998-10-07 Means for supplying a high precision current
JP10290688A JPH11249751A (ja) 1997-10-15 1998-10-13 高精度電流供給手段
US09/173,162 US6137273A (en) 1997-10-15 1998-10-15 Circuit for supplying a high precision current to an external element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP97117804A EP0910002B1 (de) 1997-10-15 1997-10-15 Verfahren zur Herstellung eines sehr genauen Stroms

Publications (2)

Publication Number Publication Date
EP0910002A1 true EP0910002A1 (de) 1999-04-21
EP0910002B1 EP0910002B1 (de) 2009-01-21

Family

ID=8227481

Family Applications (1)

Application Number Title Priority Date Filing Date
EP97117804A Expired - Lifetime EP0910002B1 (de) 1997-10-15 1997-10-15 Verfahren zur Herstellung eines sehr genauen Stroms

Country Status (6)

Country Link
US (1) US6137273A (de)
EP (1) EP0910002B1 (de)
JP (1) JPH11249751A (de)
AT (1) ATE421723T1 (de)
DE (1) DE69739232D1 (de)
TW (1) TW437137B (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6462620B1 (en) 2000-09-12 2002-10-08 Silicon Laboratories, Inc. RF power amplifier circuitry and method for amplifying signals
US6549071B1 (en) 2000-09-12 2003-04-15 Silicon Laboratories, Inc. Power amplifier circuitry and method using an inductance coupled to power amplifier switching devices
US6917245B2 (en) 2000-09-12 2005-07-12 Silicon Laboratories, Inc. Absolute power detector
US6448847B1 (en) 2000-09-12 2002-09-10 Silicon Laboratories, Inc. Apparatus and method for providing differential-to-single ended conversion and impedance transformation
US6392488B1 (en) 2000-09-12 2002-05-21 Silicon Laboratories, Inc. Dual oxide gate device and method for providing the same
US6362606B1 (en) * 2000-09-12 2002-03-26 Silicon Laboratories, Inc Method and apparatus for regulating a voltage
US6828859B2 (en) * 2001-08-17 2004-12-07 Silicon Laboratories, Inc. Method and apparatus for protecting devices in an RF power amplifier
US6894565B1 (en) * 2002-12-03 2005-05-17 Silicon Laboratories, Inc. Fast settling power amplifier regulator
US6897730B2 (en) * 2003-03-04 2005-05-24 Silicon Laboratories Inc. Method and apparatus for controlling the output power of a power amplifier
GB2407721B (en) * 2003-10-28 2008-01-02 Micron Technology Europ Ltd MOS linear region impedance curvature correction.
JP4712398B2 (ja) * 2005-01-17 2011-06-29 ローム株式会社 半導体装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4399399A (en) * 1981-12-21 1983-08-16 Motorola, Inc. Precision current source
US4706013A (en) * 1986-11-20 1987-11-10 Industrial Technology Research Institute Matching current source
US5124632A (en) * 1991-07-01 1992-06-23 Motorola, Inc. Low-voltage precision current generator
US5291123A (en) * 1992-09-09 1994-03-01 Hewlett-Packard Company Precision reference current generator

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7307378A (de) * 1973-05-28 1974-12-02
JPS52114250A (en) * 1976-03-22 1977-09-24 Nec Corp Transistor circuit
JPS55611A (en) * 1978-06-09 1980-01-07 Toshiba Corp Constant current circuit
JPS5672350A (en) * 1979-11-19 1981-06-16 Advantest Corp Variable current source
US4700144A (en) * 1985-10-04 1987-10-13 Gte Communication Systems Corporation Differential amplifier feedback current mirror
US4808907A (en) * 1988-05-17 1989-02-28 Motorola, Inc. Current regulator and method
US5107199A (en) * 1990-12-24 1992-04-21 Xerox Corporation Temperature compensated resistive circuit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4399399A (en) * 1981-12-21 1983-08-16 Motorola, Inc. Precision current source
US4706013A (en) * 1986-11-20 1987-11-10 Industrial Technology Research Institute Matching current source
US5124632A (en) * 1991-07-01 1992-06-23 Motorola, Inc. Low-voltage precision current generator
US5291123A (en) * 1992-09-09 1994-03-01 Hewlett-Packard Company Precision reference current generator

Also Published As

Publication number Publication date
TW437137B (en) 2001-05-28
EP0910002B1 (de) 2009-01-21
ATE421723T1 (de) 2009-02-15
DE69739232D1 (de) 2009-03-12
US6137273A (en) 2000-10-24
JPH11249751A (ja) 1999-09-17

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