EP0898304A3 - Structure et procédé pour un MOS à canla à dopage assymmétrique - Google Patents

Structure et procédé pour un MOS à canla à dopage assymmétrique Download PDF

Info

Publication number: EP0898304A3
Authority: EP; European Patent Office
Prior art keywords: channel; drain; region; source; ldd
Prior art date: 1997-08-21
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Granted

Application number

EP98306253A

Other languages

German (de)

English (en)

Other versions

EP0898304A2 (fr

EP0898304B1 (fr

Inventor

Sheng Teng Hsu

Jong Jan Lee

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Sharp Corp

Sharp Microelectronics Technology Inc

Original Assignee

Sharp Corp

Sharp Microelectronics Technology Inc

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1997-08-21

Filing date

1998-08-05

Publication date

2000-06-14

1998-08-05 Application filed by Sharp Corp, Sharp Microelectronics Technology Inc filed Critical Sharp Corp

1998-08-05 Priority to EP05016748A priority Critical patent/EP1605501A1/fr

1999-02-24 Publication of EP0898304A2 publication Critical patent/EP0898304A2/fr

2000-06-14 Publication of EP0898304A3 publication Critical patent/EP0898304A3/fr

2007-01-24 Application granted granted Critical

2007-01-24 Publication of EP0898304B1 publication Critical patent/EP0898304B1/fr

2018-08-05 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Classifications

- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
- H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
- H10D30/6717—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions the source and the drain regions being asymmetrical
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
- H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile

Landscapes

Insulated Gate Type Field-Effect Transistor (AREA)
Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Thin Film Transistor (AREA)

EP98306253A 1997-08-21 1998-08-05 Procédé de fabrication d'une structure MOS à canal à dopage assymmétrique Expired - Lifetime EP0898304B1 (fr)

Priority Applications (1)

Application Number	Priority Date	Filing Date	Title
EP05016748A EP1605501A1 (fr)	1997-08-21	1998-08-05	Structure et procédé pour un MOS à canal à dopage assymmétrique

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
US08/918,678 US5891782A (en)	1997-08-21	1997-08-21	Method for fabricating an asymmetric channel doped MOS structure
US918678		2001-07-30

Related Child Applications (1)

Application Number	Title	Priority Date	Filing Date
EP05016748A Division EP1605501A1 (fr)	1997-08-21	1998-08-05	Structure et procédé pour un MOS à canal à dopage assymmétrique

Publications (3)

Publication Number	Publication Date
EP0898304A2 EP0898304A2 (fr)	1999-02-24
EP0898304A3 true EP0898304A3 (fr)	2000-06-14
EP0898304B1 EP0898304B1 (fr)	2007-01-24

Family

ID=25440770

Family Applications (2)

Application Number	Title	Priority Date	Filing Date
EP05016748A Ceased EP1605501A1 (fr)	1997-08-21	1998-08-05	Structure et procédé pour un MOS à canal à dopage assymmétrique
EP98306253A Expired - Lifetime EP0898304B1 (fr)	1997-08-21	1998-08-05	Procédé de fabrication d'une structure MOS à canal à dopage assymmétrique

Family Applications Before (1)

Application Number	Title	Priority Date	Filing Date
EP05016748A Ceased EP1605501A1 (fr)	1997-08-21	1998-08-05	Structure et procédé pour un MOS à canal à dopage assymmétrique

Country Status (6)

Country	Link
US (1)	US5891782A (fr)
EP (2)	EP1605501A1 (fr)
JP (1)	JPH1197709A (fr)
KR (1)	KR100276775B1 (fr)
DE (1)	DE69836941T2 (fr)
TW (1)	TW447024B (fr)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US6027978A (en) *	1997-01-28	2000-02-22	Advanced Micro Devices, Inc.	Method of making an IGFET with a non-uniform lateral doping profile in the channel region
JP4242461B2 (ja) *	1997-02-24	2009-03-25	株式会社半導体エネルギー研究所	半導体装置の作製方法
US6605845B1 (en) *	1997-09-30	2003-08-12	Intel Corporation	Asymmetric MOSFET using spacer gate technique
US6180983B1 (en) *	1998-07-17	2001-01-30	National Semiconductor Corporation	High-voltage MOS transistor on a silicon on insulator wafer
US6291325B1 (en) *	1998-11-18	2001-09-18	Sharp Laboratories Of America, Inc.	Asymmetric MOS channel structure with drain extension and method for same
US6482724B1 (en) *	1999-09-07	2002-11-19	Texas Instruments Incorporated	Integrated circuit asymmetric transistors
KR100374551B1 (ko) *	2000-01-27	2003-03-04	주식회사 하이닉스반도체	반도체 소자 및 그 제조방법
US6667512B1 (en)	2000-01-28	2003-12-23	Advanced Micro Devices, Inc.	Asymmetric retrograde halo metal-oxide-semiconductor field-effect transistor (MOSFET)
US6274441B1 (en)	2000-04-27	2001-08-14	International Business Machines Corporation	Method of forming bitline diffusion halo under gate conductor ledge
US7217977B2 (en) *	2004-04-19	2007-05-15	Hrl Laboratories, Llc	Covert transformation of transistor properties as a circuit protection method
SE519382C2 (sv) *	2000-11-03	2003-02-25	Ericsson Telefon Ab L M	Integrering av självinriktade MOS-högspänningskomponenter samt halvledarstruktur innefattande sådana
US6803317B2 (en) *	2002-08-16	2004-10-12	Semiconductor Components Industries, L.L.C.	Method of making a vertical gate semiconductor device
US7049667B2 (en)	2002-09-27	2006-05-23	Hrl Laboratories, Llc	Conductive channel pseudo block process and circuit to inhibit reverse engineering
AU2003293540A1 (en) *	2002-12-13	2004-07-09	Raytheon Company	Integrated circuit modification using well implants
CN100373633C (zh) *	2003-08-20	2008-03-05	友达光电股份有限公司	不对称的薄膜晶体管结构
US7242063B1 (en)	2004-06-29	2007-07-10	Hrl Laboratories, Llc	Symmetric non-intrusive and covert technique to render a transistor permanently non-operable
US8168487B2 (en)	2006-09-28	2012-05-01	Hrl Laboratories, Llc	Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer
US8471234B2 (en) *	2009-01-20	2013-06-25	Hewlett-Packard Development Company, L.P.	Multilayer memristive devices
US8895327B1 (en)	2011-12-09	2014-11-25	Suvolta, Inc.	Tipless transistors, short-tip transistors, and methods and circuits therefor
US9653617B2 (en)	2015-05-27	2017-05-16	Sandisk Technologies Llc	Multiple junction thin film transistor
CN113066857A (zh) *	2021-03-24	2021-07-02	中国科学技术大学	高品质因数氧化镓晶体管及其制备方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
EP0588370A2 (fr) *	1992-09-18	1994-03-23	Matsushita Electric Industrial Co., Ltd.	Procédé de fabrication d'un transistor à couche mince et dispositif à semiconducteur utilisable pour affichage à cristal liquide
US5395772A (en) *	1990-11-23	1995-03-07	Sony Corporation	SOI type MOS transistor device
US5401982A (en) *	1994-03-03	1995-03-28	Xerox Corporation	Reducing leakage current in a thin-film transistor with charge carrier densities that vary in two dimensions

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP3343968B2 (ja) *	1992-12-14	2002-11-11	ソニー株式会社	バイポーラ型半導体装置およびその製造方法
JPH07106512A (ja) *	1993-10-04	1995-04-21	Sharp Corp	分子イオン注入を用いたｓｉｍｏｘ処理方法
TW304301B (fr) *	1994-12-01	1997-05-01	At & T Corp
US5510279A (en) *	1995-01-06	1996-04-23	United Microelectronics Corp.	Method of fabricating an asymmetric lightly doped drain transistor device
JP3193845B2 (ja) *	1995-05-24	2001-07-30	シャープ株式会社	半導体装置及びその製造方法
US5985708A (en) *	1996-03-13	1999-11-16	Kabushiki Kaisha Toshiba	Method of manufacturing vertical power device

1997
- 1997-08-21 US US08/918,678 patent/US5891782A/en not_active Expired - Fee Related
1998
- 1998-07-10 JP JP10195720A patent/JPH1197709A/ja active Pending
- 1998-07-31 TW TW087112634A patent/TW447024B/zh not_active IP Right Cessation
- 1998-08-05 DE DE69836941T patent/DE69836941T2/de not_active Expired - Fee Related
- 1998-08-05 EP EP05016748A patent/EP1605501A1/fr not_active Ceased
- 1998-08-05 EP EP98306253A patent/EP0898304B1/fr not_active Expired - Lifetime
- 1998-08-21 KR KR1019980033933A patent/KR100276775B1/ko not_active IP Right Cessation

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5395772A (en) *	1990-11-23	1995-03-07	Sony Corporation	SOI type MOS transistor device
EP0588370A2 (fr) *	1992-09-18	1994-03-23	Matsushita Electric Industrial Co., Ltd.	Procédé de fabrication d'un transistor à couche mince et dispositif à semiconducteur utilisable pour affichage à cristal liquide
US5401982A (en) *	1994-03-03	1995-03-28	Xerox Corporation	Reducing leakage current in a thin-film transistor with charge carrier densities that vary in two dimensions

Also Published As

Publication number	Publication date
EP0898304A2 (fr)	1999-02-24
KR19990023765A (ko)	1999-03-25
TW447024B (en)	2001-07-21
EP0898304B1 (fr)	2007-01-24
EP1605501A1 (fr)	2005-12-14
KR100276775B1 (ko)	2001-03-02
JPH1197709A (ja)	1999-04-09
DE69836941T2 (de)	2007-10-18
US5891782A (en)	1999-04-06
DE69836941D1 (de)	2007-03-15

Publication	Publication Date	Title
EP0898304A3 (fr)	2000-06-14	Structure et procédé pour un MOS à canla à dopage assymmétrique
JP3108439B2 (ja)	2000-11-13	発生する確率の低減されたパンチスルーと、低いＲＤＳｏｎとを備えた溝型電界効果トランジスタ
US7625793B2 (en)	2009-12-01	Power MOS device with improved gate charge performance
US4364073A (en)	1982-12-14	Power MOSFET with an anode region
EP1089344A3 (fr)	2003-07-23	Transistor à effet de champ à grille isolée et procédé pour sa fabrication
US6680224B2 (en)	2004-01-20	Methods of forming and operating field effect transistors having gate and sub-gate electrodes
EP0803911A3 (fr)	1998-04-15	Structure de canal d'un transistor à effet de champ et d'un élément CMOS
TW369729B (en)	1999-09-11	A method for forming a MOSFET using a disposable gate
TW345693B (en)	1998-11-21	LDMOS device with self-aligned RESURF region and method of fabrication
EP0820096A3 (fr)	2000-08-30	Dispositif semi-conducteur et son procédé de fabrication
EP1306905A3 (fr)	2008-06-04	MOSFET latéral de puissance
US5569937A (en)	1996-10-29	High breakdown voltage silicon carbide transistor
EP0847091A3 (fr)	1998-10-07	Transistors à basse tension pour EEPROM et NVRAM et procédé de fabrication
EP1137072A3 (fr)	2003-11-12	Dispositif semi-conducteur comprenant un matériau du type groupe III / nitrure et procédé pour sa fabrication
EP1253634A3 (fr)	2005-08-31	Dispositif semi-conducteur
EP1003223A3 (fr)	2001-01-03	Méthode de fabrication d'un TFT
EP0746036A3 (fr)	1998-04-08	HIGFET et son procédé de fabrication
EP1006589A3 (fr)	2000-09-27	Transistor MOS à couche mince et méthode de fabrication
EP1521298A3 (fr)	2008-07-09	Méthode de fabrication d'un transistor à effet de champ à haute tension
EP1111687A3 (fr)	2005-07-06	FET et son procédé de fabrication
WO1999034449A3 (fr)	1999-09-16	Transistor en couche mince a haute tension a caracteristiques d'etat passant ameliorees et son procede de production
EP0969516A3 (fr)	2004-09-15	MOSFET avec region de source/drain structurée et sa methode de fabrication
EP0851507A3 (fr)	1999-05-19	Méthode de fabrication d'un transistor DMOS
EP0981166A3 (fr)	2000-04-19	Transistor JFET
KR19990022793A (ko)	1999-03-25	반도체 칩 연결 영역을 갖는 고전압 래터럴 금속 산화물 반도체전계 효과 트랜지스터 세마이콘덕터-온-인슐레이터 디바이스

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Date	Code	Title	Description
1999-01-08	PUAI	Public reference made under article 153(3) epc to a published international application that has entered the european phase	Free format text: ORIGINAL CODE: 0009012
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2000-06-14	RTI1	Title (correction)	Free format text: ASYMMETRIC CHANNEL DOPED MOS STRUCTURE AND METHOD
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2005-09-21	RTI1	Title (correction)	Free format text: METHOD OF FABRICATING AN ASYMMETRIC CHANNEL DOPED MOS STRUCTURE
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