DE971922C - Circuit arrangement for a frequency multiplier - Google Patents

Description

ISSUED APRIL 16, 1959

L 1220J VIIIa 121 α ⁴

Oskar Bettinger, Pforzheim

has been named as the inventor

Patent issued April 2, 1959

In electronic frequency multiplication, the frequency to be multiplied is known to be fed to the grid of an amplifier tube, in whose anode circuit a on a harmonic of the To be multiplied fundamental frequency tuned oscillation circuit is available, which the desired Harmonic of the fundamental wave is taken. In this process now occurs many times the oscillation circuit still has a considerable proportion of fundamental waves, and it. there is a desire to do this To reduce the fundamental wave portion.

Circuit arrangements are known, for example, for filtering out the second harmonic, specifically for transmitter stages, which have two responses to this harmonic Use coordinated short-circuit circuits that consist of separate capacities and one of these common Exist inductance. However, these known arrangements do not allow the oscillation circuit to be designed for optimal conditions, as the additional capacities used there as well as the additionally usable inductances must be taken into account and also in relation still represent a finite parallel resistance on the harmonic. Finally, with this arrangement still a number of additional switching elements required, namely z. B. the ones to be used variable inductances as well as the already mentioned two capacitances. It will thus be here not only the already existing switching elements to suppress the undesired ones

80? 781/3

Vibrations are used, but a number of other switching elements are required. It is also known insert additional blocking circles in the anode circle. Finally, arrangements b knows, in which the tuning capacitor is divided and the suction circuit from a part of this Capacities and inductances of the circuit is formed. The invention uses on the other hand the anode filter capacitor as a capacitance for the suction circuit of the fundamental wave and applies these measures especially with frequency multipliers. It is precisely here that the beneficial effects arise, because the value of the capacitor in this way is considerably greater than that of the resonant circuit capacitor is, while he even if one in known other arrangements the capacitor would be dimensioned as part of a suction circuit matched to the fundamental wave, his Capacitance value after would be too small to act as a filter capacitor and as a derivative for the high Frequencies to act. Only by the fact that the circuit arrangement for frequency multipliers is used, the filter capacitor is in any case larger than the capacitor of the resonant circuit, since in the resonant circuit of the anode circuit higher frequency than the base frequency is processed. The circuit arrangement according to the invention for a frequency multiplier is thus characterized in that the filter capacitor for the The anode voltage is dimensioned so that it connects to the anode resonant circuit, which is based on the Frequency is matched, forms a suction circuit for the fundamental wave.

Fig. Ι of the drawing shows the usual circuit of such a frequency multiplier. The frequency to be multiplied is fed to the grid of a tube R , in the anode circuit of the tube there is an oscillating circuit S tuned to a harmonic, via which the multiplied frequency is picked up. The anode voltage for the tube R is fed in via the resistor W , and the capacitor C is used to divert the HF current and as a filter element.

The circuit arrangement according to the invention for a frequency multiplier is now characterized in that that the filter capacitor C is dimensioned for the anode voltage so that it with the anode resonant circuit, which is tuned to the frequency to be multiplied, a suction circuit forms for the fundamental wave.

In many cases, instead of a simple oscillation ^{circuit vS 1,} a two-circuit or multi-circuit band filter is used to filter out the desired harmonic. Such a circuit is shown in Fig. 2 according to the further development of the inventions _5S dung, the secondary circuit of the bandpass filter is grounded B via a capacitor C ₁ in addition, in this circuit, which is dimensioned such that they with the secondary circuit also has an absorption circuit for the fundamental wave forms. R ₂ is the amplifier tube for amplifying the multiplied frequency. In the arrangement of FIG. 2, two suction circuits are used by the use of only one additional capacitor C ₁ for the weakening of the fundamental wave. gg

Claims (2)

Patent claims: i. Circuit arrangement for a frequency multiplier, in which a parallel circuit and another capacitor a desired frequency and another, unwanted frequency is suppressed, characterized in that the filter capacitor (C) is dimensioned for the anode voltage so that it connects to the anode resonant circuit, which is matched to the frequency to be multiplied, a suction circuit for the Fundamental wave forms. 2. Circuit arrangement according to claim 1, characterized in that with band filter coupling of the multiplier with the next stage of the secondary circuit of the band filter via a Capacitance is grounded, which is dimensioned so that it is a suction circuit for the secondary circuit forms the fundamental wave. Considered publications: German patent specifications No. 666 138, 551 950, 852560; Book "Ultra-High-Frequency-Techniques" by D. van Mostrand, New York, 1942, p. 10; »Textbook of radio reception technology« by H. Pitsch, 1948, p. 215. 1 sheet of drawings © 509659/144 2.56 (809 781/8 4.59)