[go: up one dir, main page]

DE69837134D1 - Herstellung eines mehrschichtigen keramischen Substrats mit einem passiven Bauelement - Google Patents

Herstellung eines mehrschichtigen keramischen Substrats mit einem passiven Bauelement

Info

Publication number
DE69837134D1
DE69837134D1 DE69837134T DE69837134T DE69837134D1 DE 69837134 D1 DE69837134 D1 DE 69837134D1 DE 69837134 T DE69837134 T DE 69837134T DE 69837134 T DE69837134 T DE 69837134T DE 69837134 D1 DE69837134 D1 DE 69837134D1
Authority
DE
Germany
Prior art keywords
production
ceramic substrate
multilayer ceramic
passive component
passive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69837134T
Other languages
English (en)
Other versions
DE69837134T2 (de
Inventor
Sadaaki Sakamoto
Hirofumi Sunahara
Yukio Sakabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP24230697A external-priority patent/JP3669404B2/ja
Priority claimed from JP09321856A external-priority patent/JP3129261B2/ja
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Publication of DE69837134D1 publication Critical patent/DE69837134D1/de
Application granted granted Critical
Publication of DE69837134T2 publication Critical patent/DE69837134T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/186Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383Multilayer substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10636Leadless chip, e.g. chip capacitor or resistor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1126Firing, i.e. heating a powder or paste above the melting temperature of at least one of its constituents
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/43Electric condenser making
    • Y10T29/435Solid dielectric type
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49163Manufacturing circuit on or in base with sintering of base

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
DE69837134T 1997-09-08 1998-09-04 Herstellung eines mehrschichtigen keramischen Substrats mit einem passiven Bauelement Expired - Lifetime DE69837134T2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP24230697 1997-09-08
JP24230697A JP3669404B2 (ja) 1997-09-08 1997-09-08 多層セラミック基板の製造方法
JP09321856A JP3129261B2 (ja) 1997-11-25 1997-11-25 多層セラミック基板の製造方法
JP32185697 1997-11-25

Publications (2)

Publication Number Publication Date
DE69837134D1 true DE69837134D1 (de) 2007-04-05
DE69837134T2 DE69837134T2 (de) 2007-06-21

Family

ID=26535712

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69837134T Expired - Lifetime DE69837134T2 (de) 1997-09-08 1998-09-04 Herstellung eines mehrschichtigen keramischen Substrats mit einem passiven Bauelement

Country Status (4)

Country Link
US (1) US6241838B1 (de)
EP (1) EP0901316B1 (de)
KR (1) KR100317469B1 (de)
DE (1) DE69837134T2 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020053734A1 (en) * 1993-11-16 2002-05-09 Formfactor, Inc. Probe card assembly and kit, and methods of making same
US20100065963A1 (en) 1995-05-26 2010-03-18 Formfactor, Inc. Method of wirebonding that utilizes a gas flow within a capillary from which a wire is played out
ATE365443T1 (de) * 1998-04-24 2007-07-15 Matsushita Electric Ind Co Ltd Verfahren zur herstellung eines keramischen mehrschichtigen substrats
JP3687484B2 (ja) 1999-06-16 2005-08-24 株式会社村田製作所 セラミック基板の製造方法および未焼成セラミック基板
JP3646587B2 (ja) * 1999-10-27 2005-05-11 株式会社村田製作所 多層セラミック基板およびその製造方法
JP3554962B2 (ja) * 1999-10-28 2004-08-18 株式会社村田製作所 複合積層体およびその製造方法
US7262611B2 (en) * 2000-03-17 2007-08-28 Formfactor, Inc. Apparatuses and methods for planarizing a semiconductor contactor
JP3407716B2 (ja) * 2000-06-08 2003-05-19 株式会社村田製作所 複合積層電子部品
US6841740B2 (en) 2000-06-14 2005-01-11 Ngk Spark Plug Co., Ltd. Printed-wiring substrate and method for fabricating the same
CN100488437C (zh) * 2000-07-10 2009-05-20 尤妮佳股份有限公司 清扫物品
JP2002246503A (ja) * 2001-02-16 2002-08-30 Philips Japan Ltd 電子部品及びその製造方法
US6545346B2 (en) * 2001-03-23 2003-04-08 Intel Corporation Integrated circuit package with a capacitor
JP2002368422A (ja) * 2001-04-04 2002-12-20 Murata Mfg Co Ltd 多層セラミック基板及びその製造方法
US6729019B2 (en) * 2001-07-11 2004-05-04 Formfactor, Inc. Method of manufacturing a probe card
US6963493B2 (en) * 2001-11-08 2005-11-08 Avx Corporation Multilayer electronic devices with via components
DE10302104A1 (de) * 2003-01-21 2004-08-05 Friwo Gerätebau Gmbh Verfahren zum Herstellen von Schaltungsträgern mit intergrierten passiven Bauelementen
WO2006030562A1 (ja) * 2004-09-13 2006-03-23 Murata Manufacturing Co., Ltd. チップ型電子部品内蔵型多層基板及びその製造方法
JP4310468B2 (ja) * 2004-10-29 2009-08-12 株式会社村田製作所 セラミック多層基板及びその製造方法
KR100790694B1 (ko) * 2006-06-30 2008-01-02 삼성전기주식회사 캐패시터 내장형 ltcc 기판 제조방법
JP5293605B2 (ja) * 2007-09-10 2013-09-18 株式会社村田製作所 セラミック多層基板及びその製造方法
JP4883224B2 (ja) 2009-01-07 2012-02-22 株式会社村田製作所 低温焼結セラミック材料およびセラミック基板
US10014843B2 (en) * 2013-08-08 2018-07-03 Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd. Multilayer electronic structures with embedded filters
DE102018104972B4 (de) * 2018-03-05 2022-06-23 Schweizer Electronic Ag Leiterplattenelement mit integriertem elektronischen Schaltelement, Stromrichter und Verfahren zum Herstellen eines Leiterplattenelements
DE102020205043B4 (de) * 2020-04-21 2024-07-04 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung eingetragener Verein Verfahren zur Herstellung einer Leistungshalbleiterbauelementanordnung oder Leistungshalbleiterbauelementeinhausung

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2162167B (en) * 1984-06-01 1988-01-20 Narumi China Corp Ceramic substrate material
US4748085A (en) * 1985-11-16 1988-05-31 Narumi China Corporation Multilayer ceramic circuit board fired at a low temperature
US5130067A (en) * 1986-05-02 1992-07-14 International Business Machines Corporation Method and means for co-sintering ceramic/metal mlc substrates
GB2197540B (en) * 1986-11-12 1991-04-17 Murata Manufacturing Co A circuit structure.
US5085720A (en) * 1990-01-18 1992-02-04 E. I. Du Pont De Nemours And Company Method for reducing shrinkage during firing of green ceramic bodies
US5370759A (en) * 1992-05-20 1994-12-06 Matsushita Electric Industrial Co., Ltd. Method for producing multilayered ceramic substrate
US5470412A (en) * 1992-07-30 1995-11-28 Sumitomo Metal Ceramics Inc. Process for producing a circuit substrate
US5312674A (en) 1992-07-31 1994-05-17 Hughes Aircraft Company Low-temperature-cofired-ceramic (LTCC) tape structures including cofired ferromagnetic elements, drop-in components and multi-layer transformer
US5456778A (en) * 1992-08-21 1995-10-10 Sumitomo Metal Ceramics Inc. Method of fabricating ceramic circuit substrate
US5661882A (en) * 1995-06-30 1997-09-02 Ferro Corporation Method of integrating electronic components into electronic circuit structures made using LTCC tape
JPH0992983A (ja) 1995-07-17 1997-04-04 Sumitomo Kinzoku Electro Device:Kk セラミック多層基板の製造方法
JPH0992978A (ja) 1995-09-21 1997-04-04 Sumitomo Metal Mining Co Ltd コンデンサ内蔵ガラスセラミック基板
US6042667A (en) * 1996-03-13 2000-03-28 Sumotomo Metal Electronics Devices, Inc. Method of fabricating ceramic multilayer substrate
JP3039426B2 (ja) * 1997-03-04 2000-05-08 株式会社村田製作所 積層セラミックコンデンサ

Also Published As

Publication number Publication date
KR19990029631A (ko) 1999-04-26
KR100317469B1 (ko) 2002-02-19
US6241838B1 (en) 2001-06-05
EP0901316A2 (de) 1999-03-10
EP0901316B1 (de) 2007-02-21
DE69837134T2 (de) 2007-06-21
EP0901316A3 (de) 2000-11-22

Similar Documents

Publication Publication Date Title
DE69837134D1 (de) Herstellung eines mehrschichtigen keramischen Substrats mit einem passiven Bauelement
DE69835659D1 (de) Mehrschichtiges keramisches Substrat mit einem passiven Bauelement, sowie Herstellungsverfahren
DE69328390D1 (de) Verfahren zur Herstellung eines mehrlagigen Substrats
DE69305939D1 (de) Verfahren zur Herstellung eines keramischen Schaltungssubstrates
DE69416881D1 (de) Beschichtung von elektronischen Substraten mit Silika aus Polysilazanen
ATA77695A (de) Bildung einer silberbeschichtung auf einem glasartigen substrat
DE60038756D1 (de) Methode und Herstellung eines Keramik-Mehrlagensubstrats
DE69825517D1 (de) Herstellungsverfahren eines Halbleiter-Substrats
DE69833222D1 (de) Mehrlagige deckschicht und herstellungsverfahren
DE69514435D1 (de) Metallisiertes Keramiksubstrat mit glatter Plattierungsschicht und Herstellungsverfahren
DE69508816D1 (de) Substrat für integrierte Bauelemente mit einer Dünnschicht und Herstellungsverfahren
DE69718263D1 (de) Mit einem Substrat verbundene Gegenstände aus PTFE
DE69603331D1 (de) Herstellungsverfahren von einem elektronischen vielschichtbauteil
DE69421799D1 (de) Mit einem trockenmittel überzogenes substrat und methode zur dessen herstellung
DE69320451D1 (de) Mit Kohlenstoff überzogene inorganische Substrate
DE69523930D1 (de) Zusammensetzungen eines mehrschichtgegenstandes mit fluorpolymerlage
DE69710609D1 (de) Herstellungsverfahern eines integrierten schaltkreises mit unterschiedlicher gateoxidedicke
DE69528611D1 (de) Verfahren zur Herstellung eines Halbleitersubstrates
BR9703488A (pt) Processo para produção de um revestimento aderente opaco sobre a superfície de um substrato e de um artigo aglutinante e substrato e artigo aglutinante
DE69206742D1 (de) Verfahren zur Herstellung von Keramikkörpern mit Honigwabenstruktur
DE69835934D1 (de) Mehrlagiges keramisches Elektronikbauteil und dessen Herstellungsverfahren
DE69300506D1 (de) Herstellungsverfahren von mehrlagigen keramischen Substraten.
DE69306600D1 (de) Verfahren zur Herstellung eines mehrschichtigen Leitersubstrats
DE69309358D1 (de) Verfahren zur Herstellung eines Schaltungssubstrats
DE69514583D1 (de) Verbinden einer Metallschicht mit einem Glasträger

Legal Events

Date Code Title Description
8364 No opposition during term of opposition