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DE69727810D1 - Digitalisierungssystem mit kohaerenter abtastung - Google Patents

Digitalisierungssystem mit kohaerenter abtastung

Info

Publication number
DE69727810D1
DE69727810D1 DE69727810T DE69727810T DE69727810D1 DE 69727810 D1 DE69727810 D1 DE 69727810D1 DE 69727810 T DE69727810 T DE 69727810T DE 69727810 T DE69727810 T DE 69727810T DE 69727810 D1 DE69727810 D1 DE 69727810D1
Authority
DE
Germany
Prior art keywords
digitalization system
coherent
scan
coherent scan
digitalization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69727810T
Other languages
English (en)
Other versions
DE69727810T2 (de
Inventor
Dean Reynolds
Aureli Slizynski
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Credence Systems Corp
Original Assignee
Credence Systems Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Credence Systems Corp filed Critical Credence Systems Corp
Application granted granted Critical
Publication of DE69727810D1 publication Critical patent/DE69727810D1/de
Publication of DE69727810T2 publication Critical patent/DE69727810T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/3193Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G01R31/31937Timing aspects, e.g. measuring propagation delay
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/3167Testing of combined analog and digital circuits
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31917Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31922Timing generation or clock distribution

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Complex Calculations (AREA)
  • Analogue/Digital Conversion (AREA)
DE69727810T 1996-07-19 1997-01-17 Digitalisierungssystem mit kohaerenter abtastung Expired - Fee Related DE69727810T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/684,466 US5708432A (en) 1996-07-19 1996-07-19 Coherent sampling digitizer system
US684466 1996-07-19
PCT/US1997/000973 WO1998004044A1 (en) 1996-07-19 1997-01-17 Coherent sampling digitizer system

Publications (2)

Publication Number Publication Date
DE69727810D1 true DE69727810D1 (de) 2004-04-01
DE69727810T2 DE69727810T2 (de) 2004-11-25

Family

ID=24748156

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69727810T Expired - Fee Related DE69727810T2 (de) 1996-07-19 1997-01-17 Digitalisierungssystem mit kohaerenter abtastung

Country Status (6)

Country Link
US (1) US5708432A (de)
EP (1) EP0913033B1 (de)
JP (1) JP3514466B2 (de)
KR (1) KR100338238B1 (de)
DE (1) DE69727810T2 (de)
WO (1) WO1998004044A1 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2331645B (en) * 1997-11-21 2001-07-25 Ericsson Telefon Ab L M Signal processing
US6477553B1 (en) * 1999-01-13 2002-11-05 Philip Druck Measurement scale for non-uniform data sampling in N dimensions
JP2001027652A (ja) * 1999-07-13 2001-01-30 Teratec:Kk コヒーレント・サンプリング方法と装置
US6751566B2 (en) * 2000-05-29 2004-06-15 Advantest Corporation Sampling digitizer, method for sampling digitizing, and semiconductor integrated circuit test device with sampling digitizer
US7957525B2 (en) * 2003-10-31 2011-06-07 Ntt Docomo, Inc. Encryption and signature schemes using message mappings to reduce the message size
US7265694B2 (en) * 2004-03-25 2007-09-04 Texas Instruments Incorporated System and method for successive approximation
US7353126B1 (en) * 2004-12-20 2008-04-01 Credence Systems Corporation Method of determining coherent test conditions
US7285946B2 (en) * 2005-02-07 2007-10-23 Lecroy Corporation Pattern trigger in a coherent timebase
US20060177018A1 (en) * 2005-02-07 2006-08-10 Lecroy Corporation Coherent interleaved sampling
JP5064663B2 (ja) * 2005-06-16 2012-10-31 大日本印刷株式会社 書類管理システム
US8554815B1 (en) * 2006-11-09 2013-10-08 Applied Micro Circuits Corporation Frequency generation using a single reference clock and a primitive ratio of integers
JP2013185876A (ja) * 2012-03-06 2013-09-19 Mega Chips Corp 電流測定装置
US10333696B2 (en) 2015-01-12 2019-06-25 X-Prime, Inc. Systems and methods for implementing an efficient, scalable homomorphic transformation of encrypted data with minimal data expansion and improved processing efficiency
US10020968B1 (en) 2015-03-18 2018-07-10 National Technology & Engineering Solutions Of Sandia, Llc Coherent radar receiver that comprises a sigma delta modulator
US11496232B1 (en) 2021-05-03 2022-11-08 Nihon Kohden Digital Health Solutions, Inc. Waveform synchronization system for data received from a network

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5589763A (en) * 1995-05-16 1996-12-31 Texas Instruments Incorporated Coherent undersampling digitizer for use with automatic field test equipment

Also Published As

Publication number Publication date
DE69727810T2 (de) 2004-11-25
JP2001526846A (ja) 2001-12-18
KR100338238B1 (ko) 2002-05-27
WO1998004044A1 (en) 1998-01-29
EP0913033A1 (de) 1999-05-06
US5708432A (en) 1998-01-13
JP3514466B2 (ja) 2004-03-31
KR20000067931A (ko) 2000-11-25
EP0913033B1 (de) 2004-02-25
EP0913033A4 (de) 1999-08-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee