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DE69431735D1 - Nichtflüchtiger Speicher - Google Patents

Nichtflüchtiger Speicher

Info

Publication number
DE69431735D1
DE69431735D1 DE69431735T DE69431735T DE69431735D1 DE 69431735 D1 DE69431735 D1 DE 69431735D1 DE 69431735 T DE69431735 T DE 69431735T DE 69431735 T DE69431735 T DE 69431735T DE 69431735 D1 DE69431735 D1 DE 69431735D1
Authority
DE
Germany
Prior art keywords
volatile memory
volatile
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69431735T
Other languages
English (en)
Inventor
Albert Fazio
E Atwood
Brennan, Jr
Marc Landgraf
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of DE69431735D1 publication Critical patent/DE69431735D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/021—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in voltage or current generators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C29/50004—Marginal testing, e.g. race, voltage or current testing of threshold voltage
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C2029/5004—Voltage
DE69431735T 1993-09-10 1994-08-31 Nichtflüchtiger Speicher Expired - Lifetime DE69431735D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/119,738 US5402370A (en) 1993-09-10 1993-09-10 Circuitry and method for selecting a drain programming voltage for a nonvolatile memory

Publications (1)

Publication Number Publication Date
DE69431735D1 true DE69431735D1 (de) 2002-12-19

Family

ID=22386068

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69431735T Expired - Lifetime DE69431735D1 (de) 1993-09-10 1994-08-31 Nichtflüchtiger Speicher
DE69424176T Expired - Lifetime DE69424176T2 (de) 1993-09-10 1994-08-31 Schaltung und verfahren zum wählen einer drain-programmierspannung für einen nichtflüchtigen speicher

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69424176T Expired - Lifetime DE69424176T2 (de) 1993-09-10 1994-08-31 Schaltung und verfahren zum wählen einer drain-programmierspannung für einen nichtflüchtigen speicher

Country Status (8)

Country Link
US (1) US5402370A (de)
EP (2) EP0982738B1 (de)
JP (1) JP3667756B2 (de)
KR (1) KR100261525B1 (de)
AU (1) AU7680894A (de)
DE (2) DE69431735D1 (de)
SG (1) SG47058A1 (de)
WO (1) WO1995007536A1 (de)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5218569A (en) * 1991-02-08 1993-06-08 Banks Gerald J Electrically alterable non-volatile memory with n-bits per memory cell
FR2718273B1 (fr) * 1994-03-31 1996-05-24 Sgs Thomson Microelectronics Mémoire intégrée avec circuit de maintien de la tension de colonne.
US5600593A (en) * 1994-12-06 1997-02-04 National Semiconductor Corporation Apparatus and method for reducing erased threshold voltage distribution in flash memory arrays
US6353554B1 (en) 1995-02-27 2002-03-05 Btg International Inc. Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell
US5801985A (en) 1995-07-28 1998-09-01 Micron Technology, Inc. Memory system having programmable control parameters
US5627784A (en) * 1995-07-28 1997-05-06 Micron Quantum Devices, Inc. Memory system having non-volatile data storage structure for memory control parameters and method
US5945705A (en) * 1995-08-01 1999-08-31 Advanced Micro Devices, Inc. Three-dimensional non-volatile memory
US5672524A (en) * 1995-08-01 1997-09-30 Advanced Micro Devices, Inc. Three-dimensional complementary field effect transistor process
DE19542029C1 (de) * 1995-11-10 1997-04-10 Siemens Ag Verfahren zum selbsttätigen Ermitteln der nötigen Hochspannung zum Programmieren/Löschen eines EEPROMs
US6005806A (en) * 1996-03-14 1999-12-21 Altera Corporation Nonvolatile configuration cells and cell arrays
EP0798743B1 (de) * 1996-03-29 2004-11-24 STMicroelectronics S.r.l. Anordnung zum Generieren einer Spannung als Funktion der Leitfähigkeit einer Elementarzelle, insbesondere für nichtflüchtige Speicher
JP3093649B2 (ja) * 1996-09-05 2000-10-03 九州日本電気株式会社 不揮発性半導体メモリ装置
US5687116A (en) * 1996-10-09 1997-11-11 Programmable Microelectronics Corp. Programming pulse ramp control circuit
US6052306A (en) * 1996-11-04 2000-04-18 Siemens Aktiengesellschaft Method and device for automatic determination of the required high voltage for programming/erasing an EEPROM
US5798966A (en) * 1997-03-31 1998-08-25 Intel Corporation Flash memory VDS compensation techiques to reduce programming variability
US6141247A (en) * 1997-10-24 2000-10-31 Micron Technology, Inc. Non-volatile data storage unit and method of controlling same
US6147908A (en) * 1997-11-03 2000-11-14 Cypress Semiconductor Corp. Stable adjustable programming voltage scheme
US6128221A (en) * 1998-09-10 2000-10-03 Taiwan Semiconductor Manufacturing Co., Ltd. Circuit and programming method for the operation of flash memories to prevent programming disturbances
US6028790A (en) * 1999-01-07 2000-02-22 Macronix International Co., Ltd. Method and device for programming a non-volatile memory cell by controlling source current pulldown rate
KR100629962B1 (ko) * 1999-06-23 2006-09-29 주식회사 하이닉스반도체 플래쉬 메모리 셀의 드레인 전압 발생 회로
EP1128391A1 (de) * 2000-02-22 2001-08-29 STMicroelectronics S.r.l. Verfahren und Schalterkreisarchitekur zur Prüfung einer integrierten Schaltung mit einem programmierbaren, nicht-flüchtigen Speicher
US6292399B1 (en) * 2000-07-03 2001-09-18 Advanced Micro Devices, Inc. Method and low-power circuits used to generate accurate drain voltage for flash memory core cells in read mode
EP1176603A1 (de) * 2000-07-26 2002-01-30 STMicroelectronics S.r.l. Nichtflüchtiger Speicher mit einer Ladungspumpe mit einer geregelten Spannung
JP4167640B2 (ja) * 2004-10-14 2008-10-15 シャープ株式会社 不揮発性メモリのプログラム電圧決定方法
JP2010055735A (ja) * 2008-07-31 2010-03-11 Panasonic Corp 半導体記憶装置
KR100996108B1 (ko) * 2009-01-21 2010-11-22 주식회사 하이닉스반도체 불휘발성 메모리 장치의 프로그램 방법
KR101082692B1 (ko) 2009-12-31 2011-11-15 주식회사 하이닉스반도체 반도체 메모리 장치 및 이의 프로그램 방법
US9741436B2 (en) 2010-07-09 2017-08-22 Seagate Technology Llc Dynamically controlling an operation execution time for a storage device
US20130007348A1 (en) * 2011-07-01 2013-01-03 Apple Inc. Booting Raw Memory from a Host

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5172338B1 (en) * 1989-04-13 1997-07-08 Sandisk Corp Multi-state eeprom read and write circuits and techniques
US5163021A (en) * 1989-04-13 1992-11-10 Sundisk Corporation Multi-state EEprom read and write circuits and techniques
US4954990A (en) 1989-05-30 1990-09-04 Cypress Semiconductor Corp. Programming voltage control circuit for EPROMS
JP2606941B2 (ja) * 1990-02-19 1997-05-07 富士通株式会社 不揮発性メモリの書込み回路
US5218571A (en) * 1990-05-07 1993-06-08 Cypress Semiconductor Corporation EPROM source bias circuit with compensation for processing characteristics
JP3247402B2 (ja) * 1991-07-25 2002-01-15 株式会社東芝 半導体装置及び不揮発性半導体記憶装置

Also Published As

Publication number Publication date
US5402370A (en) 1995-03-28
EP0982738A1 (de) 2000-03-01
EP0722609B1 (de) 2000-04-26
WO1995007536A1 (en) 1995-03-16
KR100261525B1 (ko) 2000-07-15
EP0982738B1 (de) 2002-11-13
SG47058A1 (en) 1998-03-20
DE69424176D1 (de) 2000-05-31
JPH09502828A (ja) 1997-03-18
AU7680894A (en) 1995-03-27
EP0722609A1 (de) 1996-07-24
DE69424176T2 (de) 2000-12-14
JP3667756B2 (ja) 2005-07-06

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Legal Events

Date Code Title Description
8332 No legal effect for de