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DE69425348D1 - Verbindungsschicht für Halbleiterbauelement und Verfahren zu ihrer Herstellung - Google Patents

Verbindungsschicht für Halbleiterbauelement und Verfahren zu ihrer Herstellung

Info

Publication number
DE69425348D1
DE69425348D1 DE69425348T DE69425348T DE69425348D1 DE 69425348 D1 DE69425348 D1 DE 69425348D1 DE 69425348 T DE69425348 T DE 69425348T DE 69425348 T DE69425348 T DE 69425348T DE 69425348 D1 DE69425348 D1 DE 69425348D1
Authority
DE
Germany
Prior art keywords
production
connection layer
semiconductor components
semiconductor
components
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69425348T
Other languages
English (en)
Other versions
DE69425348T2 (de
Inventor
Masahiro Miyata
Hirokazu Ezawa
Naoaki Ogure
Manabu Tsujimura
Takeyuki Ohdaira
Hiroaki Inoue
Yukio Ikeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ebara Corp
Original Assignee
Ebara Corp
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ebara Corp, Toshiba Corp filed Critical Ebara Corp
Application granted granted Critical
Publication of DE69425348D1 publication Critical patent/DE69425348D1/de
Publication of DE69425348T2 publication Critical patent/DE69425348T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855—After-treatment introducing at least one additional element into the layer
    • H01L21/76858—After-treatment introducing at least one additional element into the layer by diffusing alloying elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53242—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53242—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold
    • H01L23/53247—Noble-metal alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE69425348T 1993-05-28 1994-05-27 Verbindungsschicht für Halbleiterbauelement und Verfahren zu ihrer Herstellung Expired - Fee Related DE69425348T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP12711793 1993-05-28
JP06093394A JP3256623B2 (ja) 1993-05-28 1994-03-30 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE69425348D1 true DE69425348D1 (de) 2000-08-31
DE69425348T2 DE69425348T2 (de) 2001-01-25

Family

ID=26401987

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69425348T Expired - Fee Related DE69425348T2 (de) 1993-05-28 1994-05-27 Verbindungsschicht für Halbleiterbauelement und Verfahren zu ihrer Herstellung

Country Status (5)

Country Link
US (1) US5500559A (de)
EP (1) EP0628998B1 (de)
JP (1) JP3256623B2 (de)
KR (1) KR0155004B1 (de)
DE (1) DE69425348T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5723171A (en) * 1992-10-23 1998-03-03 Symetrix Corporation Integrated circuit electrode structure and process for fabricating same
JP2679680B2 (ja) * 1995-04-24 1997-11-19 日本電気株式会社 半導体装置の製造方法
US6020266A (en) * 1997-12-31 2000-02-01 Intel Corporation Single step electroplating process for interconnect via fill and metal line patterning
JP3778239B2 (ja) * 1998-01-30 2006-05-24 株式会社荏原製作所 めっき装置及びそれを用いた基板の加工方法
US6100194A (en) * 1998-06-22 2000-08-08 Stmicroelectronics, Inc. Silver metallization by damascene method
US6169024B1 (en) 1998-09-30 2001-01-02 Intel Corporation Process to manufacture continuous metal interconnects
JP2001102479A (ja) 1999-09-27 2001-04-13 Toshiba Corp 半導体集積回路装置およびその製造方法
DE19959711A1 (de) * 1999-12-10 2001-06-21 Infineon Technologies Ag Verfahren zur Herstellung einer strukturierten Metallschicht
TWI251920B (en) * 2003-10-17 2006-03-21 Phoenix Prec Technology Corp Circuit barrier structure of semiconductor package substrate and method for fabricating the same
EP2210141A1 (de) * 2007-10-30 2010-07-28 Visionware Llc Progressives lesen und zwischendistanzlinse, definiert durch verwendung einer zernike-entwicklung
CN111029417A (zh) * 2019-12-02 2020-04-17 上海集成电路研发中心有限公司 一种光电探测器及其制备方法
KR102165201B1 (ko) 2020-06-22 2020-10-13 주식회사 세화 프라이버시 필터

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4082568A (en) * 1977-05-10 1978-04-04 Joseph Lindmayer Solar cell with multiple-metal contacts
JPS5688339A (en) * 1979-12-21 1981-07-17 Hitachi Ltd Dhd-sealed semiconductor device
DE3511082A1 (de) * 1985-03-27 1986-10-02 Telefunken electronic GmbH, 7100 Heilbronn Solarzelle
US4782380A (en) * 1987-01-22 1988-11-01 Advanced Micro Devices, Inc. Multilayer interconnection for integrated circuit structure having two or more conductive metal layers
US4954459A (en) * 1988-05-12 1990-09-04 Advanced Micro Devices, Inc. Method of planarization of topologies in integrated circuit structures
US5071714A (en) * 1989-04-17 1991-12-10 International Business Machines Corporation Multilayered intermetallic connection for semiconductor devices
JP2779207B2 (ja) * 1989-06-06 1998-07-23 富士通株式会社 半導体装置の製造方法
US5130275A (en) * 1990-07-02 1992-07-14 Digital Equipment Corp. Post fabrication processing of semiconductor chips
US5225372A (en) * 1990-12-24 1993-07-06 Motorola, Inc. Method of making a semiconductor device having an improved metallization structure
US5240497A (en) * 1991-10-08 1993-08-31 Cornell Research Foundation, Inc. Alkaline free electroless deposition

Also Published As

Publication number Publication date
DE69425348T2 (de) 2001-01-25
US5500559A (en) 1996-03-19
KR0155004B1 (ko) 1998-12-01
JP3256623B2 (ja) 2002-02-12
EP0628998B1 (de) 2000-07-26
EP0628998A1 (de) 1994-12-14
JPH07130736A (ja) 1995-05-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: EBARA CORP., TOKIO/TOKYO, JP

8339 Ceased/non-payment of the annual fee