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DE69233088D1 - Elektrisches Verbindungsteil und sein Herstellungsverfahren - Google Patents

Elektrisches Verbindungsteil und sein Herstellungsverfahren

Info

Publication number
DE69233088D1
DE69233088D1 DE69233088T DE69233088T DE69233088D1 DE 69233088 D1 DE69233088 D1 DE 69233088D1 DE 69233088 T DE69233088 T DE 69233088T DE 69233088 T DE69233088 T DE 69233088T DE 69233088 D1 DE69233088 D1 DE 69233088D1
Authority
DE
Germany
Prior art keywords
manufacturing process
electrical connector
connector
electrical
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69233088T
Other languages
English (en)
Other versions
DE69233088T2 (de
Inventor
Hiroshi Kondo
Tetsuo Yoshizawa
Toyohide Miyazaki
Yoshimi Terayama
Takashi Sakaki
Yuichi Ikegami
Takahiro Okabayashi
Kazuo Kondo
Yoichi Tamura
Yasuo Nakatsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Nippon Steel Corp
Original Assignee
Canon Inc
Sumitomo Metal Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP5390491A external-priority patent/JPH04269476A/ja
Priority claimed from JP5390691A external-priority patent/JPH04269477A/ja
Priority claimed from JP6909191A external-priority patent/JPH0645400A/ja
Priority claimed from JP03069092A external-priority patent/JP3101883B2/ja
Application filed by Canon Inc, Sumitomo Metal Industries Ltd filed Critical Canon Inc
Application granted granted Critical
Publication of DE69233088D1 publication Critical patent/DE69233088D1/de
Publication of DE69233088T2 publication Critical patent/DE69233088T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/486—Via connections through the substrate with or without pins
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49158—Manufacturing circuit on or in base with molding of insulated base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/4981—Utilizing transitory attached element or associated separate material
    • Y10T29/49812—Temporary protective coating, impregnation, or cast layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Manufacturing Of Electrical Connectors (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Multi-Conductor Connections (AREA)
DE69233088T 1991-02-25 1992-02-24 Elektrisches Verbindungsteil und sein Herstellungsverfahren Expired - Fee Related DE69233088T2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP5390491A JPH04269476A (ja) 1991-02-25 1991-02-25 電気的接続部材
JP5390691A JPH04269477A (ja) 1991-02-25 1991-02-25 電気的接続部材
JP6909191A JPH0645400A (ja) 1991-03-09 1991-03-09 電気的接続部材の製造方法
JP03069092A JP3101883B2 (ja) 1991-03-09 1991-03-09 電気的接続部材及びその製造方法

Publications (2)

Publication Number Publication Date
DE69233088D1 true DE69233088D1 (de) 2003-07-10
DE69233088T2 DE69233088T2 (de) 2003-12-24

Family

ID=27462979

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69233088T Expired - Fee Related DE69233088T2 (de) 1991-02-25 1992-02-24 Elektrisches Verbindungsteil und sein Herstellungsverfahren

Country Status (3)

Country Link
US (1) US5600884A (de)
EP (1) EP0501357B1 (de)
DE (1) DE69233088T2 (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0805493B1 (de) 1991-02-22 2007-02-28 Canon Kabushiki Kaisha Elektrischer Verbindungskörper und Herstellungsverfahren dafür
KR0146063B1 (ko) * 1995-03-28 1998-08-01 문정환 반도체 패키지 및 그 제조방법
JP3376218B2 (ja) * 1996-08-30 2003-02-10 キヤノン株式会社 回路基板接続装置
US6245996B1 (en) 1996-09-27 2001-06-12 Compaq Computer Corporation Electrical interconnect structure having electromigration-inhibiting segments
US6904675B1 (en) 1996-09-27 2005-06-14 Hewlett-Packard Development, L.P. Method of forming electrical interconnects having electromigration-inhibiting plugs
US6400018B2 (en) 1998-08-27 2002-06-04 3M Innovative Properties Company Via plug adapter
US6291776B1 (en) 1998-11-03 2001-09-18 International Business Machines Corporation Thermal deformation management for chip carriers
JP3162677B2 (ja) * 1998-12-10 2001-05-08 株式会社双晶テック 多点導電シート
SG82591A1 (en) * 1998-12-17 2001-08-21 Eriston Technologies Pte Ltd Bumpless flip chip assembly with solder via
US6462414B1 (en) 1999-03-05 2002-10-08 Altera Corporation Integrated circuit package utilizing a conductive structure for interlocking a conductive ball to a ball pad
US6524115B1 (en) * 1999-08-20 2003-02-25 3M Innovative Properties Company Compliant interconnect assembly
US6402970B1 (en) * 2000-08-22 2002-06-11 Charles W. C. Lin Method of making a support circuit for a semiconductor chip assembly
US6350386B1 (en) * 2000-09-20 2002-02-26 Charles W. C. Lin Method of making a support circuit with a tapered through-hole for a semiconductor chip assembly
AU2002220022A1 (en) * 2000-11-06 2002-05-15 Mcnc Method of connecting conductors on different levels of a microelectronic device and associated apparatus
TWI236329B (en) * 2003-12-25 2005-07-11 Au Optronics Corp Printed circuit board of display for preventing accumulation of thermal expansion
US7446399B1 (en) 2004-08-04 2008-11-04 Altera Corporation Pad structures to improve board-level reliability of solder-on-pad BGA structures
JP2007005246A (ja) * 2005-06-27 2007-01-11 Sumitomo Electric Ind Ltd 多孔質樹脂基材及び多層基板
JP2007030465A (ja) * 2005-07-29 2007-02-08 Fujifilm Holdings Corp 基板の製造方法、液体吐出ヘッドの製造方法、液体吐出ヘッド及び画像形成装置
US7595999B2 (en) * 2007-06-21 2009-09-29 Dell Products L.P. System and method for coupling an integrated circuit to a circuit board
US8618647B2 (en) * 2011-08-01 2013-12-31 Tessera, Inc. Packaged microelectronic elements having blind vias for heat dissipation
US20130113118A1 (en) * 2011-11-04 2013-05-09 Stats Chippac, Ltd. Semiconductor Device and Method of Forming Sloped Surface in Patterning Layer to Separate Bumps of Semiconductor Die from Patterning Layer
WO2018212277A1 (ja) * 2017-05-18 2018-11-22 信越ポリマー株式会社 電気コネクターおよびその製造方法
IT201700073501A1 (it) * 2017-06-30 2018-12-30 St Microelectronics Srl Prodotto a semiconduttore e corrispondente procedimento

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3193789A (en) * 1962-08-01 1965-07-06 Sperry Rand Corp Electrical circuitry
US4067945A (en) * 1976-03-24 1978-01-10 Essex International, Inc. Method of making a multi-circuit electrical interconnector
US4231811A (en) * 1979-09-13 1980-11-04 Intel Corporation Variable thickness self-aligned photoresist process
FR2519228A1 (fr) * 1981-12-29 1983-07-01 Inst Kolloidnoi Khim Connecteur electrique
US4766371A (en) * 1982-07-24 1988-08-23 Risho Kogyo Co., Ltd. Test board for semiconductor packages
US4641222A (en) * 1984-05-29 1987-02-03 Motorola, Inc. Mounting system for stress relief in surface mounted components
US5013249A (en) * 1986-06-19 1991-05-07 Labinal Components And Systems, Inc. Electrical connectors
EP0349756A3 (de) * 1988-05-30 1991-03-20 Canon Kabushiki Kaisha Herstellung einer elektrischen Schaltkreisvorrichtung
JP2702507B2 (ja) * 1988-05-31 1998-01-21 キヤノン株式会社 電気的接続部材及びその製造方法
US4991290A (en) * 1988-07-21 1991-02-12 Microelectronics And Computer Technology Flexible electrical interconnect and method of making
DE68929282T2 (de) * 1988-11-09 2001-06-07 Nitto Denko Corp., Ibaraki Leitersubstrat, Filmträger, Halbleiteranordnung mit dem Filmträger und Montagestruktur mit der Halbleiteranordnung
US4998885A (en) * 1989-10-27 1991-03-12 International Business Machines Corporation Elastomeric area array interposer
US5155302A (en) * 1991-06-24 1992-10-13 At&T Bell Laboratories Electronic device interconnection techniques

Also Published As

Publication number Publication date
DE69233088T2 (de) 2003-12-24
US5600884A (en) 1997-02-11
EP0501357A1 (de) 1992-09-02
EP0501357B1 (de) 2003-06-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee