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DE69228792D1 - Technik zum Reduzieren von Störungen durch Alphateilchen - Google Patents

Technik zum Reduzieren von Störungen durch Alphateilchen

Info

Publication number
DE69228792D1
DE69228792D1 DE69228792T DE69228792T DE69228792D1 DE 69228792 D1 DE69228792 D1 DE 69228792D1 DE 69228792 T DE69228792 T DE 69228792T DE 69228792 T DE69228792 T DE 69228792T DE 69228792 D1 DE69228792 D1 DE 69228792D1
Authority
DE
Germany
Prior art keywords
technology
reduce interference
alpha particles
alpha
particles
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69228792T
Other languages
English (en)
Other versions
DE69228792T2 (de
Inventor
Dureseti Chidambarrao
Rolf Henk Nijhuis
Gurumakonda Ramasam Srinivasan
Philip Clyde Murley
Gordon Jay Robbins
Timothy Lawton Walters
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE69228792D1 publication Critical patent/DE69228792D1/de
Publication of DE69228792T2 publication Critical patent/DE69228792T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H01L23/556—Protection against radiation, e.g. light or electromagnetic waves against alpha rays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
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    • H01L2224/0554—External layer
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111—Tin [Sn] as principal constituent
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13116—Lead [Pb] as principal constituent
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    • H01L2924/01014—Silicon [Si]
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    • H01L2924/01015—Phosphorus [P]
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    • H01L2924/01029—Copper [Cu]
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    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
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    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
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    • H01L2924/01082—Lead [Pb]
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    • H01L2924/01092—Uranium [U]
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    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
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    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30105—Capacitance
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    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
DE69228792T 1991-12-17 1992-11-19 Technik zum Reduzieren von Störungen durch Alphateilchen Expired - Fee Related DE69228792T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US80935791A 1991-12-17 1991-12-17

Publications (2)

Publication Number Publication Date
DE69228792D1 true DE69228792D1 (de) 1999-05-06
DE69228792T2 DE69228792T2 (de) 1999-10-07

Family

ID=25201136

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69228792T Expired - Fee Related DE69228792T2 (de) 1991-12-17 1992-11-19 Technik zum Reduzieren von Störungen durch Alphateilchen

Country Status (3)

Country Link
EP (1) EP0547989B1 (de)
JP (1) JP2755360B2 (de)
DE (1) DE69228792T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5990564A (en) * 1997-05-30 1999-11-23 Lucent Technologies Inc. Flip chip packaging of memory chips
DE10056869B4 (de) * 2000-11-16 2005-10-13 Advanced Micro Devices, Inc., Sunnyvale Halbleiterbauteil mit einer strahlungsabsorbierenden leitenden Schutzschicht und Verfahren zur Herstellung derselben
US7348210B2 (en) 2005-04-27 2008-03-25 International Business Machines Corporation Post bump passivation for soft error protection
US7381635B2 (en) * 2005-07-18 2008-06-03 International Business Machines Corporation Method and structure for reduction of soft error rates in integrated circuits
US8999764B2 (en) 2007-08-10 2015-04-07 International Business Machines Corporation Ionizing radiation blocking in IC chip to reduce soft errors
US8261229B2 (en) * 2010-01-29 2012-09-04 Xilinx, Inc. Method and apparatus for interconnect layout in an integrated circuit
US11152378B1 (en) 2020-03-25 2021-10-19 International Business Machines Corporation Reducing error rates with alpha particle protection

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5588356A (en) * 1978-12-27 1980-07-04 Hitachi Ltd Semiconductor device
JPH01194443A (ja) * 1988-01-29 1989-08-04 Hitachi Ltd 半導体装置の製造方法
JPH01286448A (ja) * 1988-05-13 1989-11-17 Hitachi Ltd 半導体装置の製造方法
EP0363297B1 (de) * 1988-10-03 1994-03-23 International Business Machines Corporation Kontaktständerstruktur für Halbleitervorrichtungen

Also Published As

Publication number Publication date
EP0547989B1 (de) 1999-03-31
EP0547989A3 (en) 1993-09-01
JP2755360B2 (ja) 1998-05-20
JPH05235000A (ja) 1993-09-10
DE69228792T2 (de) 1999-10-07
EP0547989A2 (de) 1993-06-23

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