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DE69212897D1 - Herstellungsverfahren für MIS-Halbleiterbauelement - Google Patents

Herstellungsverfahren für MIS-Halbleiterbauelement

Info

Publication number
DE69212897D1
DE69212897D1 DE69212897T DE69212897T DE69212897D1 DE 69212897 D1 DE69212897 D1 DE 69212897D1 DE 69212897 T DE69212897 T DE 69212897T DE 69212897 T DE69212897 T DE 69212897T DE 69212897 D1 DE69212897 D1 DE 69212897D1
Authority
DE
Germany
Prior art keywords
semiconductor device
manufacturing process
mis semiconductor
mis
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69212897T
Other languages
English (en)
Other versions
DE69212897T2 (de
Inventor
Makoto Onuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP3114875A external-priority patent/JPH04343268A/ja
Priority claimed from JP11487691A external-priority patent/JP3002009B2/ja
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Publication of DE69212897D1 publication Critical patent/DE69212897D1/de
Application granted granted Critical
Publication of DE69212897T2 publication Critical patent/DE69212897T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/27—ROM only
    • H10B20/30—ROM only having the source region and the drain region on the same level, e.g. lateral transistors
    • H10B20/34—Source electrode or drain electrode programmed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/84—Combinations of enhancement-mode IGFETs and depletion-mode IGFETs
DE69212897T 1991-05-20 1992-05-19 Herstellungsverfahren für MIS-Halbleiterbauelement Expired - Fee Related DE69212897T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP3114875A JPH04343268A (ja) 1991-05-20 1991-05-20 Ｍｉｓ型半導体装置およびその製造方法
JP11487691A JP3002009B2 (ja) 1991-05-20 1991-05-20 半導体装置

Publications (2)

Publication Number Publication Date
DE69212897D1 true DE69212897D1 (de) 1996-09-26
DE69212897T2 DE69212897T2 (de) 1997-03-13

Family

ID=26453526

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69212897T Expired - Fee Related DE69212897T2 (de) 1991-05-20 1992-05-19 Herstellungsverfahren für MIS-Halbleiterbauelement

Country Status (3)

Country Link
US (1) US5323048A (de)
EP (2) EP0514850B1 (de)
DE (1) DE69212897T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0729999A (ja) * 1993-07-15 1995-01-31 Mitsubishi Electric Corp 不揮発性半導体記憶装置およびその製造方法
JPH08107191A (ja) * 1994-05-05 1996-04-23 Advanced Micro Devices Inc 半導体装置のトランジスタアレイおよびトランジスタアレイの形成方法
US5380676A (en) * 1994-05-23 1995-01-10 United Microelectronics Corporation Method of manufacturing a high density ROM
US6096636A (en) * 1996-02-06 2000-08-01 Micron Technology, Inc. Methods of forming conductive lines
US5796148A (en) * 1996-05-31 1998-08-18 Analog Devices, Inc. Integrated circuits
JP3600393B2 (ja) * 1997-02-10 2004-12-15 株式会社東芝 半導体装置及びその製造方法
JP2002280463A (ja) * 2001-03-16 2002-09-27 Toshiba Corp 半導体装置及びその製造方法
DE10220586A1 (de) * 2002-05-08 2003-11-27 Infineon Technologies Ag Verfahren zum Entfernen von Resistschichten von einer Wolframoberfläche
JP4551913B2 (ja) * 2007-06-01 2010-09-29 株式会社東芝 半導体装置の製造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2102623B (en) * 1981-06-30 1985-04-11 Tokyo Shibaura Electric Co Method of manufacturing a semiconductors memory device
JPS609157A (ja) * 1983-06-29 1985-01-18 Fujitsu Ltd 読出し専用半導体記憶装置
JPS6016459A (ja) * 1983-07-08 1985-01-28 Nec Corp 読み出し専用記憶装置
JPS60163455A (ja) * 1984-02-03 1985-08-26 Toshiba Corp 読み出し専用記憶装置及びその製造方法
JPS60182763A (ja) * 1984-02-29 1985-09-18 Nec Corp 集積回路装置およびその製造方法
JPH03266462A (ja) * 1990-03-16 1991-11-27 Toshiba Micro Electron Kk 半導体記憶装置

Also Published As

Publication number Publication date
EP0514850A2 (de) 1992-11-25
EP0514850B1 (de) 1996-08-21
EP0630052A3 (de) 1995-03-15
EP0514850A3 (en) 1993-10-06
US5323048A (en) 1994-06-21
EP0630052A2 (de) 1994-12-21
DE69212897T2 (de) 1997-03-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee