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DE69124273D1 - Integrierte Halbleiterschaltung - Google Patents

Integrierte Halbleiterschaltung

Info

Publication number
DE69124273D1
DE69124273D1 DE69124273T DE69124273T DE69124273D1 DE 69124273 D1 DE69124273 D1 DE 69124273D1 DE 69124273 T DE69124273 T DE 69124273T DE 69124273 T DE69124273 T DE 69124273T DE 69124273 D1 DE69124273 D1 DE 69124273D1
Authority
DE
Germany
Prior art keywords
semiconductor circuit
integrated semiconductor
integrated
circuit
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69124273T
Other languages
English (en)
Other versions
DE69124273T2 (de
Inventor
Hiroyuki Hara
Yoshinori Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronic Device Solutions Corp
Original Assignee
Toshiba Corp
Toshiba Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Microelectronics Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69124273D1 publication Critical patent/DE69124273D1/de
Publication of DE69124273T2 publication Critical patent/DE69124273T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/996—Masterslice integrated circuits using combined field effect technology and bipolar technology
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
DE69124273T 1990-02-26 1991-02-21 Integrierte Halbleiterschaltung Expired - Fee Related DE69124273T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2042619A JP2501930B2 (ja) 1990-02-26 1990-02-26 半導体集積回路

Publications (2)

Publication Number Publication Date
DE69124273D1 true DE69124273D1 (de) 1997-03-06
DE69124273T2 DE69124273T2 (de) 1997-06-05

Family

ID=12641039

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69124273T Expired - Fee Related DE69124273T2 (de) 1990-02-26 1991-02-21 Integrierte Halbleiterschaltung

Country Status (5)

Country Link
US (1) US5444654A (de)
EP (1) EP0444524B1 (de)
JP (1) JP2501930B2 (de)
KR (1) KR940003838B1 (de)
DE (1) DE69124273T2 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0135798B1 (ko) * 1994-08-17 1998-04-24 김광호 전류증폭형 마스크-롬
IL116792A (en) * 1996-01-16 2000-01-31 Chip Express Israel Ltd Customizable integrated circuit device
US5745422A (en) * 1996-11-12 1998-04-28 International Business Machines Corporation Cross-coupled bitline segments for generalized data propagation

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59177944A (ja) * 1983-03-28 1984-10-08 Hitachi Ltd 半導体集積回路装置
JPS613390A (ja) * 1984-06-15 1986-01-09 Hitachi Ltd 記憶装置
JPS62189739A (ja) * 1986-02-17 1987-08-19 Hitachi Ltd 半導体集積回路装置
US4821235A (en) * 1986-04-17 1989-04-11 Fairchild Semiconductor Corporation Translinear static memory cell with bipolar and MOS devices
US4727046A (en) * 1986-07-16 1988-02-23 Fairchild Semiconductor Corporation Method of fabricating high performance BiCMOS structures having poly emitters and silicided bases
EP0523756A3 (en) * 1986-08-15 1993-06-09 Nec Corporation Static random access memory having bi-cmos construction
US4899308A (en) * 1986-12-11 1990-02-06 Fairchild Semiconductor Corporation High density ROM in a CMOS gate array
US4746817A (en) * 1987-03-16 1988-05-24 International Business Machines Corporation BIFET logic circuit
US4933899A (en) * 1989-02-01 1990-06-12 Cypress Semiconductor Bi-CMOS semiconductor memory cell

Also Published As

Publication number Publication date
US5444654A (en) 1995-08-22
KR920000134A (ko) 1992-01-10
KR940003838B1 (ko) 1994-05-03
DE69124273T2 (de) 1997-06-05
EP0444524B1 (de) 1997-01-22
JPH03246968A (ja) 1991-11-05
EP0444524A1 (de) 1991-09-04
JP2501930B2 (ja) 1996-05-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee