DE69110456D1 - Vorrichtung zum zwischenschichtplanieren von halbleitern. - Google Patents

Vorrichtung zum zwischenschichtplanieren von halbleitern.

Info

Publication number: DE69110456D1
Authority: DE; Germany
Prior art keywords: semiconductors; planning; interlayer; interlayer planning
Prior art date: 1990-03-22
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Revoked

Application number

DE69110456T

Other languages

English (en)

Other versions

DE69110456T2 (de

Inventor

Thomas Hyde

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Westech Systems Inc

Original Assignee

Westech Systems Inc

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1990-03-22

Filing date

1991-03-22

Publication date

1995-07-20

Family has litigation

First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=23977323&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE69110456(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.

1991-03-22 Application filed by Westech Systems Inc filed Critical Westech Systems Inc

1995-07-20 Application granted granted Critical

1995-07-20 Publication of DE69110456D1 publication Critical patent/DE69110456D1/de

1995-12-14 Publication of DE69110456T2 publication Critical patent/DE69110456T2/de

2011-03-23 Anticipated expiration legal-status Critical

Status Revoked legal-status Critical Current

Classifications

- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/11—Lapping tools
- B24B37/20—Lapping pads for working plane surfaces
- B24B37/22—Lapping pads for working plane surfaces characterised by a multi-layered structure

Landscapes

Engineering & Computer Science (AREA)
Mechanical Engineering (AREA)
Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
Mechanical Treatment Of Semiconductor (AREA)

DE69110456T 1990-03-22 1991-03-22 Vorrichtung zum zwischenschichtplanieren von halbleitern. Revoked DE69110456T2 (de)

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
US49755190A	1990-03-22	1990-03-22
PCT/US1991/001945 WO1991014538A1 (en)	1990-03-22	1991-03-22	Apparatus for interlayer planarization of semiconductor material

Publications (2)

Publication Number	Publication Date
DE69110456D1 true DE69110456D1 (de)	1995-07-20
DE69110456T2 DE69110456T2 (de)	1995-12-14

Family

ID=23977323

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE69110456T Revoked DE69110456T2 (de)	1990-03-22	1991-03-22	Vorrichtung zum zwischenschichtplanieren von halbleitern.

Country Status (4)

Country	Link
EP (1)	EP0521102B1 (de)
JP (3)	JP3442772B2 (de)
DE (1)	DE69110456T2 (de)
WO (1)	WO1991014538A1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5257478A (en) *	1990-03-22	1993-11-02	Rodel, Inc.	Apparatus for interlayer planarization of semiconductor material
JP2513426B2 (ja) *	1993-09-20	1996-07-03	日本電気株式会社	ウェ―ハ研磨装置
US5893796A (en) *	1995-03-28	1999-04-13	Applied Materials, Inc.	Forming a transparent window in a polishing pad for a chemical mechanical polishing apparatus
JP3329644B2 (ja) *	1995-07-21	2002-09-30	株式会社東芝	研磨パッド、研磨装置及び研磨方法
KR100189970B1 (ko) *	1995-08-07	1999-06-01	윤종용	웨이퍼 연마장치
US5692950A (en) *	1996-08-08	1997-12-02	Minnesota Mining And Manufacturing Company	Abrasive construction for semiconductor wafer modification
KR100574311B1 (ko) *	1998-08-28	2006-04-27	도레이 가부시끼가이샤	연마 패드
US6666751B1 (en)	2000-07-17	2003-12-23	Micron Technology, Inc.	Deformable pad for chemical mechanical polishing
JP2003100682A (ja)	2001-09-25	2003-04-04	Jsr Corp	半導体ウエハ用研磨パッド
JP3754436B2 (ja) *	2004-02-23	2006-03-15	東洋ゴム工業株式会社	研磨パッドおよびそれを使用する半導体デバイスの製造方法
JP2006245445A (ja) *	2005-03-07	2006-09-14	Nihon Micro Coating Co Ltd	研磨パッド
TWI349596B (en)	2007-03-20	2011-10-01	Kuraray Co	Cushion for polishing pad and polishing pad using the same
JP6434174B2 (ja) *	2018-01-29	2018-12-05	富士紡ホールディングス株式会社	研磨パッド及びその製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3504457A (en) *	1966-07-05	1970-04-07	Geoscience Instr Corp	Polishing apparatus
NL7101327A (de) *	1971-02-02	1972-08-04
US4132037A (en)	1977-02-28	1979-01-02	Siltec Corporation	Apparatus for polishing semiconductor wafers

1991
- 1991-03-22 EP EP91907378A patent/EP0521102B1/de not_active Revoked
- 1991-03-22 JP JP50664891A patent/JP3442772B2/ja not_active Expired - Lifetime
- 1991-03-22 WO PCT/US1991/001945 patent/WO1991014538A1/en not_active Application Discontinuation
- 1991-03-22 DE DE69110456T patent/DE69110456T2/de not_active Revoked
2003
- 2003-05-02 JP JP2003127128A patent/JP3560961B2/ja not_active Expired - Lifetime
2004
- 2004-03-08 JP JP2004064401A patent/JP3660933B2/ja not_active Expired - Lifetime

Also Published As

Publication number	Publication date
DE69110456T2 (de)	1995-12-14
EP0521102B1 (de)	1995-06-14
WO1991014538A1 (en)	1991-10-03
JP2003303794A (ja)	2003-10-24
JP3660933B2 (ja)	2005-06-15
JPH05505769A (ja)	1993-08-26
JP3442772B2 (ja)	2003-09-02
JP2004221611A (ja)	2004-08-05
JP3560961B2 (ja)	2004-09-02
EP0521102A1 (de)	1993-01-07

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Legal Events

Date	Code	Title	Description
1996-06-13	8363	Opposition against the patent
1998-01-15	8331	Complete revocation