[go: up one dir, main page]

DE69023018D1 - Prozessor-Unterbrechungssteuerung. - Google Patents

Prozessor-Unterbrechungssteuerung.

Info

Publication number
DE69023018D1
DE69023018D1 DE69023018T DE69023018T DE69023018D1 DE 69023018 D1 DE69023018 D1 DE 69023018D1 DE 69023018 T DE69023018 T DE 69023018T DE 69023018 T DE69023018 T DE 69023018T DE 69023018 D1 DE69023018 D1 DE 69023018D1
Authority
DE
Germany
Prior art keywords
interrupt control
processor interrupt
processor
control
interrupt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69023018T
Other languages
English (en)
Other versions
DE69023018T2 (de
Inventor
Tai-Lin Chang
Paul Wayne Hunter
Donald John Lang
Stephen Gouze Luning
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE69023018D1 publication Critical patent/DE69023018D1/de
Application granted granted Critical
Publication of DE69023018T2 publication Critical patent/DE69023018T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G06F13/26Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
DE69023018T 1989-02-13 1990-02-06 Prozessor-Unterbrechungssteuerung. Expired - Lifetime DE69023018T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/310,409 US5057997A (en) 1989-02-13 1989-02-13 Interruption systems for externally changing a context of program execution of a programmed processor

Publications (2)

Publication Number Publication Date
DE69023018D1 true DE69023018D1 (de) 1995-11-23
DE69023018T2 DE69023018T2 (de) 1996-05-30

Family

ID=23202368

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69023018T Expired - Lifetime DE69023018T2 (de) 1989-02-13 1990-02-06 Prozessor-Unterbrechungssteuerung.

Country Status (4)

Country Link
US (1) US5057997A (de)
EP (1) EP0383474B1 (de)
JP (1) JPH0612527B2 (de)
DE (1) DE69023018T2 (de)

Families Citing this family (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5142677A (en) * 1989-05-04 1992-08-25 Texas Instruments Incorporated Context switching devices, systems and methods
EP0757336B1 (de) 1995-08-04 2000-11-22 Belle Gate Investment B.V. Datenaustauschlsysteme mit tragbaren Datenverarbeitungseinheiten
US5504904A (en) * 1994-02-23 1996-04-02 International Business Machines Corporation Personal computer having operating system definition file for configuring computer system
US6601081B1 (en) * 1995-06-30 2003-07-29 Sun Microsystems, Inc. Method and apparatus for context maintenance in windows
US6385645B1 (en) * 1995-08-04 2002-05-07 Belle Gate Investments B.V. Data exchange system comprising portable data processing units
US5898864A (en) * 1995-09-25 1999-04-27 International Business Machines Corporation Method and system for executing a context-altering instruction without performing a context-synchronization operation within high-performance processors
US5708808A (en) * 1996-02-27 1998-01-13 Shoichi; Horio Method and apparatus for concurrency with critical regions
US5933627A (en) * 1996-07-01 1999-08-03 Sun Microsystems Thread switch on blocked load or store using instruction thread field
US5835788A (en) * 1996-09-18 1998-11-10 Electronics For Imaging System for transferring input/output data independently through an input/output bus interface in response to programmable instructions stored in a program memory
US6247040B1 (en) * 1996-09-30 2001-06-12 Lsi Logic Corporation Method and structure for automated switching between multiple contexts in a storage subsystem target device
US6148326A (en) * 1996-09-30 2000-11-14 Lsi Logic Corporation Method and structure for independent disk and host transfer in a storage subsystem target device
US6081849A (en) * 1996-10-01 2000-06-27 Lsi Logic Corporation Method and structure for switching multiple contexts in storage subsystem target device
US5805849A (en) * 1997-03-31 1998-09-08 International Business Machines Corporation Data processing system and method for using an unique identifier to maintain an age relationship between executing instructions
US5870582A (en) * 1997-03-31 1999-02-09 International Business Machines Corporation Method and apparatus for completion of non-interruptible instructions before the instruction is dispatched
US5913048A (en) * 1997-03-31 1999-06-15 International Business Machines Corporation Dispatching instructions in a processor supporting out-of-order execution
US6098167A (en) * 1997-03-31 2000-08-01 International Business Machines Corporation Apparatus and method for fast unified interrupt recovery and branch recovery in processors supporting out-of-order execution
US5887161A (en) * 1997-03-31 1999-03-23 International Business Machines Corporation Issuing instructions in a processor supporting out-of-order execution
US6192442B1 (en) * 1998-04-29 2001-02-20 Intel Corporation Interrupt controller
US6499050B1 (en) * 1998-06-09 2002-12-24 Advanced Micro Devices, Inc. Means used to allow driver software to select most appropriate execution context dynamically
IL142315A0 (en) * 1998-09-29 2002-03-10 Sun Microsystems Inc Superposition of data over voice
US7093122B1 (en) 1999-01-22 2006-08-15 Sun Microsystems, Inc. Techniques for permitting access across a context barrier in a small footprint device using shared object interfaces
US6823520B1 (en) 1999-01-22 2004-11-23 Sun Microsystems, Inc. Techniques for implementing security on a small footprint device using a context barrier
US6907608B1 (en) * 1999-01-22 2005-06-14 Sun Microsystems, Inc. Techniques for permitting access across a context barrier in a small footprint device using global data structures
US6922835B1 (en) 1999-01-22 2005-07-26 Sun Microsystems, Inc. Techniques for permitting access across a context barrier on a small footprint device using run time environment privileges
US6633984B2 (en) * 1999-01-22 2003-10-14 Sun Microsystems, Inc. Techniques for permitting access across a context barrier on a small footprint device using an entry point object
DE69942620D1 (de) * 1999-06-10 2010-09-02 Belle Gate Invest B V Vorrichtung zum speichern unterschiedlicher versionen von datensätzen in getrennten datenbereichen uin einem speicher
AU1586500A (en) 1999-12-06 2001-06-12 Sun Microsystems, Inc. Computer arrangement using non-refreshed dram
CN1327356C (zh) 1999-12-07 2007-07-18 太阳微系统公司 具有控制读取之微处理器的计算机可读介质和与该介质通信的计算机
JP4824240B2 (ja) * 1999-12-07 2011-11-30 オラクル・アメリカ・インコーポレイテッド 安全な写真担持用識別装置及びこのような識別装置を認証する手段及び方法
US6845419B1 (en) * 2000-01-24 2005-01-18 Freescale Semiconductor, Inc. Flexible interrupt controller that includes an interrupt force register
US7828218B1 (en) 2000-07-20 2010-11-09 Oracle America, Inc. Method and system of communicating devices, and devices therefor, with protected data transfer
US6795884B2 (en) 2000-12-29 2004-09-21 Intel Corporation Read-only memory based circuitry for sharing an interrupt between disk drive interfaces
US6742060B2 (en) * 2000-12-29 2004-05-25 Intel Corporation Look-up table based circuitry for sharing an interrupt between disk drive interfaces
US6772258B2 (en) 2000-12-29 2004-08-03 Intel Corporation Method and apparatus for sharing an interrupt between disk drive interfaces
US7031989B2 (en) * 2001-02-26 2006-04-18 International Business Machines Corporation Dynamic seamless reconfiguration of executing parallel software
US6807595B2 (en) * 2001-05-10 2004-10-19 Qualcomm Incorporated Mobile communication device having a prioritized interrupt controller
US20030177280A1 (en) * 2002-03-12 2003-09-18 Webster Steve R. Imbedded interrupt handler
US7493478B2 (en) * 2002-12-05 2009-02-17 International Business Machines Corporation Enhanced processor virtualization mechanism via saving and restoring soft processor/system states
US6981083B2 (en) * 2002-12-05 2005-12-27 International Business Machines Corporation Processor virtualization mechanism via an enhanced restoration of hard architected states
US7117319B2 (en) * 2002-12-05 2006-10-03 International Business Machines Corporation Managing processor architected state upon an interrupt
US7272664B2 (en) * 2002-12-05 2007-09-18 International Business Machines Corporation Cross partition sharing of state information
US7065595B2 (en) * 2003-03-27 2006-06-20 International Business Machines Corporation Method and apparatus for bus access allocation
BE1015508A3 (nl) 2003-05-08 2005-05-03 Svensson Ludvig Bv Doek bestemd om voorzien te worden van minstens een permanente vouw en werkwijze daarbij toegepast.
WO2005020065A2 (en) * 2003-08-25 2005-03-03 Koninklijke Philips Electronics, N.V. Dynamic retention of hardware register content in a computer system
US7363620B2 (en) * 2003-09-25 2008-04-22 Sun Microsystems, Inc. Non-linear execution of application program instructions for application program obfuscation
US7415618B2 (en) * 2003-09-25 2008-08-19 Sun Microsystems, Inc. Permutation of opcode values for application program obfuscation
US8220058B2 (en) * 2003-09-25 2012-07-10 Oracle America, Inc. Rendering and encryption engine for application program obfuscation
US20050069138A1 (en) * 2003-09-25 2005-03-31 Sun Microsystems, Inc., A Delaware Corporation Application program obfuscation
US7353499B2 (en) 2003-09-25 2008-04-01 Sun Microsystems, Inc. Multiple instruction dispatch tables for application program obfuscation
US7424620B2 (en) * 2003-09-25 2008-09-09 Sun Microsystems, Inc. Interleaved data and instruction streams for application program obfuscation
TW201237630A (en) * 2011-03-01 2012-09-16 Wistron Corp Method and computer system for processing data in a memory
GB2514126A (en) * 2013-05-14 2014-11-19 Ibm Interruption of chip component managing tasks

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3599162A (en) * 1969-04-22 1971-08-10 Comcet Inc Priority tabling and processing of interrupts
US3866181A (en) * 1972-12-26 1975-02-11 Honeywell Inf Systems Interrupt sequencing control apparatus
FR2269150B1 (de) * 1974-04-25 1977-10-28 Honeywell Bull Soc Ind
GB1529581A (en) * 1974-10-29 1978-10-25 Xerox Corp Data processing apparatus
DE2754890C2 (de) * 1977-12-09 1982-10-28 Ibm Deutschland Gmbh, 7000 Stuttgart Einrichtung zur Programmunterbrechung
JPS5530730A (en) * 1978-08-22 1980-03-04 Nec Corp Data processor
US4257096A (en) * 1978-10-23 1981-03-17 International Business Machines Corporation Synchronous and conditional inter-program control apparatus for a computer system
US4286322A (en) * 1979-07-03 1981-08-25 International Business Machines Corporation Task handling apparatus
US4384324A (en) * 1980-05-06 1983-05-17 Burroughs Corporation Microprogrammed digital data processing system employing tasking at a microinstruction level
EP0048767B1 (de) * 1980-09-27 1985-03-20 Ibm Deutschland Gmbh Prioritätsstufengesteuerte Unterbrechungseinrichtung
JPS58115552A (ja) * 1981-12-28 1983-07-09 Fujitsu Ltd 割込み制御方式
US4636944A (en) * 1984-01-17 1987-01-13 Concurrent Computer Corporation Multi-level priority micro-interrupt controller
US4658351A (en) * 1984-10-09 1987-04-14 Wang Laboratories, Inc. Task control means for a multi-tasking data processing system
US4736318A (en) * 1985-03-01 1988-04-05 Wang Laboratories, Inc. Data processing system having tunable operating system means
US4734882A (en) * 1985-04-01 1988-03-29 Harris Corp. Multilevel interrupt handling scheme
JPH0792782B2 (ja) * 1985-09-30 1995-10-09 富士通株式会社 処理実行システム
US4914657A (en) * 1987-04-15 1990-04-03 Allied-Signal Inc. Operations controller for a fault tolerant multiple node processing system

Also Published As

Publication number Publication date
JPH0612527B2 (ja) 1994-02-16
EP0383474B1 (de) 1995-10-18
EP0383474A2 (de) 1990-08-22
DE69023018T2 (de) 1996-05-30
JPH02267634A (ja) 1990-11-01
US5057997A (en) 1991-10-15
EP0383474A3 (de) 1991-12-27

Similar Documents

Publication Publication Date Title
DE69023018D1 (de) Prozessor-Unterbrechungssteuerung.
DE69021899D1 (de) DMA-Steuerung.
DE69019463D1 (de) Entwicklungsgerät.
DE3782819D1 (de) Steuerprozessor.
DE69123794D1 (de) Unterbrechungssteuerung
DE3788319D1 (de) Multiprozessor-Unterbrechungsumleitungsmechanismus.
DE59001273D1 (de) Leiteinrichtung.
DE68921776D1 (de) Prozessorssimulation.
DE68921775D1 (de) Prozessorssimulation.
DE69033384D1 (de) Entwicklungsgerät
DE69017481D1 (de) Cursorsteuerungseinrichtung.
DE68928452D1 (de) Unterbrechungssteuerung
DE3787660D1 (de) Steuergerät.
DE69013573D1 (de) Verteilersteuergerät.
DE69021089D1 (de) Heuristischer prozessor.
NL191164B (nl) Aanstuurschakeling.
DE68918596D1 (de) Steuereinrichtung.
DE69020927D1 (de) Anzeigesteuerung.
DE69005920D1 (de) Elektrophotographisches Entwicklungsgerät.
DE3680443D1 (de) Unterbrechungssteuerungssystem.
DE69017630D1 (de) Entwicklungsgerät.
FI901504A0 (fi) Biologiskt nedbrytbar stabil skum.
FI884967A0 (fi) Kontrollanordning foer fuktmaetare foer faeltbruk.
DE69013351D1 (de) Steuerungshebel.
DE69016545D1 (de) Entwicklungsgerät.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8330 Complete disclaimer
8330 Complete disclaimer