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DE68921776D1 - Prozessorssimulation. - Google Patents

Prozessorssimulation.

Info

Publication number
DE68921776D1
DE68921776D1 DE68921776T DE68921776T DE68921776D1 DE 68921776 D1 DE68921776 D1 DE 68921776D1 DE 68921776 T DE68921776 T DE 68921776T DE 68921776 T DE68921776 T DE 68921776T DE 68921776 D1 DE68921776 D1 DE 68921776D1
Authority
DE
Germany
Prior art keywords
processor simulation
simulation
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68921776T
Other languages
English (en)
Other versions
DE68921776T2 (de
Inventor
Richard Gregory Fogg
Nicolas Arturo Martin De
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE68921776D1 publication Critical patent/DE68921776D1/de
Publication of DE68921776T2 publication Critical patent/DE68921776T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45504—Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Executing Machine-Instructions (AREA)
  • Devices For Executing Special Programs (AREA)
DE68921776T 1988-02-01 1989-01-05 Prozessorssimulation. Expired - Fee Related DE68921776T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/151,136 US4951195A (en) 1988-02-01 1988-02-01 Condition code graph analysis for simulating a CPU processor

Publications (2)

Publication Number Publication Date
DE68921776D1 true DE68921776D1 (de) 1995-04-27
DE68921776T2 DE68921776T2 (de) 1995-10-12

Family

ID=22537471

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68921776T Expired - Fee Related DE68921776T2 (de) 1988-02-01 1989-01-05 Prozessorssimulation.

Country Status (4)

Country Link
US (1) US4951195A (de)
EP (1) EP0327196B1 (de)
JP (1) JPH0782441B2 (de)
DE (1) DE68921776T2 (de)

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JP3492105B2 (ja) * 1996-08-30 2004-02-03 株式会社東芝 ハードウェア／ソフトウェア協調シミュレーション装置及びシミュレーション方法
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US7441254B1 (en) * 1997-07-09 2008-10-21 International Business Machines Corporation Simulation of memory-mapped I/O
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US6035390A (en) * 1998-01-12 2000-03-07 International Business Machines Corporation Method and apparatus for generating and logically combining less than (LT), greater than (GT), and equal to (EQ) condition code bits concurrently with the execution of an arithmetic or logical operation
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US6804814B1 (en) 1999-12-29 2004-10-12 Veritas Operating Corporation Method for simulating back program execution from a traceback sequence
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US20090109996A1 (en) * 2007-10-29 2009-04-30 Hoover Russell D Network on Chip
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US8261025B2 (en) * 2007-11-12 2012-09-04 International Business Machines Corporation Software pipelining on a network on chip
US8526422B2 (en) * 2007-11-27 2013-09-03 International Business Machines Corporation Network on chip with partitions
US8473667B2 (en) * 2008-01-11 2013-06-25 International Business Machines Corporation Network on chip that maintains cache coherency with invalidation messages
US8010750B2 (en) 2008-01-17 2011-08-30 International Business Machines Corporation Network on chip that maintains cache coherency with invalidate commands
US8490110B2 (en) * 2008-02-15 2013-07-16 International Business Machines Corporation Network on chip with a low latency, high bandwidth application messaging interconnect
US20090245257A1 (en) * 2008-04-01 2009-10-01 International Business Machines Corporation Network On Chip
US8078850B2 (en) * 2008-04-24 2011-12-13 International Business Machines Corporation Branch prediction technique using instruction for resetting result table pointer
US20090271172A1 (en) * 2008-04-24 2009-10-29 International Business Machines Corporation Emulating A Computer Run Time Environment
US8423715B2 (en) 2008-05-01 2013-04-16 International Business Machines Corporation Memory management among levels of cache in a memory hierarchy
US20090282419A1 (en) * 2008-05-09 2009-11-12 International Business Machines Corporation Ordered And Unordered Network-Addressed Message Control With Embedded DMA Commands For A Network On Chip
US8392664B2 (en) * 2008-05-09 2013-03-05 International Business Machines Corporation Network on chip
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US8214845B2 (en) * 2008-05-09 2012-07-03 International Business Machines Corporation Context switching in a network on chip by thread saving and restoring pointers to memory arrays containing valid message data
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US8438578B2 (en) * 2008-06-09 2013-05-07 International Business Machines Corporation Network on chip with an I/O accelerator
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Also Published As

Publication number Publication date
DE68921776T2 (de) 1995-10-12
EP0327196A3 (de) 1991-10-23
JPH0782441B2 (ja) 1995-09-06
JPH025139A (ja) 1990-01-10
EP0327196B1 (de) 1995-03-22
EP0327196A2 (de) 1989-08-09
US4951195A (en) 1990-08-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee