[go: up one dir, main page]

DE68918040D1 - Integrierte Halbleiterschaltung mit Ein- und Ausgangsanschlüssen, die einen unabhängigen Verbindungstest erlauben. - Google Patents

Integrierte Halbleiterschaltung mit Ein- und Ausgangsanschlüssen, die einen unabhängigen Verbindungstest erlauben.

Info

Publication number
DE68918040D1
DE68918040D1 DE68918040T DE68918040T DE68918040D1 DE 68918040 D1 DE68918040 D1 DE 68918040D1 DE 68918040 T DE68918040 T DE 68918040T DE 68918040 T DE68918040 T DE 68918040T DE 68918040 D1 DE68918040 D1 DE 68918040D1
Authority
DE
Germany
Prior art keywords
allow
input
semiconductor circuit
integrated semiconductor
output connections
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68918040T
Other languages
English (en)
Other versions
DE68918040T2 (de
Inventor
Kazuyoshi C O Nec Corpo Ohfuji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE68918040D1 publication Critical patent/DE68918040D1/de
Publication of DE68918040T2 publication Critical patent/DE68918040T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31701—Arrangements for setting the Unit Under Test [UUT] in a test mode
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31712—Input or output aspects
    • G01R31/31713—Input or output interfaces for test, e.g. test pins, buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Logic Circuits (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
DE68918040T 1988-10-14 1989-10-16 Integrierte Halbleiterschaltung mit Ein- und Ausgangsanschlüssen, die einen unabhängigen Verbindungstest erlauben. Expired - Fee Related DE68918040T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63258414A JP2827229B2 (ja) 1988-10-14 1988-10-14 半導体集積回路

Publications (2)

Publication Number Publication Date
DE68918040D1 true DE68918040D1 (de) 1994-10-13
DE68918040T2 DE68918040T2 (de) 1995-04-20

Family

ID=17319897

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68918040T Expired - Fee Related DE68918040T2 (de) 1988-10-14 1989-10-16 Integrierte Halbleiterschaltung mit Ein- und Ausgangsanschlüssen, die einen unabhängigen Verbindungstest erlauben.

Country Status (4)

Country Link
US (1) US5012185A (de)
EP (1) EP0364925B1 (de)
JP (1) JP2827229B2 (de)
DE (1) DE68918040T2 (de)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5365165A (en) * 1986-09-19 1994-11-15 Actel Corporation Testability architecture and techniques for programmable interconnect architecture
JPH0271179A (ja) * 1988-09-07 1990-03-09 Hitachi Ltd 半導体集積回路装置、その製造方法、検査方法及び補修方法
US5416919A (en) * 1989-07-19 1995-05-16 Sharp Kabushiki Kaisha Semiconductor integrated circuit with functional blocks capable of being individually tested externally
GB8921561D0 (en) * 1989-09-23 1989-11-08 Univ Edinburgh Designs and procedures for testing integrated circuits containing sensor arrays
NL8902964A (nl) * 1989-12-01 1991-07-01 Philips Nv Op substraat geintegreerd teststelsel.
US5121394A (en) * 1989-12-20 1992-06-09 Bull Hn Information Systems Inc. Method of organizing programmable logic array devices for board testability
JPH0474977A (ja) * 1990-07-16 1992-03-10 Nec Corp 半導体集積回路
JP2837252B2 (ja) * 1990-09-10 1998-12-14 シャープ株式会社 集積回路装置
US5293123A (en) * 1990-10-19 1994-03-08 Tandem Computers Incorporated Pseudo-Random scan test apparatus
JPH04195546A (ja) * 1990-11-28 1992-07-15 Nec Corp マイクロコンピュータのテストモード設定回路
US5363383A (en) * 1991-01-11 1994-11-08 Zilog, Inc. Circuit for generating a mode control signal
US5528600A (en) * 1991-01-28 1996-06-18 Actel Corporation Testability circuits for logic arrays
US5146161A (en) * 1991-04-05 1992-09-08 Vlsi Technology, Inc. Integrated circuit test system
EP0522413A3 (en) * 1991-07-03 1993-03-03 Hughes Aircraft Company A high impedance technique for testing interconnections in digital systems
JP2894068B2 (ja) * 1992-01-30 1999-05-24 日本電気株式会社 半導体集積回路
JP2793427B2 (ja) * 1992-04-08 1998-09-03 株式会社東芝 半導体装置
US5406197A (en) * 1992-07-31 1995-04-11 International Business Machines Corporation Apparatus for controlling test inputs of circuits on an electronic module
US5294883A (en) * 1992-08-04 1994-03-15 International Business Machines Corporation Test detector/shutoff and method for BiCMOS integrated circuit
JPH06249919A (ja) * 1993-03-01 1994-09-09 Fujitsu Ltd 半導体集積回路装置の端子間接続試験方法
GB2278689B (en) * 1993-06-02 1997-03-19 Ford Motor Co Method and apparatus for testing integrated circuits
US5951703A (en) * 1993-06-28 1999-09-14 Tandem Computers Incorporated System and method for performing improved pseudo-random testing of systems having multi driver buses
DE4434792C1 (de) * 1994-09-29 1996-05-23 Telefunken Microelectron Integrierte, in einem ersten und einem zweiten Betriebsmodus betreibbare Schaltungsanordnung
US5625301A (en) * 1995-05-18 1997-04-29 Actel Corporation Flexible FPGA input/output architecture
US5994912A (en) * 1995-10-31 1999-11-30 Texas Instruments Incorporated Fault tolerant selection of die on wafer
US5969538A (en) 1996-10-31 1999-10-19 Texas Instruments Incorporated Semiconductor wafer with interconnect between dies for testing and a process of testing
US5666071A (en) * 1995-12-01 1997-09-09 Advanced Micro Devices, Inc. Device and method for programming high impedance states upon select input/output pads
US5760598A (en) * 1996-02-12 1998-06-02 International Business Machines Corporation Method and apparatus for testing quiescent current in integrated circuits
TW334532B (en) * 1996-07-05 1998-06-21 Matsushita Electric Ind Co Ltd The inspection system of semiconductor IC and the method of generation
US5892778A (en) * 1997-06-30 1999-04-06 Sun Microsystems, Inc. Boundary-scan circuit for use with linearized impedance control type output drivers
US6405335B1 (en) 1998-02-25 2002-06-11 Texas Instruments Incorporated Position independent testing of circuits
US6380724B1 (en) 1999-11-16 2002-04-30 Advanced Micro Devices, Inc. Method and circuitry for an undisturbed scannable state element
US6728915B2 (en) 2000-01-10 2004-04-27 Texas Instruments Incorporated IC with shared scan cells selectively connected in scan path
EP1132750B1 (de) * 2000-01-26 2008-06-11 Infineon Technologies AG Elektrische Schaltung und Verfahren zum Testen einer Schaltungskomponente der elektrischen Schaltung
US6769080B2 (en) 2000-03-09 2004-07-27 Texas Instruments Incorporated Scan circuit low power adapter with counter
US6758634B2 (en) * 2001-02-06 2004-07-06 Bechtel Bwxt Idaho, Llc Subsurface materials management and containment system
US6590225B2 (en) * 2001-01-19 2003-07-08 Texas Instruments Incorporated Die testing using top surface test pads
JP4690731B2 (ja) * 2005-01-20 2011-06-01 ルネサスエレクトロニクス株式会社 半導体装置とそのテスト装置及びテスト方法。
JP2007183188A (ja) * 2006-01-06 2007-07-19 Nec Electronics Corp 半導体試験システム、テストパターン生成方法及びテストパターン生成プログラム
KR101190687B1 (ko) 2010-11-17 2012-10-12 에스케이하이닉스 주식회사 반도체 장치의 테스트 모드 제어 회로 및 그 제어 방법
KR20170027789A (ko) 2014-06-30 2017-03-10 바스프 에스이 복합 열가소성 구조체 및 이를 위한 복합 압축 리미터

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2905271A1 (de) * 1979-02-12 1980-08-21 Philips Patentverwaltung Integrierte schaltungsanordnung in mos-technik mit feldeffekttransistoren
JPS61265829A (ja) * 1985-05-20 1986-11-25 Fujitsu Ltd 半導体集積回路
US4703484A (en) * 1985-12-19 1987-10-27 Harris Corporation Programmable integrated circuit fault detection apparatus

Also Published As

Publication number Publication date
JP2827229B2 (ja) 1998-11-25
DE68918040T2 (de) 1995-04-20
JPH02105074A (ja) 1990-04-17
EP0364925B1 (de) 1994-09-07
EP0364925A1 (de) 1990-04-25
US5012185A (en) 1991-04-30

Similar Documents

Publication Publication Date Title
DE68918040D1 (de) Integrierte Halbleiterschaltung mit Ein- und Ausgangsanschlüssen, die einen unabhängigen Verbindungstest erlauben.
DE3750674D1 (de) Halbleiterintegrierte Schaltung mit Prüffunktion.
DE3889650D1 (de) Integrierte Halbleiterschaltung mit einem Eingangsspannungsbegrenzer.
EP0213037A3 (de) Halbleiterspeichergerät mit Prüfmustergeberschaltung
DE69333821D1 (de) Integrierte Halbleiterschaltung mit Eingangs/Ausgangschnittstelle geeignet für niedrige Amplituden
DE69013254D1 (de) Halbleiter-IC-Bauelement mit verbesserter Interkonnektionsstruktur.
DE68912277D1 (de) Ausgangspufferschaltung.
DE58906492D1 (de) Halbleiterschaltung.
DE3879804D1 (de) Integrierte halbleiterschaltungsvorrichtung.
DE3482014D1 (de) Integrierte halbleiterschaltungsanordnung mit verbindungsmaterial.
DE69013267D1 (de) Integrierte Halbleiterschaltungsanordnung.
EP0592111A3 (de) Multichipmodul für integrierte Halbleiterbauelemente mit einem Maximum an Eingangs- und Ausgangsmöglichkeiten.
DE68912640D1 (de) Ausgangsschaltung für eine integrierte Halbleiterschaltung mit reduziertem Speiseleitungsrauschen.
DE68921088D1 (de) Integrierte Halbleiterschaltung.
IT8419352A0 (it) Circuito integrato a semiconduttori con livelli di ingresso e di uscita ttl e livelli logici interni cmos.
DE3689031D1 (de) Integrierte Halbleiterschaltung mit Prüfschaltung.
DE69012194D1 (de) Integrierter Halbleiterschaltkreis.
DE69023858D1 (de) Integrierte Schaltungsanordnung mit verbesserten Verbindungen zwischen den Steckerstiften und den Halbleitermaterial-Chips.
DE3582457D1 (de) Halbleitervorrichtung mit eingangs-/ausgangsschutzschaltung.
NO901886D0 (no) Vekselretter-utgangskrets.
DE3879813D1 (de) Integrierte halbleiterschaltung mit signallinien.
DE68910413D1 (de) Ausgangsschaltung.
DE69011038D1 (de) Integrierte Halbleiterschaltung.
DE68915136D1 (de) Integrierte Halbleiterspeicherschaltung.
DE68915351D1 (de) Ausgangschaltung.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee