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DE60218117D1 - Vorverzerrungsschaltung - Google Patents

Vorverzerrungsschaltung

Info

Publication number
DE60218117D1
DE60218117D1 DE60218117T DE60218117T DE60218117D1 DE 60218117 D1 DE60218117 D1 DE 60218117D1 DE 60218117 T DE60218117 T DE 60218117T DE 60218117 T DE60218117 T DE 60218117T DE 60218117 D1 DE60218117 D1 DE 60218117D1
Authority
DE
Germany
Prior art keywords
predistortion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60218117T
Other languages
English (en)
Other versions
DE60218117T2 (de
Inventor
Yoshiaki Doi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE60218117D1 publication Critical patent/DE60218117D1/de
Publication of DE60218117T2 publication Critical patent/DE60218117T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3247—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)
DE60218117T 2001-12-21 2002-12-20 Vorverzerrungsschaltung Expired - Lifetime DE60218117T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001389740 2001-12-21
JP2001389740A JP2003188656A (ja) 2001-12-21 2001-12-21 歪補償回路

Publications (2)

Publication Number Publication Date
DE60218117D1 true DE60218117D1 (de) 2007-03-29
DE60218117T2 DE60218117T2 (de) 2007-10-31

Family

ID=19188289

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60218117T Expired - Lifetime DE60218117T2 (de) 2001-12-21 2002-12-20 Vorverzerrungsschaltung

Country Status (4)

Country Link
US (1) US7215717B2 (de)
EP (1) EP1322034B1 (de)
JP (1) JP2003188656A (de)
DE (1) DE60218117T2 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4012725B2 (ja) * 2001-12-05 2007-11-21 株式会社日立コミュニケーションテクノロジー プリディストーション型増幅装置
JP2003188656A (ja) 2001-12-21 2003-07-04 Nec Corp 歪補償回路
JP4618445B2 (ja) * 2004-06-23 2011-01-26 日本電気株式会社 確率密度関数で重み付けした積分処理を用いた線形性評価方法と、それを用いた回路シミュレータ、評価装置、通信回路、およびプログラム
DE102004059088A1 (de) * 2004-12-03 2006-06-08 Deutsche Telekom Ag Verfahren für eine optimale Ansteuerung bei Leistungsverstärkern für digitale Übertragung
JP4555702B2 (ja) * 2005-02-21 2010-10-06 富士通株式会社 歪補償装置
JP4786644B2 (ja) * 2005-03-09 2011-10-05 富士通株式会社 歪補償装置
JP4308163B2 (ja) * 2005-03-22 2009-08-05 富士通株式会社 歪補償装置
JP4935677B2 (ja) * 2005-09-28 2012-05-23 富士通株式会社 歪補償装置
JP4617265B2 (ja) * 2006-02-14 2011-01-19 富士通株式会社 歪補償装置及び歪補償方法
JP2007221613A (ja) * 2006-02-20 2007-08-30 Fujitsu General Ltd 歪補償方法および装置
JP4755937B2 (ja) * 2006-04-17 2011-08-24 富士通株式会社 歪補償装置及び歪補償方法
JP5034319B2 (ja) * 2006-05-26 2012-09-26 富士通株式会社 歪補償装置及び歪補償方法
JP2008022111A (ja) * 2006-07-11 2008-01-31 Sony Corp 歪み補償装置、及び無線通信装置
JP5176692B2 (ja) * 2008-05-28 2013-04-03 日本電気株式会社 歪補償回路及び歪補償方法
JP5299958B2 (ja) * 2008-12-01 2013-09-25 日本無線株式会社 プリディストータ
CN101895259B (zh) * 2009-05-18 2013-01-02 富士通株式会社 预失真器、预失真方法和预失真系统
JP5505001B2 (ja) * 2010-03-17 2014-05-28 富士通株式会社 歪補償装置、増幅装置、送信装置および歪補償方法
US20140029658A1 (en) * 2012-07-26 2014-01-30 Massachusetts Institute Of Technology Analog/Digital Co-Design Methodology to Achieve High Linearity and Low Power Dissipation in a Radio Frequency (RF) Receiver
US8964901B2 (en) 2011-01-07 2015-02-24 Massachusetts Institute Of Technology Analog/digital co-design methodology to achieve high linearity and low power dissipation in a radio frequency (RF) receiver
US8891668B2 (en) * 2011-06-30 2014-11-18 Intel IP Corporation System and method for estimating and correcting phase shift in a wireless communication device
US8958470B2 (en) 2012-07-26 2015-02-17 Massachusetts Institute Of Technology Method and apparatus for sparse polynomial equalization of RF receiver chains

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4700151A (en) * 1985-03-20 1987-10-13 Nec Corporation Modulation system capable of improving a transmission system
JPH03270306A (ja) 1990-03-20 1991-12-02 Fujitsu Ltd カルテシアン帰還型非線形歪補償器
JP2883260B2 (ja) 1993-04-20 1999-04-19 三菱電機株式会社 歪補償回路
JP2746133B2 (ja) 1994-08-30 1998-04-28 日本電気株式会社 負帰還増幅器
JP3198864B2 (ja) 1995-03-09 2001-08-13 松下電器産業株式会社 送信装置
JP4183364B2 (ja) 1999-12-28 2008-11-19 富士通株式会社 歪補償装置
US6741662B1 (en) 2000-04-17 2004-05-25 Intel Corporation Transmitter linearization using fast predistortion
JP4326673B2 (ja) 2000-06-06 2009-09-09 富士通株式会社 非線形歪補償装置を有する通信装置の起動方法
JP3876408B2 (ja) 2001-10-31 2007-01-31 富士通株式会社 歪補償装置及び歪補償方法
JP2003188656A (ja) 2001-12-21 2003-07-04 Nec Corp 歪補償回路

Also Published As

Publication number Publication date
DE60218117T2 (de) 2007-10-31
US7215717B2 (en) 2007-05-08
US20030118125A1 (en) 2003-06-26
JP2003188656A (ja) 2003-07-04
EP1322034A1 (de) 2003-06-25
EP1322034B1 (de) 2007-02-14

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