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DE60139490D1 - Ausgangstreiber mit gesteuerter Anstiegszeit - Google Patents

Ausgangstreiber mit gesteuerter Anstiegszeit

Info

Publication number
DE60139490D1
DE60139490D1 DE60139490T DE60139490T DE60139490D1 DE 60139490 D1 DE60139490 D1 DE 60139490D1 DE 60139490 T DE60139490 T DE 60139490T DE 60139490 T DE60139490 T DE 60139490T DE 60139490 D1 DE60139490 D1 DE 60139490D1
Authority
DE
Germany
Prior art keywords
control
output driver
component drivers
voltage
rise time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60139490T
Other languages
English (en)
Inventor
Richard David Simpson
Jonathan Paul Milton
Simon Dennis Forey
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE60139490D1 publication Critical patent/DE60139490D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K4/00—Generating pulses having essentially a finite slope or stepped portions
    • H03K4/94—Generating pulses having essentially a finite slope or stepped portions having trapezoidal shape
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • H03K17/163—Soft switching
    • H03K17/164—Soft switching using parallel switching arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Pulse Circuits (AREA)
  • Dram (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
DE60139490T 2001-12-20 2001-12-20 Ausgangstreiber mit gesteuerter Anstiegszeit Expired - Lifetime DE60139490D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP01310739A EP1326341B1 (de) 2001-12-20 2001-12-20 Ausgangstreiber mit gesteuerter Anstiegszeit

Publications (1)

Publication Number Publication Date
DE60139490D1 true DE60139490D1 (de) 2009-09-17

Family

ID=8182561

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60139490T Expired - Lifetime DE60139490D1 (de) 2001-12-20 2001-12-20 Ausgangstreiber mit gesteuerter Anstiegszeit

Country Status (4)

Country Link
US (1) US6747504B2 (de)
EP (1) EP1326341B1 (de)
AT (1) ATE438956T1 (de)
DE (1) DE60139490D1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7711939B2 (en) * 2005-06-30 2010-05-04 Intel Corporation Serial link apparatus, method, and system
US20070013411A1 (en) * 2005-07-14 2007-01-18 Kazi Asaduzzaman Apparatus and methods for programmable slew rate control in transmitter circuits
US20090033389A1 (en) * 2007-08-03 2009-02-05 Abadeer Wagdi W Micro-phase adjusting and micro-phase adjusting mixer circuits designed with standard field effect transistor structures
US7932552B2 (en) 2007-08-03 2011-04-26 International Business Machines Corporation Multiple source-single drain field effect semiconductor device and circuit
US7814449B2 (en) 2007-10-17 2010-10-12 International Business Machines Corporation Design structure for multiple source-single drain field effect semiconductor device and circuit
JP5749465B2 (ja) * 2010-09-07 2015-07-15 ローム株式会社 発光素子の駆動回路、それを用いた発光装置および電子機器
US8754695B2 (en) * 2011-08-30 2014-06-17 Micron Technology, Inc. Methods, integrated circuits, apparatuses and buffers with adjustable drive strength

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3916215A (en) * 1974-03-11 1975-10-28 Hughes Aircraft Co Programmable ECL threshold logic gate
US4896333A (en) * 1987-08-04 1990-01-23 Signetics Corporation Circuit for generating a trapezoidal current waveform with matched rise and fall times
US5220201A (en) * 1990-06-26 1993-06-15 Canon Kabushiki Kaisha Phase-locked signal generator
FR2689339B1 (fr) * 1992-03-24 1996-12-13 Bull Sa Procede et dispositif de reglage de retard a plusieurs gammes.
US5444410A (en) * 1993-06-30 1995-08-22 National Semiconductor Corporation Controlled-transitioni-time line driver
JP3043241B2 (ja) * 1994-10-24 2000-05-22 沖電気工業株式会社 可変遅延回路
DE4438519A1 (de) 1994-10-31 1996-05-02 Diehl Gmbh & Co Zweidraht-Laststeuereinrichtung
US5852640A (en) * 1995-06-26 1998-12-22 Kliza; Phillip S. Clock distribution apparatus with current sensed skew cancelling
US5652533A (en) * 1995-10-19 1997-07-29 National Semiconductor Corporation Circuit for generating sampling signals at closely spaced time intervals
US5942937A (en) * 1997-11-19 1999-08-24 Advanced Micro Devices, Inc. Signal detection circuit using a plurality of delay stages with edge detection logic
US6054884A (en) * 1998-01-23 2000-04-25 Pmc - Sierra Ltd. Process-insensitive controllable CMOS delay line
US6259295B1 (en) * 1999-06-28 2001-07-10 Agere Systems Guardian Corp. Variable phase shifting clock generator
US6134182A (en) * 1999-10-19 2000-10-17 International Business Machines Corporation Cycle independent data to echo clock tracking circuit

Also Published As

Publication number Publication date
ATE438956T1 (de) 2009-08-15
EP1326341A1 (de) 2003-07-09
US20030117197A1 (en) 2003-06-26
EP1326341B1 (de) 2009-08-05
US6747504B2 (en) 2004-06-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition