DE3853182D1 - Speicherzelle mit gesättigtem schnellem Schreiben. - Google Patents

Speicherzelle mit gesättigtem schnellem Schreiben.

Info

Publication number: DE3853182D1
Authority: DE; Germany
Prior art keywords: memory cell; fast writing; saturated fast; saturated; writing
Prior art date: 1987-09-08
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Fee Related

Application number

DE3853182T

Other languages

English (en)

Other versions

DE3853182T2 (de

Inventor

William Benedict Chin

Ronald William Knepper

Rudolph Dennis Dussault

Friedric Christian Wernicke

Wong Robert Ch Foon

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

International Business Machines Corp

Original Assignee

International Business Machines Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1987-09-08

Filing date

1988-07-12

Publication date

1995-04-06

1988-07-12 Application filed by International Business Machines Corp filed Critical International Business Machines Corp

1995-04-06 Application granted granted Critical

1995-04-06 Publication of DE3853182D1 publication Critical patent/DE3853182D1/de

1995-09-14 Publication of DE3853182T2 publication Critical patent/DE3853182T2/de

2008-07-13 Anticipated expiration legal-status Critical

Status Expired - Fee Related legal-status Critical Current

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
- G11C11/4113—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors

Landscapes

Engineering & Computer Science (AREA)
Microelectronics & Electronic Packaging (AREA)
Computer Hardware Design (AREA)
Static Random-Access Memory (AREA)
Semiconductor Memories (AREA)

DE3853182T 1987-09-08 1988-07-12 Speicherzelle mit gesättigtem schnellem Schreiben. Expired - Fee Related DE3853182T2 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US07/094,465 US4922455A (en)	1987-09-08	1987-09-08	Memory cell with active device for saturation capacitance discharge prior to writing

Publications (2)

Publication Number	Publication Date
DE3853182D1 true DE3853182D1 (de)	1995-04-06
DE3853182T2 DE3853182T2 (de)	1995-09-14

Family

ID=22245351

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE3853182T Expired - Fee Related DE3853182T2 (de)	1987-09-08	1988-07-12	Speicherzelle mit gesättigtem schnellem Schreiben.

Country Status (4)

Country	Link
US (1)	US4922455A (de)
EP (1)	EP0306663B1 (de)
JP (1)	JPS6472396A (de)
DE (1)	DE3853182T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5021849A (en) *	1989-10-30	1991-06-04	Motorola, Inc.	Compact SRAM cell with polycrystalline silicon diode load
US5040145A (en) *	1990-04-06	1991-08-13	International Business Machines Corporation	Memory cell with active write load
US5151387A (en)	1990-04-30	1992-09-29	Sgs-Thomson Microelectronics, Inc.	Polycrystalline silicon contact structure
US20060176083A1 (en) *	2003-03-21	2006-08-10	Goran Krilic	Single ended three transistor quasi-static ram cell
US8283198B2 (en)	2010-05-10	2012-10-09	Micron Technology, Inc.	Resistive memory and methods of processing resistive memory
WO2015084971A1 (en) *	2013-12-03	2015-06-11	Rambus Inc.	Reduced current memory device

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3510849A (en) *	1965-08-09	1970-05-05	Nippon Electric Co	Memory devices of the semiconductor type having high-speed readout means
US3585412A (en) *	1968-08-27	1971-06-15	Bell Telephone Labor Inc	Schottky barrier diodes as impedance elements
US3703709A (en) *	1969-05-24	1972-11-21	Nippon Electric Co	High speed associative memory circuits
US3671772A (en) *	1969-10-01	1972-06-20	Ibm	Difference amplifier
US3849675A (en) *	1973-01-05	1974-11-19	Bell Telephone Labor Inc	Low power flip-flop circuits
US3919566A (en) *	1973-12-26	1975-11-11	Motorola Inc	Sense-write circuit for bipolar integrated circuit ram
US4057789A (en) *	1974-06-19	1977-11-08	International Business Machines Corporation	Reference voltage source for memory cells
DE2457921C2 (de) *	1974-12-07	1976-12-09	Ibm Deutschland	Verfahren und schaltungsanordnung zur erhoehung der schreibgeschwindigkeit in integrierten datenspeichern
FR2304991A1 (fr) *	1975-03-15	1976-10-15	Ibm	Agencement de circuits pour memoire semi-conductrice et son procede de fonctionnement
US3969707A (en) *	1975-03-27	1976-07-13	International Business Machines Corporation	Content-Addressable Memory capable of a high speed search
US4127899A (en) *	1977-12-05	1978-11-28	International Business Machines Corporation	Self-quenching memory cell
JPS6057707B2 (ja) *	1978-01-25	1985-12-16	株式会社日立製作所	記憶回路
US4320312A (en) *	1978-10-02	1982-03-16	Hewlett-Packard Company	Smaller memory cells and logic circuits
DE2926514A1 (de) *	1979-06-30	1981-01-15	Ibm Deutschland	Elektrische speicheranordnung und verfahren zu ihrem betrieb
NL7908340A (nl) *	1979-11-15	1981-06-16	Philips Nv	Geheugencelinrichting voor statisch geheugen.
US4308595A (en) *	1979-12-19	1981-12-29	International Business Machines Corporation	Array driver
US4439842A (en) *	1979-12-28	1984-03-27	International Business Machines Corp.	Bipolar transistor read only or read-write store with low impedance sense amplifier
US4400712A (en) *	1981-02-13	1983-08-23	Bell Telephone Laboratories, Incorporated	Static bipolar random access memory
JPS6052520B2 (ja) *	1981-12-29	1985-11-19	富士通株式会社	半導体記憶装置
JPS58147889A (ja) *	1982-02-26	1983-09-02	Mitsubishi Electric Corp	半導体装置
US4675715A (en) *	1982-12-09	1987-06-23	American Telephone And Telegraph Company, At&T Bell Laboratories	Semiconductor integrated circuit vertical geometry impedance element
US4575821A (en) *	1983-05-09	1986-03-11	Rockwell International Corporation	Low power, high speed random access memory circuit
DE3377090D1 (de) *	1983-10-28	1988-07-21	International Business Machines Corporation
JPS60143496A (ja) *	1983-12-29	1985-07-29	Fujitsu Ltd	半導体記憶装置
US4598390A (en) *	1984-06-25	1986-07-01	International Business Machines Corporation	Random access memory RAM employing complementary transistor switch (CTS) memory cells
US4635228A (en) *	1984-12-17	1987-01-06	International Business Machines Corporation	Random access memory employing unclamped complementary transistor switch (CTS) memory cells and utilizing word to drain line diode shunts
JPS62130000A (ja) *	1985-11-30	1987-06-12	Toshiba Corp	半導体記憶装置

1987
- 1987-09-08 US US07/094,465 patent/US4922455A/en not_active Expired - Fee Related
1988
- 1988-06-16 JP JP63147079A patent/JPS6472396A/ja active Granted
- 1988-07-12 EP EP88111162A patent/EP0306663B1/de not_active Expired - Lifetime
- 1988-07-12 DE DE3853182T patent/DE3853182T2/de not_active Expired - Fee Related

Also Published As

Publication number	Publication date
US4922455A (en)	1990-05-01
EP0306663B1 (de)	1995-03-01
EP0306663A2 (de)	1989-03-15
DE3853182T2 (de)	1995-09-14
JPH0529993B2 (de)	1993-05-06
JPS6472396A (en)	1989-03-17
EP0306663A3 (de)	1991-01-16

Publication	Publication Date	Title
DE3885408D1 (de)	1993-12-09	Nichtflüchtige Speicherzelle.
DE3587400D1 (de)	1993-07-22	Datenspeicherungsanordnung.
DE3578989D1 (de)	1990-09-06	Halbleiterspeichergeraet mit schreibepruefoperation.
DE3582141D1 (de)	1991-04-18	Speicheranordnung.
DE3686626D1 (de)	1992-10-08	Speicherzelle.
DE3587329D1 (de)	1993-06-17	Speicheranordnung mit datenzugriffsteuerung.
DE3584709D1 (de)	1992-01-02	Dynamische speicherzelle mit wahlfreiem zugriff (dram).
DE3887324D1 (de)	1994-03-03	Speicheranordnung.
NL7704931A (nl)	1977-12-20	Capacitieve geheugencel.
DE3773247D1 (de)	1991-10-31	Speicheranordnung mit reduziertem energieverbrauch.
DE3869158D1 (de)	1992-04-23	Speicher-leseschaltung.
DE3767729D1 (de)	1991-03-07	Assoziativspeicherzelle.
DE3580962D1 (de)	1991-01-31	Nichtfluechtige dynamische schreib-/lesespeicher mit wahlfreiem zugriff.
DE3577151D1 (de)	1990-05-17	Fehlertolerante speichermatrix.
DE3482654D1 (de)	1990-08-09	Datenspeichergeraet.
DE3782103D1 (de)	1992-11-12	Dynamischer halbleiterspeicher mit leseschema.
DE3850567D1 (de)	1994-08-11	DRAM-Zelle mit verstärkter Ladung.
DE3580768D1 (de)	1991-01-17	Datenspeicherelement.
DE3879766D1 (de)	1993-05-06	Halbleiter speicherzelle.
DE3581910D1 (de)	1991-04-04	Speichermatrix.
DE3685576D1 (de)	1992-07-09	Halbleiterspeicheranordnung mit seriellem adressierungsschema.
DE3852222D1 (de)	1995-01-12	Nichtflüchtige RAM-Vorrichtung mit flüchtigen Speicherzellen.
DE3784600D1 (de)	1993-04-15	Halbleiterspeicher mit schreibfunktion.
DE3781631D1 (de)	1992-10-15	Halbleiterspeichervorrichtung mit verbesserter zellenanordnung.
DE3582155D1 (de)	1991-04-18	Supraleitende speicheranordnung.

Legal Events

Date	Code	Title	Description
1996-03-28	8364	No opposition during term of opposition
1997-07-10	8339	Ceased/non-payment of the annual fee