DE3423799A1 - Arrangement for counting pulses with variable frequency up/down into a microcomputer - Google Patents

Abstract

A device for relieving simple microcomputers (19), to which variable-frequency input pulses with an associated direction-of- counting identification are applied, is proposed, only a particular counting range being permissible. The microcomputer (19) is preceded by an up/down counter (1) which counts the input pulses and the count of which can be set and read by the microcomputer (19). The permissible counting range is monitored by means of at least one comparator (6, 9) which can inhibit the up/down counter (1) at particular counts. The comparison values can be preferably also set by the microcomputer (19). A display device (13) advantageously reproduces the respective count. <IMAGE>

Description

Arrangement for counting up / down pulses with variable Frequency in a microcomputer The present invention relates to an arrangement for counting up / down pulses with variable frequency, whichever a counting direction identifier is assigned, in a microcomputer, the permitted Counting range has at least one, possibly variable limitation.

Such arrangements are known.

So from DE-PS 28 28 285 an arrangement with an electromechanical Pulse generator can be removed, which, when actuated, has two phase-shifted pulse trains generated, which are fed into a microprocessor. There will be the pulse trains evaluated according to a digital process by adding a specific phase relationship an actuation direction is assigned. The impulses are then in the microcomputer counted according to the direction of actuation, and the count for an electronic Digital display decoded.

Furthermore, in DE-PS 28 43 353 a method for electronic Interruption and repeal of the interruption of input pulses of a pulse generator into an electronic counter for the purpose of holding the count on a certain limit value described. This limit value can be manual or automatic can be specified.

If now an input device according to DE-PS 28 43 353 by means of one for consumer devices such as clocks, conventional simple microcomputers (e.g. single-chip microcomputers with a low clock frequency), this results in an increased frequency of the input pulses, difficulties with the processing speed of the microcomputer. This results from the large number of steps that the processor takes, for example Enter a four-digit time (0:01 to 24:00) must process (for each Digit individually, since 4 bits only correspond to the number range from 0 to 15).

The object of the invention is therefore, in one with a microcomputer working device of the type mentioned, preferably the processor for inputs to relieve at higher speed.

To solve the problem, an arrangement of the type mentioned at the beginning is used Kind according to the characterizing part of claim 1 configured.

This has the particular advantage that such an arrangement is easy to integrate, especially together with the microcomputer.

Further advantages can be found in the subclaims.

The respective count of the up / down counter can be obtained from the microcomputer are preferably called up when there is sufficient processing capacity Available.

Particularly advantageous is the possibility that the microcomputer certain Can read numerical values into the up / down counter; so can before each new input the up / down counter can be loaded with the actual numerical value and the Input pulses can continue to be counted from this numerical value.

In connection with the possibility of the current status of the up / down counter to read into different memories of the microcomputer, it is e.g. with a Multi-appointment clock structured in this way is possible, the individual appointments or the time via enter a single up / down counter.

This is supplemented by the fact that the comparators can be compared with different ones Values that are assigned to the respective input.

Finally, it is possible to further relieve the microcomputer, by a control circuit between the microcomputer and the up / down counter or Comparator is inserted, which the serially generated (organized in words) Output signals of the microcomputer in suitable control signals for the up / down counter, or the comparator converts and vice versa.

In addition, the up / down counter can be equipped with a display device connected, which shows the current counter reading during entries without the Delays caused by microcomputers.

Further advantages or advantageous embodiments of the invention are can be found in the drawing and the associated description.

The only figure in the drawing shows: A schematic representation an advantageous embodiment of the arrangement according to the invention in the form of a electronic timer.

An electronic up / down counter is 1 via a gate 2 at its counting input 3 controlled with input pulses. These input pulses a signal is assigned to each, which is a counting direction input 4 of the up / down counter 1, as well as an enable input 5 of a first comparator 6 and via an inverter 7 a release input 8 of a second comparator 9 is applied.

The actual pulse generator, which generates the input pulses and the Counting direction signal generated depending on the specified actuation direction, is not shown. Such pulse generators are different Explanations known, so that it will not be discussed in more detail.

The up / down counter 1 is via bidirectional command and Data lines 10 with the two comparators 6 and 9, as well as with a control circuit 11 and a control arrangement 12 for a display device 13.

The control circuit 11 is dependent on several command lines 14 driven by the type of data entered by means of the pulse generator. Farther the control circuit 11 receives from the result outputs 15, 16 of the two comparators 6, 9 comparison result signals, wherein for the case of a match between Comparison value and counter reading with activated comparators 6, 9 the gate 2 over a control input 17 can be blocked by the control circuit 11, i.e., the Input pulses then do not reach counter input 3 of up / down counter 1 more.

Furthermore, the control circuit 11 is via a bidirectional bus 18 connected to a microcomputer 19. In addition, the control circuit 11 is with connected to a release input 20 of the control arrangement 12, via which the Forwarding of a numerical value pending on the command and data lines 10 on the display device 13 can be prevented.

The function of the arrangement described above will now be described below are explained in more detail. It is assumed, for example, that the arrangement represents a digital time switch with a display range from 0:01 a.m. to midnight Clock (e.g. via a four-digit 7-segment display arrangement 13) into which via any pulse generator in conjunction with three via the command lines 14 buttons acting on the control circuit 11, the following values can be entered: a) Time of day b) switching date on c) switching date off.

A single-chip microcomputer is preferably included as the microcomputer 19 4 bit processing width used. The control circuit 11 then serves essentially as interfaces which each consist of a sequence of 4-bit words from the microcomputer suitable signals for the up / down counter 1, the comparators 6, 9 and for the Display device 13 generated and vice versa.

A new time should now be set in such a time switch are, via the corresponding command line 14, the control circuit 11 and so that the microcomputer 19 is activated. The microcomputer 19 then loads the up / down counter 1 with the saved time, the first comparator with 0:01 (lower limit of Display range) and the second comparator 9 with 24:00 (upper limit of the display range). Thereafter, the gate 2 and the drive arrangement 12 for the display device 13 Approved. It can thus input pulses from the up / down counter 1 accordingly counted in the specified input direction and the current counter reading from the display device 13 are displayed.

Depending on the one at counting direction input 4 of the up / down counter 1 pending signal is now one of the two comparators 6, 9 via the enable inputs 5 or 8 activated, in such a way that the upper range limit when counting up and when counting down, the lower range limit becomes effective.

Reaching a range limit now causes the microcomputer 19, to load the up / down counter 1 with the respective other range limit value, but this does not lead to a response of one of the comparators 6, 9, since the one for it Competent comparator 6, 9 is not activated for the given counting direction.

After the end of the time entry, i.e. after the control circuit 11 is no longer activated via the corresponding command line 14, the current The counter reading is taken over as the new time in the time memory of the microcomputer 19 and the time counting started. Gate 2 is locked again at the same time. With the beginning the next full minute is the current time from the microcomputer 19 loaded into the up / down counter 1 and continuously by means of the display device 13 displayed.

The two switching dates (on / off) are now entered in an equivalent way Way, by the control circuit 11 being addressed via the corresponding command line 14 and so that the microcomputer 19 is activated. When entering the first switching dates preferably the up / down counter 1, as well as the comparator 6 is set to the current time for the lower range limit. For input of the first switching date are then the 23 following the current time h 59 min available; this is done by the following manipulation: The comparator 9 for the upper range limit is set to 24:00.

When 24:00 is reached for the first switching date, the Comparator 6 for the lower range limit and the Uor-i downward counter 1 to 0:01, the comparator 9 for the upper range limit to the current time minus one Minute set. When the upper range limit is reached, the entry is then made using of gate 2 blocked. It is by means of the display device 13 during the entire Date manipulation, the status of the up / down counter 1 is displayed, i.e. the current date entry.

If an entry is made in the opposite direction, i.e. downwards, the gate 2 the up / down counter 1 is released again, since now the other Comparator 6 (for the lower range limit) is activated.

When the limit 0: 01/24: 00 is reached, the above-described setting process takes place equivalent @@ managed, so that the current time is again the lower range limit is used. If this lower range limit is now reached, the microcomputer sets 19 its corresponding switching schedule memory to 0:00 and the timer function is deleted.

The second switching date is entered in the same way as for the first, however, the range limits are preferably partially entered by the first one Switching date can be created: For example, is it the second to be entered Switching date, the on-date, this can be for reasons of logic and limitation of the display area to 24 hours only before the off date, i.e. between the the current time and the off date. Serve as the outermost range limits So in this case the current time and the first off date entered.

If, on the other hand, the second date to be entered is the off date, then as the outermost range limits the on-date and the current time minus one Minute used.

Once the deadline has been entered, the entry is made via the gate 2 are blocked and the appointments in the up / down counter 1 are 0's. appropriate Appointment memory in the microcomputer 19 taken over.

00 after the up / down counter 1 from the microcomputer 19 is again loaded with the current time and displayed by the display device 13.

LIST OF REFERENCE NUMERALS 1 up / down counter 2 gate 3 counter input of 1 4 counting direction input from 1 5 release input from 6 6 first comparator 7 inverter 8 enable input of 9 9 second comparator 10 command and data lines 11 Control circuit 12 control arrangement for 13 13 display device 14 command lines 15 Result output from 6 16 Result output from 9 17 Control input from 2 18 bidirectional Bus 19 microcomp @ ter 2G release input from 12

Claims (8)

Claims 1. Arrangement for counting up / down pulses with variable frequency, each of which is assigned a counting direction identifier, in a microcomputer, the permitted counting range at least one, possibly variable Has limitation, characterized in that the microcomputer (19) has an up / down counter (1) is connected upstream for counting the input pulses, whereby the count of the up / down counter (1) can be read into the microcomputer (19), and that the up / down counter (1) is connected to at least one comparator (6, 9) through which, if present certain counter readings the up / down counter (1) can be blocked. 2. Arrangement according to claim 1, characterized in that the counter reading the up / down counter (1) can be called up by the microcomputer (19). 3. Arrangement according to claim 1 or 2, characterized in that the Count of the up / down counter (1) from the microcomputer (19) to a specific one Value can be set or deleted. 4. Arrangement according to one of claims 1 to 3, characterized in that that the respective count of the up / down counter (1) in different Memory of the microcomputer (19) can be read. 5. Arrangement according to one of claims 1 to 4, characterized in that that the comparator or comparators (6, 9) can be loaded with variable limit values, which Limit values correspond to the respective counter readings at which the up / down counter (1) is blocked. 6. Arrangement according to one of claims 1 to 5, characterized in that that the comparator or comparators (6, 9) only when a specific counting direction identifier is present are activated. 7. Arrangement according to one of claims 1 to 6, characterized in that that, especially when using 4 bit microcomputers f19), to control the Up / down counter (1) and the comparator (6, 9) by the microcomputer (19) a control circuit (11) is used, which several serially transmitted words of the microcomputer (19) into information that can be transmitted in parallel for the up / down counter (1) and the comparators (6,9) converts. 8. Arrangement according to one of claims 1 to 7, characterized in that that the wor / down counter (1) is connected to a display device (13), through which the respective counter reading can be displayed.