DE2704833C2 - Conductor track end area for soldering a semiconductor element using flip-chip technology - Google Patents
Conductor track end area for soldering a semiconductor element using flip-chip technologyInfo
- Publication number
- DE2704833C2 DE2704833C2 DE2704833A DE2704833A DE2704833C2 DE 2704833 C2 DE2704833 C2 DE 2704833C2 DE 2704833 A DE2704833 A DE 2704833A DE 2704833 A DE2704833 A DE 2704833A DE 2704833 C2 DE2704833 C2 DE 2704833C2
- Authority
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- Prior art keywords
- conductor track
- area
- flip
- soldering
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01032—Germanium [Ge]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01073—Tantalum [Ta]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09381—Shape of non-curved single flat metallic pad, land or exposed part thereof; Shape of electrode of leadless component
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10234—Metallic balls
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10954—Other details of electrical connections
- H05K2201/10992—Using different connection materials, e.g. different solders, for the same connection
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/042—Remote solder depot on the PCB, the solder flowing to the connections from this depot
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
3030th
Die Erfindung geht aus von einem Leiterbahn-Endbereich nach der Gattung des Hauptansprachs.The invention is based on a conductor track end area according to the preamble of the main claim.
Bei der Montage von lötbaren Flip-Chip-Halbleiter- S5 elementen in elektronischen Dickschicht-oder Dünnfilmschaltungen werden diese Elemente mit ihren Anschlußkontakten, die mit Weichlot belegt sind, in die Leiterbahnstrukturen der Schaltungen eingelötet. Dabei setzen die Anschlußkontakte der Halbleiterelemente to auf entsprechend angeordnete Leiterbavjn-Endbereiche auf, die Bestandteil der elektronischen Dicksehicht-oder Dünnfilschaltung sind. Diese Leiterbahn-Endbereiche werden gewöhnlich vor dem Aufsetzen der Flip-Chip-Elemente in einem getrennten Arbeitsgang mit schmelzflüssigem Weichlot überzogen, so daß das eigentliche Einlöten der Flip-Chip-Elemente nach dem Reflow-Solder-Prinzip erfolgt, bei dem beide Lötpartner beim Zusammenfügen mit genügend dicken Lotfilmen überzogen sind, so daß beim Zusammenlöten v> kein weiteres Lot mehr hinzugefügt zu werden braucht.When assembling solderable flip-chip semiconductor S5 elements in electronic thick-film or thin-film circuits, these elements are soldered with their connection contacts, which are covered with soft solder, into the conductor track structures of the circuits. In this case, the connection contacts of the semiconductor elements are placed on correspondingly arranged conductor bavin end regions which are part of the electronic thick-film or thin-film circuit. These conductor track end areas are usually coated with molten soft solder in a separate operation before the flip-chip elements are put on, so that the actual soldering of the flip-chip elements takes place according to the reflow soldering principle, in which the two soldering partners are joined together are covered with sufficiently thick Lotfilmen so that no further solder when soldering v> needs more to be added.
Dieses sogenannte »Reflow-Solder-Verfahren« ist beispielsweise aus »IBM Technical Disclosure Bulletin«, Band 16, Nr. 8 (Januar 1974), Seite 2675 bekannt.This so-called "reflow soldering process" is, for example, from "IBM Technical Disclosure Bulletin", Volume 16, No. 8 (January 1974), page 2675 known.
Das Aufbringen von schmelzflüssigem Lot auf die ϊ5 Leiterbahn-Endbereiche ist gegenüber anderen Auftragungsverfahren — wie beispielsweise galvanische Abscheidung oder dergleichen — besonders einfach durchzuführen und auch von großem Vorteil für die Qualität der resultierenden Lötverbindung zwischen t>o Flip-Chip-Element und elektronischer Schaltung. Das Beschichten der Leiterbahn-Endbereiche mit dem schmelzflüssigen Lot erfolgt dabei zweckmäßigerweise nach dem Schwall- (Lotwelle) oder Tauch-Verfahren (ruhendes Lotbad). MApplying molten solder to the ϊ5 The end areas of the conductor track are different from other application methods, such as galvanic Deposition or the like - particularly easy to carry out and also of great advantage for Quality of the resulting soldered connection between t> o Flip chip element and electronic circuit. The coating of the conductor track end areas with the Molten solder is expediently carried out according to the surge (solder wave) or immersion method (static solder bath). M.
Aus der DE-OS 2157 956 und aus der DE-OS 23 07 325 sind Hybridschaltungen in Flip-Chip-Technik bekannt, bei denen die Leiterbahnendbereiche des Leiterbahnnetzwerkes auf dem Substrat verbreiterte Aufsetzgebiete aufweisen, die mit Lotpodesten versehen sind. Die Abgrenzung der Lotpodeste zu den Leiterbahnen hin erfolgt durch schmale Stege, die im Falle der Anordnung nach der DE-OS 21 57 956 noch zusätzlich durch querliegende Dämme abgedeckt sind. Durch diese Maßnahmen ist es jedoch nicht möglich, die Dicke der Lotpodeste, die auf den zum Anlöten der Halbleiterelemente diener.den Leiterbahn-Endbereichen aufgeschmolzen sind, konstant zu halten.From DE-OS 2157 956 and from DE-OS 23 07 325 hybrid circuits in flip-chip technology are known in which the conductor track end regions of the Conductor track network have widened contact areas on the substrate, which are provided with solder pads are. The demarcation of the soldering platforms to the conductor tracks is done by narrow webs, which in the Case of the arrangement according to DE-OS 21 57 956 are additionally covered by transverse dams. By these measures, however, it is not possible to change the thickness of the soldering platforms that are used for soldering the Semiconductor elements diener.den conductor track end areas are melted to keep constant.
Der Erfindung liegt die Aufgabe zugrunde, einen Leiterbahn-Endbereich nach der Gattung des Hauptanspruchs so auszubilden, daß die Lotfilmdicke im Aufsetzgebiet des Anschlußkontaktes des Flip-Chip-Halbleiterelementes konstant gehalten wird oder nur eine sehr geringe Streubreite hat.The invention is based on the object of providing a conductor track end region according to the preamble of the main claim to be formed so that the solder film thickness in the contact area of the connection contact of the flip-chip semiconductor element is kept constant or has only a very small spread.
Erfindungsgemäß ist diese Aufgabe durch die kennzeichnenden Merkmale des Anspruchs 1 gelöst. Weiterbildungen der Erfindung ergeben sich aus den Unteransprüchen 2 bis 4.According to the invention, this object is achieved by the characterizing features of claim 1. Further developments of the invention emerge from subclaims 2 to 4.
Ein Ausführungsbeispiel der Erfindung ist in der Zeichnung dargestellt und in der nachfolgenden Beschreibung näher erläutert.An embodiment of the invention is shown in the drawing and in the following Description explained in more detail.
F i g. 1 zeigt eine Draufsicht auf einen Leiterbahnzug, der in einen Leiterbahn-Endbereich gemäß der Erfindung ausläuft,F i g. 1 shows a top view of a conductor track, which is in a conductor track end area according to the invention expires,
F i g. 2 eine Seitenansicht der gleichen Verbindungsstelle mit einem aufgesetzten Flip-Chip-Halbleiterelement, jedoch vor dem Erhitzen auf Löttemperatur, teilweise im Schnitt, teilweise abgebrochen.F i g. 2 shows a side view of the same connection point with an attached flip-chip semiconductor element, but before heating to soldering temperature, partly in section, partly broken off.
Gemäß F i g. 1 ist auf einem nichtleitenden Substrat t ein Leiterbahnzug 2 angeordnet. In seinem Endbereich erweitert sich der Leiterbahnzug 2 zuerst zu einem etwa quadratischen Reservoirgebiet 2a, um sich anschließend zu dem fingerförmigen Gebiet 2b zu verschmälern, das als Aufsetzgebiet für den Anschlußkontakt des Flip-Chip-Halbleiterelementes dient.According to FIG. 1, a strip conductor 2 is arranged on a non-conductive substrate t. In its end area, the strip conductor 2 first widens to an approximately square reservoir area 2a, in order then to narrow to the finger-shaped area 2b , which serves as a contact area for the connection contact of the flip-chip semiconductor element.
In Fig. 2 erkennt man auf dem nichtleitenden Substrat t den in den Endbereich 2a, 2b auslaufenden Leiterbahnzug 2, auf dem sich eine Lotschicht 3 ausgebildet hat. Über dem Aufsetzgebiet 2b wurde ein Anschlußkontakt 6 eines Halbleiterelementes 5 positioniert. Der Anschlußkontakt 6 des Halbleiterelementes 5 besteht aus einem harten, beim Lötprozeß nicht schmelzenden Kern 6a, beispielsweise aus Kupfer, und aus einer auf den Kern aufgebrachten Weichlotschicht 6b, beispielsweise aus Blei oder Zinn, die dem Aufsetzgebiet 2b zugekehrt ist.In FIG. 2, on the non-conductive substrate t, one can see the conductor track 2 which runs out into the end region 2a, 2b and on which a solder layer 3 has formed. A connection contact 6 of a semiconductor element 5 was positioned above the contact area 2b. The connection contact 6 of the semiconductor element 5 consists of a hard core 6a, for example made of copper, which does not melt during the soldering process, and a soft solder layer 6b applied to the core, for example made of lead or tin, which faces the contact area 2b .
Die Wirkungsweise des erfindungsgemäß ausgestalteten Leiterbahn-Endbereichs 2a, 2b ist folgende: Nach dem Aufbringen des schmelzflüssigen Lotes 3 im Schwall- bzw. Tauchverfahren zeigt sich, daß die Lotfilmdicke im Aufsetzgebiet 2b des Anschlußkontakts 6 des Flip-Chip-Halbleiterelementes 5 sehr konstant ist und nur eine sehr kleine Streubreite hat, während sie im Reservoirgebiet 2a weit weniger konstant ist und ziemlich breit streut. Die sonst als statistische Streubreite auftretende Dickenvariation von Lotfilmen auf Leiterbahnen ist also durch die erfindungsgemäße geometrische Formgebung von dem schmalen, fingerförmigen Bereich 2b der Leiterbahn, der als Aufselzgebiet dient, in das sich anschließende Reservoir-Gebiet 2a verlagert worden, wo sie für die Flip-Chip-Kontaktierung keine Rolle spielt und nicht stört. Die Lotfilmdicke auf dem fingerförmigen Aufsetzgebiet 2b der Leiterbahn 2 hat also die gewünschte und geforderte notwendige Gleichmäßigkeit.The mode of operation of the conductor track end region 2a, 2b designed according to the invention is as follows: After the molten solder 3 has been applied in the surge or immersion process, it is evident that the solder film thickness in the contact area 2b of the connection contact 6 of the flip-chip semiconductor element 5 is very constant and has only a very small spread, while it is far less constant in the reservoir area 2a and spreads rather broadly. The variation in thickness of solder films on conductor tracks, which otherwise occurs as a statistical spread, has therefore been shifted from the narrow, finger-shaped area 2b of the conductor track, which serves as the contact area, into the adjoining reservoir area 2a, where it is used for the flip- Chip contacting does not play a role and does not interfere. The solder film thickness on the finger-shaped contact area 2b of the conductor track 2 thus has the desired and required necessary uniformity.
Das Zustandekomment dieses Effektes wird in ersterThe realization of this effect will be in the first place
Linie durch die Oberflachenspannung des flussigen Lotes und die Grenzflächenspannung zwischen der Metallisierung und dem Lot bewirkt. Bei vorgegebener konstanter Metallisierungsart bestimmt also die Oberflächenspannung des Lotes zusammen mit der Breite des fingerförmigen Bereiches 26 der Leiterbahn 2 die Dicke des flüssigen Lotfilmes, die sich in diesem Aufsetzgebiet einstellen kann. Alles flüssige Lot, das im Sinne dieser Gesetzmäßigkeit zu viel oder zu wenig im fingerförmigen Aufsetzgebiet 26 vorhanden ist, wird in das Reservoirgebiet 2a abgeschoben bzw. von dort herausgeholt. Für die Dickenkonstanz des resultierenden Lotfilmes ist dabei die zeitliche und örtliche Konstanz der Oberflächenspannung des flüssigen Lotes die wichtigste Voraussetzung. Diese experimentelle Bedingung ist besonders dann sehr gut gegeben, wem das Aufschmelzen des Lotfilmes im Schwallverfahren unter Schutzgas in reduzierender Atmosphäre (kein Sauerstoff anwesend) und ohne Anwendung von Flußmitteln erfolgt (seh' reines Lot, frei von nichtmetallischen Beimengungen).Line caused by the surface tension of the liquid solder and the interfacial tension between the metallization and the solder. With a given constant type of metallization, the surface tension of the solder together with the width of the finger-shaped area 26 of the conductor track 2 determines the thickness of the liquid solder film that can be established in this contact area. All liquid solder that is too much or too little in the finger-shaped contact area 26 in the sense of this law is pushed into the reservoir area 2a or taken out of there. For the constant thickness of the resulting solder film, the temporal and spatial constancy of the surface tension of the liquid solder is the most important prerequisite. This experimental condition is particularly good if the solder film is melted in a surge process under protective gas in a reducing atmosphere (no oxygen present) and without the use of flux (see pure solder, free of non-metallic additions).
Beim Ausführungsbeispiel nach den F i g. 1 und 2 hat das fingerförmige Aufsetzgebiet 26 eine Breite von 0,2 mm und eine Länge von 0,6 mm. Das Reservoirgebiet 2a hat eine Breite von 0,6 mm und eine Länge von Ο,ό mm, während der Leiterbahnzug 2, der zur Verbindung des Endbereichs 2a, 26 mit dem Leiterbahnnetzwerk der Schaltung dient, eine Breite von 0,3 mm :o hat.In the embodiment according to FIGS. 1 and 2, the finger-shaped landing area 26 has a width of 0.2 mm and a length of 0.6 mm. The reservoir region 2a has a width of 0.6 mm and a length of Ο, ό mm, while the conductor track 2, which is used to connect the end region 2a, 26 to the circuit conductor network, has a width of 0.3 mm: o .
Der Leiterbahnzug 2 mit seinem Endbereich 2a. 26The strip conductor 2 with its end region 2a. 26th
besteht vorteilhaft aus Nickel. Unter der Nickelschicht 2 kann sich eine in der Zeichnung nicht dargestellte Tantalschicht belinden, falls die gesamte Anordnung alsis advantageously made of nickel. A not shown in the drawing can be located under the nickel layer 2 Tantalum layer if the entire arrangement as
η elektronische Dünnfilmschaltung ausgeführt ist.η electronic thin film circuit is carried out.
Die Anordnung kann aber aurh als sogenannte «gedruckte Leiterplatte« ausgeführt sein. Dann besteht der Leiierbahnzug 2 mit seinem Endbereich 2a, 26 aus Kupfer, und eine Tantakchicht ist nicht vorhanden.The arrangement can, however, also be designed as a so-called “printed circuit board”. Then there is the Leiierbahnzug 2 with its end area 2a, 26 from Copper, and there is no tantak layer.
Hierzu 1 Blatt Zeichnungen1 sheet of drawings
Claims (4)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE2704833A DE2704833C2 (en) | 1977-02-05 | 1977-02-05 | Conductor track end area for soldering a semiconductor element using flip-chip technology |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE2704833A DE2704833C2 (en) | 1977-02-05 | 1977-02-05 | Conductor track end area for soldering a semiconductor element using flip-chip technology |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE2704833A1 DE2704833A1 (en) | 1978-08-17 |
| DE2704833C2 true DE2704833C2 (en) | 1982-05-27 |
Family
ID=6000439
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE2704833A Expired DE2704833C2 (en) | 1977-02-05 | 1977-02-05 | Conductor track end area for soldering a semiconductor element using flip-chip technology |
Country Status (1)
| Country | Link |
|---|---|
| DE (1) | DE2704833C2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58128749A (en) * | 1982-01-20 | 1983-08-01 | ノ−ス・アメリカン・スペシヤリテイズ・コ−ポレイシヨン | Connector for electric semifabricated part |
| US9466590B1 (en) * | 2015-11-13 | 2016-10-11 | International Business Machines Corporation | Optimized solder pads for microelectronic components |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AU3588571A (en) * | 1970-11-24 | 1973-05-24 | Joseph Lucas (Industries) Limited | A method of electrically connecting a semiconductor chip toa substrate |
-
1977
- 1977-02-05 DE DE2704833A patent/DE2704833C2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| DE2704833A1 (en) | 1978-08-17 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| OD | Request for examination | ||
| 8125 | Change of the main classification |
Ipc: H01L 23/48 |
|
| D2 | Grant after examination | ||
| 8363 | Opposition against the patent | ||
| 8339 | Ceased/non-payment of the annual fee |