DE2344729A1 - ARRANGEMENT FOR ACCEPTING UNITS OF LOANS AND CREDIT ACCUMULATION - Google Patents

Description

THE WURLITZER COMPANY, incorporated under the laws of the State of Delaware, 105 West Adams Street, Chicago , Illinois 63603 (V.St.A.)

Arrangement for the acceptance of credit units and for credit accumulation

The invention relates generally to coin operated circuitry used for registering a Number of credit units are used, which is the value of in a vending machine o. The like. Throwed Coins match. In particular, the circuit arrangement according to the invention relates to a coin accumulator circuit, which bonus credit impulses generated for granting a bonus or discount credit, when a predetermined minimum monetary value has been accumulated in the circuit.

Coin accumulators are used in all types of vending machines, and they are particularly popular in used in situations where coin accumulation is required because of the price of a specific commodity not with a single coin or a single one

KG / il

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Appearance can be covered. In this case there are several coins or bills to trigger the necessary mechanism required to make the choice of a specific item in a vending machine or the choice of a specific one To enable piece of music in a jukebox. While the invention extends generally to vending machines, the inventive arrangement is for coin accumulation and for granting a bonus credit, especially intended for use on jukeboxes, which in a known conventional manner selected pieces of music both before. Plates with 45 rpm, as well as from Play long-playing records.

Until now, the user of a jukebox had the opportunity to after certain coins have been inserted into a coin slot, a given number of records to be played to select. For example, if you had thrown in three 10-pound coins, you could get one, and after Throwing in a 50 Pf. piece, two or three records Choose taking a bonus or discount credit for using coins of larger denomination is given. Some coin machines can also accept DM 1 pieces and thus allow a selection an even larger number of records with additional bonus or discount credits for coins with larger ones Face value. For example, you can choose five or more records for a single DM 1 piece. In general coin accumulators allow only a given number of choices other than face value of a single one corresponds to the inserted coin. Users of such Vending machines are therefore penalized in this way if they insert the correct coin value, however in the form of several coins with a smaller face value.

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The invention is therefore based on the object of providing a circuit arrangement for coin accumulation and for specifying credit to buy which coins of all denominations accumulated, credits for the amount of money received and inserting bonus or discount credits into the credit accumulator after inserting the money over a predetermined one Value beyond and regardless of the face value of the coins. Furthermore, it belongs to the object of the invention, this arrangement can be set up relatively easily compared to at least the current state of "solid-state-technology", so that it can be accommodated in a single integrated circuit.

Briefly summarized, the circuit arrangement according to the invention contains a five-level binary counter and a for coin accumulation and bonus credit creation Input coding network, which can be designed as a diode matrix or a gate, for example, and on a leash Number of movable switching contacts is connected, which when inserting coins of different denominations be operated. This can also include a switching contact, which has the value of a thrown Apparent. Each 10-Pf. Piece has the delivery of an output signal consisting of a single clock pulse from a coin input counter, which is then a price setting circuit for setting the Value of each credit and a bonus level switch is fed, which generates discount credits after a predetermined number of previous normal price credits has been determined. Each coin slot has one Number of credit pulses or counts corresponding to the number of 10 pfennig pieces that are contained in value in the inserted coin.

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This means that a 1 DM piece generates ten clock pulses in the coin input counter. At this point it should be noted that the coin input coding network value is of course applied can coordinate the different coin values of foreign countries if this is necessary.

The price setting circuit is a preselected divider circuit for setting the basic price of each hit Choice. With the specially illustrated circuit configuration the circuit can be set manually so that it switches the pulse counter input through 1, 2, 3, or 5 divide using a single jumper wire that is circuitry connected to the divider, If the divider is set to the value 2, then two 10-Pf.-pulses generate a single selection output pulse at the accumulator and thus set the basic price for each choice to be made for two 10-Pf. 20 dpf. Per disc played.

The output pulses of the coin operated circuit are also fed to a bonus level circuit, which provides additional credit impulses. This bonus credit circuit is formed by a decoder system, which for each 50 Pf. level that is used as a bonus height step is used, has a separate output. Bonus credits can be preset in any way you want will. The coin accumulator and bonus credit circuit of this invention also includes an oscillator clock circuit as a common clock pulse generator for all sections of the logic circuit; which also includes a regulated power supply for all circuits in the system. The entire logic circuit can be accommodated in a single integrated type and are therefore extremely space-saving and inexpensive to set up

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The circuit arrangement according to the invention contributes to the reduction the number of discrete logic circuits while increasing the adaptability of the System is expanded so that you can place a variety of coin boxes remotely on tables, counters or in Set up booths and connect them to a single jukebox by means of electrical cables, which remotely controlled the various choices made. The circuit arrangement includes a through 1, 2, 4 or 5 dividing circuit, which credits in the way pays that at each bonus hog 'step selected a bonus credit pulse is generated so that after registering the first bonus height step (10 Pf-, 20 Pf., 40 Pf., 50 Pf.) Additional electoral credits in the system which are independent of the order of the inserted coins. Of course, directs As already mentioned, the bonus height increment is based on the respective monetary system of the country in which it is installed. the generated by a divider circuit dividing 1, 2, 4 or 5, a bonus pulse, which in a delay circuit is temporarily stored before being passed on to the credit and bonus credit accumulator circuit. While the bonus pulse is still in the delay circuit, the bonus increment counter returns The bonus pulse output signal is automatically returned to its starting position to start counting again to be able to start from coins subsequently thrown into the coin receiving mechanism. Then a synchronized Clock pulse delivered to the delay circuit, whereupon the stored therein Bonus credits to the credit and bonus credit accumulator be delivered. Due to the temporary storage of the credit pulses for a predetermined time interval it is possible to use the bonus increment counter immediately

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then to operate when, for example, six or more 10-Pf. pieces one after the other in a distant wall 1! control oil box can be thrown in and the bonus height increment is set to LO Pf. So the bonus impulse is stored in the delay circuit, it can from there to the credit and bonus credit accumulator are delivered, at a later point in time, which corresponds to the sampling or sampling pulse time interval. In this way, a larger number of remotely mounted on the wall Münzaufnähme- and voting boxes o. The like. Be scanned electronically one after the other, the credits and 3'muskredite stored therein are successively delivered to the credit and bonus credit accumulator, so that the remote Coin operated voting boxes are not placed in places interfere with each other and affect the credits of other polling boxes.

A preferred embodiment of the Invention with reference to a drawing in which the same details are given the same reference numbers, are explained in more detail. Show it:

Fig. 1 is a schematic block diagram with the various circuit stages of the circuit arrangement according to the invention described;

2 shows an arrangement diagram for the partial circuit diagrams 2A-2E;

Figures 2A, 2B, 2C, 2D and 2E

one section each from the overall logic circuit;

3 is a circuit diagram of an associated power supply;

Fig. 4 is a schematic block diagram for a Circuitry for keeping glitches away from the coin accumulator;

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5 shows a train of waves afflicted with glitches, caused by switch bouncing when thrown in a coin in the system;

6 shows interference pulses as can be generated by static electricity; and

FIG. 7 is an illustration of the time delay characteristic of the circuit of FIG. 4 to avoid the effects of interference pulses according to FIGS. 5 and 6.

The circuit arrangement 10 is shown in FIG. 1 of the drawing shown simplified in the form of a block diagram. Basically the electronic circuit arrangement 10 designed for LSI (large scale integration) so that they are in a single chip or on a single substrate can be accommodated using modern logic circuit technology. The components of the circuit arrangement 10 can either be in bipolar logic (RTL, T ^ L and the like), or in MOS (p-channel, CMOS or the like) technology or a combination thereof, as desired.

The circuit arrangement 10 according to FIG. 1 with credit and Bonus credit accumulator is particularly suitable for the application at a jukebox where the value of each choice made is registered versus the number of ones registered Credits which the in the coin slot mechanism corresponds to the amount of money inserted, can change. Is the system programmed for a 20 Pf. Play value? and if a single choice is made, the insertion of two 10 pfennigs causes registration of two coin credits and one elective credit. Once the choice has been made and carried out, the Elective credit deleted in the credit accumulator. However, the value of 50 Pf. In any combination

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of 5 and / or 10 pfennigs in the coin acceptor mechanism inserted, a coin credit is given for every 10 pfennigs plus none, one or more bonus optional credits, which, depending on the bonus program, offer the possibility of three or more records to choose and play. The number of bonus choices a given user can have at any given time-_ The point to be granted depends on the total amount of money that was made prior to making the first choice Coin acceptance mechanism has been inserted. By entering bonus credit impulses into the circuit, the unit costs are reduced per choice as the number of bonus credits granted to the user increases.

This can best be seen from the block diagram of Fig. 1. One with a money acceptance mechanism and / or a bill reader for identifying bills equipped cash input encoder 11 is connected on the output side to a basic price selection divider 12, which per 10 Pf. value grade of the in the coin acceptance mechanism thrown in money receives an input signal. As mentioned above, this is the basic price 20 Pf., The divider by two requires two pulses from the money input encoder 11. The output signal of the cash input encoder 11 is also supplied to a bonus increment counting circuit 13, and the normal credit impulses are entered into an election accumulator 14 after their conversion into election credits, which includes an up-down counter. After finding a predetermined number of normal Credit pulses, a bonus pulse is generated in the bonus increment counting circuit 13, which is fed into a bonus amount counter 15 and a bonus and cancellation input counter 16 is passed, whereupon this bonus pulse into the counter

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of the dial accumulator 14 is passed. The output signal of the circuit 14 passes into a circuit 18 which the Indicates number of options enabled while one Circuit 17 is connected to the bonus and cancellation input counter to put the circuit back into operation set and prevent a larger number of bonus credit pulses after entering an originally made choice is fed.

More precisely, the cash input encoder 11 contains a number of coin scanning switches and a five-stage binary counter circuit, which is connected to an input coding arrangement. Here the throw-in results in a single one 10-Pf. Piece a single clock pulse as an output signal to control the circuits 12 and 13. Each in the coin receiving mechanism of the circuit 11 inserted coin results in a number of counting steps or clock pulses, the number of which corresponds to the amount of 10-Pf. Pieces are the same as the value of the one that has been thrown in Coin are included. Produce two 10-Pf. Pieces two clock pulses, while a 2 DM piece generates twenty clock pulses that are both the base price selection divider and the bonus increment counting circuit 13 are also supplied. The incoming money counter and the bonus increment counter can be equipped with a diode matrix, which can easily be changed to foreign currencies by changing the connections can be changed.

The base price option divider 12 is a preselected divider with a manually operable programming mechanism, with the help of which the basic price per choice can be easily can be adjusted. As already mentioned, one can easily set up the circuit so that it runs the counting pulse train

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divide by 1, 2, 3, 4 or 5 by simply rotating the selected switch. This rotary switch can of course also be replaced by a number of single pole changeover switches or even by circuit wires, if wanted. If the divisor is to divide by 2, each choice made requires two pulses, corresponding to the Throw in two 10-pound coins for the election in question. If, on the other hand, three impulses are required, the choice costs 30 pfennigs, etc. In this way, the basic price Set for each choice on each device so that a good return on investment is achieved. The bonus increment counting scarf device 13 accumulates the output pulses of the GeIdeingangscoder and generates an output pulse for one, two, four or five input pulses each, depending on the presetting of the divider. Is the divisor by 5 set, one output pulse comes out for every five input pulses. The one dividing by 1, 2, 4, or S. is the bonus increment counter. The credit accumulator circuit according to the invention can easily be designed in such a way that it battery-mulates credits up to a value of 3.50 DM or more and thereby discrete bonus height increments (10 Pf., 20 Pf., 40 Pf., 50 Pf.) forms in which different Numbers of bonus pulses can be entered into the credit accumulator. Any output signal which corresponds to a different bonus level increment can be changed to any (or none) of seven preset Bonus input selection circuits in the bonus and cancellation input counter 16 are connected. on In this way it is possible to grant bonus credits in almost any preset way, and the relevant one is triggered Bonus credit circuit is automatically reset after the user has made a choice whereby the Dial cancellation circuit 17 is triggered.

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The bonus and cancellation entry counter is a three-stage counter for entering a predetermined number of Bonus creditors and to cancel the credits after executed Choice. Bonus output pulses or credits cause the election accumulator 14 to have an "up" count condition Takes precedence, while a credit cancellation as a result of a choice made in this circuit causes an "A" down count takes precedence, preferably the dial accumulator 14 includes a simple up-down counter arrangement instead of a more complex adder circuit which requires additional hardware. The selector deletion gates contained in the selector canceling circuit 17 are designed as a diode or gate matrix, which is preset in such a way that for each type of choice made, such as Sinqle choice, LP choice (long-playing record) or TT choice (Front runner), as they are preprogrammed in the jukebox, the corresponding desired number of Dial clearing counting steps is generated.

The Wah! Accumulator contains a five-stage up counter with a maximum of 31 counting steps, corresponding to the. maximum storage of 31 choices. One increases the number of · counter steps to 6 or more, the capacity of the dial accumulator 14 can easily be set to 63 or increase more electoral credits. In the selection circuit 18, the preset switching means are contained, which are necessary are for displaying a credit display for counting> .ier LP or TT choice, so that the user has an overview has remaining options above him.

The entire circuit arrangement 10 according to FIG. 1 is through fed a regulated voltage supply 19 which is connected to all blocks of FIG. For controlling

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the circuit is an oscillator or clock system 20, which is also connected to all blocks.

Fig. 2 shows how the individual circuit diagrams of Fig. 2A, Combine 2B, 2C, 2D and 2E to form an overall circuit diagram got to.

The circuit diagram section of FIG. 2A from the inventive Circuit arrangement 10 contains several Kurzzeitur -.- i Tact switches 30, 31, 32, 33 and 34, which respectively "coins with the value of 5 pfennigs, 10 pfennigs, 50 pfennigs, 1 DM and Γ DM are assigned. Preferably the actuated ones go Contact switch into a grounded state, which corresponds to the logical output state zero in the system. Switch 30 is connected via two resistors 37 and 38, at their junction with a grounded capacitor 39 is connected to a terminal 36 connected to a voltage source. The junction of the capacitor 39 connects a diode 40 to a line 41. Similarly, the switch 31 overheats two resistors 42 and 43 on the live terminal 36 and at the junction of the two resistors is next to a grounded capacitor 44 a also connected to the line 41 connected diode 46. In a similar way, a live one supplies power Terminal 47 via two resistors 48, 49 or 52, 53, the contact switches 32 and 33. Here, too, are each on the connection points between the two resistors a capacitor 50 or 54 and a diode 53 or 56 connected. And finally, the contact switch 34 is connected to a live one via two resistors 58, 59 Connection 57, and the middle connection point between the two resistors is both over one

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Capacitor 60 grounded and also connected to line 41 via a diode 61. So becomes any of the contact switches 30 to 34 closed, the cathode of the respective diode is 40 or 46 or 51 or 56 or 61 Ground potential, so that through this diode and two series-connected resistors 63 'and 64 of one positive voltage carrying terminal 62 a current can flow.

The aforementioned resistors 63 and 64 belong to a differential circuit 66 with a transistor pair 67 and 68; these transistors are coupled so that transistor 68 crosses the emitter resistor 69 of the transistor 67 bridged. If the transistor 67 is turned on once at a first initial voltage value, then it is on subsequent higher voltage value necessary to block it. When the transistor 67 is conductive, a base-emitter current flows through a transistor 70, which thereby connects the ground potential to the free input of a JK flip-flop network 71 (Pig. 2B).

The logic zero state generated by closing switch 30 reaches one input each of two AND gates 72 and 73 on a direct route, and through the AND gate 72 to AND gates 74, 75 and 76, so that through the AND gate 72 a single counting step is registered, which corresponds to the value of 10 Pf. If the 20-Pf. Switch 31 is closed this results in the logical zero state at AND gate 74 and also at an input of AND gate 75, The pulse from switch 31 also reaches one input each of AND gates 73 and 76 .. When the 50-Pf. Switch is actuated 32 becomes a zero state at the input of the AND gate 72 and via this gate to the AND gates 74, 75 and generated. If the 1-DM switch 33 is closed, so happens

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the zero state at the inputs of AND gates 74, 73 and Ib. When the 2-DM switch 34 is closed, a zero state is passed to the AND gates 73 and 76. The outputs of the AND gates 72-76 are connected to a counting circuit which consists of a number of JK flip-flops 77, 78, 79, 80 and 81, the Q outputs of which are each connected to the toggle input of their neighboring flip-flops, while the Q outputs of the flip-flops 77, 78 and 79 are connected to a NAND gate 82, which also receives an input signal from a NOR gate 83 via the flip-flops 80 and 81. If all of the inputs to NAND gate 82 are high, its output is low and transmits a logic zero pulse to the input of a NAND gate 84 in FIG. 2B.

The Q output from JK flip-flop 71 is also at the input from NAND gate 84 and at the input of a NAND gate 86, the output of which is again connected to the input of a second NAND gate 87 is fed back, the output of which is in turn fed back to one input of the other NAND gate 86 is. Furthermore, the output of NAND gate 87 is applied to an output terminal 88, via which a coin indicator lamp put into operation.

A clock circuit 90 with a multivibrator 91 is also connected to the input of the NAND gate 84, One output of which is connected to two AND gates 92 and 93 via a flip-flip 94. The output of the AND gate 93 is reversed by an inverter 96 so that its output pulses are opposite to the output of the other AND gate 92 have opposite polarity. In this way, the 4-phase clock circuit becomes two generates output signals shifted by 180 in their phase,

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The output of the clock circuit 90 also reaches the toggle input of the flip-flop 71 via line 97 and to the input eini ·: flip-flops 98 and to a NAND gate 99, as FIG. 2D shows. Lin StelL reset flip-flop 100 of the bonus chip output circuit has an output via a line 101 to the input of the NAND gate 84 and to the input of an AND gate 102, the output of which is in turn to a gate circuit 103 for resetting a number of Flip flops. 104, 105 and 106 is connected.

The clock circuit 9 ') generates control pulses for all counting and follow-up operations of the system. As mentioned earlier, two are consecutive and reciprocal 180 ° phase-shifted clock signals generated. The first The clock pulse at the output of the AND gate 92 is the main clock pulse, while the second clock pulse is sent to the output of the inverter 96 to reset the bonus amount display circuit, the bonus pulse trigger circuits and the base price counter circuits are used. To create The output of the multivibrator 91 is sent to the toggle input of the flip-flop 94 and simultaneously two basic clock signals placed at the input of the AND gate 92. In this way, two 10 kHz signals are generated that are mutually exclusive are 180 out of phase.

When the coin accumulator circuit is switched on for the first time, the entire control circuit is enabled or returned to its initial state. A transistor circuit can be used for this purpose, the first transistor of which blocks a second transistor when it is switched on and thus generates a release or reset signal. During this output period all flip-flops ⁷ 7, 79, 78, 81 and 80 of the coin input pulse counter can toggle,

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until all Q outputs assume a logical 1 state. As a result, the output of the NAND gate 82 assumes the logic 0 state and prevents further Clock pulses or toggle signals get to NAND gate 84.

In addition, when the system is switched on in the initial period, a basic price counter circuit 110 is activated directly the output of the release circuit, which is connected to the input 111 of a NAND gate 112, is reset is, which in turn lies with its output at the input of an AND gate 13. This action gives flip flops 114, 115 and 116 free, so that in each case their Q-outputs the logical O-state and their O-outputs the logical Accept state 1-.

During the start-up period, the reset signal will also be passed through AND gate 103 to reset flip-flops 104 and 106 of the bonus incremental counting circuit. here the Q outputs also assume the logic state zero and the cf outputs the logic state 1. Further this output pulse arrives at bonus level output gate 120, 121, 122 and 123 as well as a connection 124,

so that the number of bonus pulses generated is zero at the start of the operation.

Bonus clear counting circuit 126 may toggle until all of the Q outputs of each during the initial period Flip-flops 127, 128 and 129 have assumed the logic state 1. This process prevents further tipping the flip-flops by producing the logic 0 state at a NAND gate 130, which in turn further toggles with the help of clock pulses via the NAND gate 99 and a NAND gate 131 prevents its output from being switched on the input of the first flip-flop 127 is performed.

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During the initial period, a will also appear in FIG. 2C Main up-down credit counter 132 reset so that that its output assumes the logical O state when the input signal of a direct enable connection assumes the logical 1 state · The entire circuit arrangement is now in its initial state and is ready to accumulate credit and generate bonus impulses.

2A, the coin input pulse generator circuit controls the loan receipt so that the other parts The system receives a credit input based on the multiple of the basic credit unit in this Trap with the value of 10 pfennigs. When a coin is inserted into the coin receiving mechanism, one of the switches 30, 31, 32, 33 or 34 closed and connected to ground. At the beginning of the operation, the Q outputs of the Flip-flops 77, 79, 78, 81 and 80 in the logical 0 state. The switch closes when a 10 pfennig coin is thrown in 30, and the ^ outputs of these flip-flops assume the logic 1 state. Assuming there was in this one Land a 20-Pf. Piece, so if such a Coin of the 20-pfennig switch 31 can be closed and the flip-flops 79, 78, 81 and 80 bring the logic 1 state, while the flip-flop 77 is logic Maintains 0 state. A 50 pfennig coin closes switch 32 and flip-flops 77, 79, 81 and 80 take the logic 1 state at their (! output, while the flip-flop 78 at this Q output the logic Maintains 0 state. When a 1 DM coin is inserted, the switch 33 closes and generates the at the Q output Flip-flops 77 and 81 have the logic 0 state, while the opposite logic 1 state at the Q output

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of flip-flops 79, 78 and 80 is present. By closing the 2-DM switch 34 it is achieved that the ci outputs the flip-flops 77, 79 and 80 assume the logical 0 state, while the flip-flops 78 and 81 at their (! outputs set to the logical 1 state. These are the various logical status options for the various possible input signals from the coin receiving mechanism.

The five flip-flops of the coin counting circuit are in "up" configuration arranged so that an input pulse is necessary to switch the Q outputs of the flip-flops from the state (Hill) to spend in the state (00000). This arrangement ensures that all Q outputs are received at the first. Clock pulse assume the 0 output state after a count 31 has been reached. Besides putting the Credit counter, the closing of one of the coin switches has the effect that the double threshold or differential circuit 66 is activated, which prevents the clocking of the coin input pulse generator. This is achieved by that transistor 67 is normally high and the output of the transistor when a coin switch is closed 70 goes down, thereby depressing the Q output of flip-flop 71 to a low state, so that the clock pulses blocked by NAND gate 84. After the inserted coin has passed through, the opens each actuated switch again and a capacitor 136 is discharged; after about 45 milliseconds the output of transistor 70 goes high again, so that the clock pulses now pass through NAND gate 84 again can get through. The next clock pulse brings the Q output of the flip-flop 71 to the logical! State thus allowing the clock signals to pass through NAND gate 84. This action allows the entry

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to count up the pulse counter up to an output state and this credit information into the basic price counting circuit 110 to transfer.

The basic price counting circuit HC is one with a divider ratio η programmable counter, where η = 1, 2, 3, 4 or 5 can be. This counter is used to set the Number of basic credit units used, that is the number of 10 Pf. Pieces required for a single playback, if this circuit arrangement according to the invention used in conjunction with a jukebox. The desired number of for the choice of a single playback necessary Kreditirr.pulse is through a pluggable Proarammkartp selected, which may include a rotary switch 138. The credit information from the coin input pulse counter is transmitted to the basic price counter by a NOR gate 139 over a line 140 to the Kipn input of Flip-flop 114. The three flip-flops 114-116 form the price counting circuit and reach one during operation . "'Mnlstatus that is 1 less than the desired number is. When counting n-1 pulses, there is a logic state 1, so that the next clock pulse input via a AND gate 142 and a line 143 to the next main credit counter, and to a base price counter reset flip-flop 144 arrives.

The CF output of flip-flop 144 is normally located in the high state, but changes to the logical ΰ state when a clock pulse is received via the AND gate 142 arrives. This state is passed through an AND gate 146 and the AND gate 113 in a reset line 147 to the Reset flip-flops 114, 115 and 116. The next clock pulse shifted in phase by inverter 96 is entered in the counting circuit and controls it

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so that when the next normal clock pulse is received the counting process begins.

If desired, a partial credit cancellation circuit can also be inserted and connected to the input of the AND gate 146 via a connection 148. When using a partial credit cancellation option, the Loschimpuls.se from the bonus cancellation counter circuit 126
passed through a logic circuit in order to reset the basic price counter to the counting state 0 as soon as a choice has been made. Should, however, be a partial
If credit is withheld, connect 148
a stop signal. In this configuration a
Partial credit only deleted when a bonus credit is granted. The Q output of the flip-flop 100 only changes to the logic switching state 1 when a bonus pulse is received by the bonus and delete input counting circuit.
This logic 1 pulse is then passed on to
delete existing partial credits in the circuit.
If, for example, a basic price of 10 Pf. If a 50-Pf. piece is thrown in for each credit, the base price counter grants two individual choices. The bonus arrangement grants an additional choice at the 50 pfennig level and deletes the IC pfennig partial credit in the base price counter.

The bonus credit growth counter comprising the flip-flops 104-106 continuously accumulates the input pulses from the coin input pulse counter and emits an output pulse after every fifth such input pulse if the division ratio η = 5. The output pulses from the coin input pulse counter come from NOR gate 139
via a line 150 to the basic increment counting circuit and toggle the first input of the flip-flop 104. The three-

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step binary counter counts up to four and brings the Q output from flip-flop 106 to logic state 1. The fifth clock pulse can then be passed through an output AND gate 151 in a bonus amount display circuit 152 arrive. This Pulse toggles the bonus trigger flip-flop 100 and bonus amount display circuitry 152 via a line 154 at the input of a first flip-flop 156. Overall, the bonus amount display circuit contains 155 three flip-flops 156, 157 and 158. The Q output of flip-flop 100 is used to reset the Basic bonus incremental counting circuit is used via output line 101 and AND gates 102 and 103, and also In this way it reaches the flip-flops 104-106. This action then leads to the resetting of the flip-flop into its normal state, where the output terminal Ci assumes the logic state 1. This will be with the first reached phase-shifted clock signal after applying the reset signal to this circuit.

The bonus amount display circuit 152 is basically one three-stage binary counting system, which counts the output pulses of the basic bonus increment counter through an AND gate 151, and thus determines the bonus amount, i.e. a 50 Pf. condition, a 1-DM state, a 1.50-DM state, or a 2-DM state. The output of the basic bonus increment counter is passed through the AND gate 151 and toggles the input of the first flip-flops 156. The normal state of all Q outputs of flip-flops 156-158 is the logical 0 state. Therefore, the first input pulse generates a logic! Pulse at the Q output of flip-flop 156, which again through an associated buffer AND gate 160 and NAND gate 120 to an input terminal of a Program card 161 is given, which is indicated in Fig. 2D with broken lines. A second bonus amount

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is represented by the loqisehen output state 1 at the Q terminal of flip-flop 15 ⁷ and this state passes through a buffer AND gate 162 to NAND gate 121. The third input pulse can tilt the flip-flop on Bonushühenanzeiger and generates at this the logic output state 1, and also at the first flip-flop 156 to thereby generate an output signal via the NAND gate 122, so that a signal passes through a buffer AND gate 163 as a result. If the bonus trigger flip-flop 100 switches to the logic switching state 1, this initial state allows pulses to be passed on through a relevant NAND gate 120 or 121 or 122 or 123 in order to transfer information to the program card 161. Each bonus height step can be programmed individually up to and including seven bonus credits. The setting of the program card determines the route of the bonus pulses to corresponding AND gates 166, 167 or 168 of the bonus and clear counting circuit 126.

As soon as the first choice has been made at the jukebox, the bonus credit counter reverts to its initial O status back so that the coin accumulation begins with a first bonus credit, which is given for the first 50 pfennigs, while a second bonus credit for the second inserted 50 Pf. is given etc. The reset signal for the bonus credit counter is obtained via the output of two NOR gates 170 and 171 on a line 172, which 2C is connected by the input of an AND gate 173 to a line 174 to the line 176 reset the bonus credit counter.

The main credit counter is a five-step incremental counter and stores the accumulated election credits, both Coin credits as well as bonus credits, in the counting circuit 132 shown in FIG. 2E. The basic coin and

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Bonus credits get there via two NAND gates 180 and 181 and via two further NAND gates 182 and 183. The up-down counter 132 has two inputs, one to 182 for counting up and the other to 183 for Counting down. The outputs of NOR gates 170 and 171 determine which mode of operation of the up-down counter 132 performs, i.e. whether there is an upcounting locator in this Countdown state is set. Take the exit v.m NOR gate 170 to the logic state 1, then the counter counts up or accumulates the pulses supplied to it she. If, on the other hand, the logic state 0 prevails at the output of flip-flop 170, then the counter counts down or counts down. clears.

A logic 0 output from an optional enable decoder circuit 184 blocks the output of the counter circuit 132 to a state (00000) and prevents that the counter counts down. There is also this optional enable decoding circuit 184 outputs a signal to the main credit counter to indicate that a count has reached 31 so that it does not automatically reset itself to 0 at the 32nd count.

The optional enable decoding circuit 184 includes one Number of NAND gates 186, 187, 188 and 189, their outputs to the program card 161 and from there to the corresponding Display circuits are connected. The NAND gate 186 has a switch 190 which can be used, for example can use to display a leader's vote. Similarly, a switch 191 of the NAND gate 187 for displaying a selected long-playing disc, and a switch 192 of the NAND gate 188 for Use the 45 RPM single platter selection indicator. By closing switches 190, 191 or 192

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a certain state is created in the circuit, due to which a corresponding number of Credits and bonus credits are accumulated, leaving a front-runner state or LP choice can be produced.

The bonus clear counting circuit 126 passes signal information in the form of pulses into the main counting circuit 132 depending on bonus trigger pulses or cancel pulses, depending on whether the counter is up or counts down. The output of the program card 161 is through AND gates 166, 167 and 168 and through the bonus and Clear counter decoded. These gates 166-168 receive a logic 0 pulse, which has a counting step in the three-stage binary bonus and clear counter. As soon as a bonus or cancellation pulse arrives, it goes the output of NAND gate 130 goes to logic 1, and this signal is used to set the To lock the coin input pulse counter in a switched-off state. The normal state of the Q outputs of the counting flip-flops 127, 128 and 129 is (111), and once that condition prevails, the clock pulses are through the off-state of the NAND gate 99 blocked, which in turn is dependent on the logical O output state of the NAND gate 130.

The circuit to which the NAND gate 189 belongs is a double threshold circuit and controls the erase function. Once a choice has been made, the main credit meter is in the clear state, and the correct number of erase pulses is recorded by bonus and erase counter circuit 126 on the main credit counter transfer.

4098 1 1

A polling enable decoder circuit 200 monitors the state of the main counting circuit 132 in order for the polling enable relays of the jukebox to create credit status information over a number of Switches 201, 202 and 203 each connected to a transistor 204, 205 and 206, respectively. The exits a number of OR gates 210, 211, 212 and 213 are each connected to a particular one of these switches 201-203 connectable, while the inputs of these gates are connected back to the output of the main counter 132. At the Count value 0 in main counter 132 results in the following output states at gates 210 - 213: When count value 0 on 0 output at each gate, with count value 1 an individual output from gate 213, with count value 2 an output at the Gates 212 and 213, with a count value of 3 outputs from gates 212 and 213, with a count value of 4 to 7 outputs at the gates 211, 212, and 213, and counts from 8 to 31 each of the gates 210, 211, 212 and 213 produces an output. The output of the main counter 132 is also applied nor to a number of AND gates 216, 217, 218 and 219, which are used as intermediate decoding stages for the outputs of the Serve major credit counter. These gates work as follows: If the count value is 0 to 2, all gates have a 0 output. Count value 3 generates an! Output at gate 216, count value a 0 output at all gates. A count has 5 result in a 1 output at gate 217, while a count value 6 produces a 1 output at gate 218, and due to a count value 7 results in a 1 output at all gates. The count value 8, 9 or 10 has a 0 output at all gates. A count, 8, 9 or results in a 0 output at all gates while a count 11 produces a 1 output at port 216, and count 12 produces p outputs. A count 13 produces one 1 output at gate 217, count value 14 a 1 output

40981 1/0984

Gate 218, and count 15 have a 1 output on all Gates, Since the sole outputs of the main counter are used to reset the AND gates, the result is for the number 16 the same starting value as for the number 0 etc.

The outputs of AND gates 216, 217, 218 and 219 are each connected to an input of NOR gates 226, 227, 228 and 229 connected, which as. The last decoding stage of the main counter circuit 132 is used. The outputs of these gates are represent the status of the main meter and show the credit level present in the meter at all times. is For example, if the program card for LP selection is set to three times the credit level, then the -Output of gate 226 by switching transistor 204 through to the long-playing record release relay, as soon as at least three credits have accumulated in the main counter 132. Got a loan or two im Credit accumulator 132 accumulated, the operating state at the output of gates 226 to 229 is the 0 state When the third credit is received, the output of the gate 226 is positive »When four credits are received the output of gate 226 remains positive. If the fifth credit is accepted, the outputs are from gate 226 and 227 are positive, and if six credits are received, the outputs of gates 226, 227 and 228 are positive. When receiving seven to thirty-one credits, the outputs of all gates are in logic 1 or in a positive state. The single-disk release circuit is switched on as soon as a or more credits are in the main credit meter. The LP or long-playing records and the TT or front-runner optional release signals can be programmed on program card 161 to run the circuit on a

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to release such a level that at least two to four credits or five to seven credits are formed. That means that a LP choice requires around three credits, while a top choice usually requires six to requires seven credits. In any case, the type of choice is not released until the minimum number of credits for the desired program in the main credit accumulator 132 is entered.

Fiq. 3 contains a schematic circuit diagram for a regulated Power supply 300, with a function regulator (Motorola 6030) 3Cl, one output of which is connected to the base a transistor 302 connected between an input terminal 203 and an output terminal 304 is connected in series. A second transistor serves as a short-circuit fuse and is connected to its emitter to a resistor 307 and its collector to another output of the function controller 301 and to one Capacitor 308 connected. The output of transistor 3u2 is passed through several capacitors 309, 310 and '311 filtered so that a carefully filtered and regulated DC voltage is available at output connections 313 and 314 stands. The operating voltage of the voltage regulating circuit can be adjusted by two potentiometers 316 and to adjust.

Of course, any other suitable control circuit can be used instead of the one shown in FIG if it is able to adhere to the required current and voltage tolerances.

one
Fig. 4 shows / alternate input circuitry which can be connected to any of the coin operated switches of Fig. 2A. In the present case is

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the 10-Pf. switch 30a is shown, which is typical for all other switch arrangements. There are a number of shift register stages 801, 802 and 803 and with one input each connected to the clock circuit, while a second input of the shift register 800 is connected to the switch 30a is connected. This circuit arrangement keeps interference pulses away, which are caused by contact bounce or static electricity and, if they could get into the credit accumulator, unpaid there Would trigger credit impulses. Fig. 5 shows contact bounce at the beginning and at the end of each switch closing process, the briefly consecutive open and closed states by spikes 806 ". Fig. 6 shows a number of peaks 807, as sometimes caused by static electricity when it enters the system. To prevent switch bounce or static electricity generates unwanted credit pulses, one applies the shift registers 800 to 803, which have a certain Bring a time delay into the system so that an output pulse can only arise when this delay time has expired. In Fig. 7 is the initial area 808 of a switching pulse. The spikes 806 caused by switch bounce have a duration of about 5 milliseconds, while the dwell time of the shift registers 800 to 803 is about 20 milliseconds is set, five milliseconds for each individual shift register. This is how a NOR gate arises 809 in FIG 0 or earth signal arises. The delay time between closing switch 30a and the occurrence of The output pulse on line 810 is indicated in FIG. 7 by a line 811.

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The circuit arrangement described above carries out coin accumulation and enables the accumulation of credit pulses with the help of a simple counting circuit, which controls a bonus pulse circuit in order for a predetermined count of a coin receipt counter to generate a bonus pulse. It is possible to generate a bonus pulse based on a count value other than five, for example for three, seven, nine or any even number chosen.

The description of the invention related to coins; of course, the arrangement can also be used of banknotes, non-legal credit units such as metal or plastic chips, paper, perforated or magnetic encoded data o. The like. Be interpreted. All of these possibilities are in the claims below summarized under the term "credit units".

In summary, the invention relates to an arrangement for Money acceptance and credit accumulation without the need to reset a memory circuit o. The like. Is able to continuously accept coins or the like. The generated credit and credit bonus impulses are stored until a sampling signal transmits them to an up-down counter. This is Given the opportunity to set up a number of cash acceptance and voting boxes at remote locations, so that every single money acceptance box can accept money and credits as well as bonus credits independently of the others can save. The number of credits accumulated for each coin or note or the like depends on its monetary value dependent, and the number of bonus credits added by the circuit is determined by the total amount of the

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23U729

money deposited. The Bonuslcredite are automatically entered into an up-down counter which is part cet Kreditakkumulatorschaltung. The entire credit accumulator circuit is designed so that it can be accommodated as an integrated circuit on a single mono-1itic chip.

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BATH ORIGINAL

Claims (5)

23U729 claims 1. Arrangement for accepting credit units and for credit accumulation, characterized by a credit unit input coding circuit (11) to accept a number of credit units of different denominations and to generate output pulses as a function of value of such units, the output pulses being a value corresponding to the value of each different credit unit Possess characteristic; a base price selection decoding circuit (12) to accept the output pulses of the credit unit input coding circuit (11) and to their decoding in units of the basic option price; one associated with a credit accumulator circuit (14) Circuit for credit registration and for deleting credits used up during a selection process; a bonus amount control circuit (13, 15, 16) which in response to the output pulses of the credit unit input encoding circuit (11) generates one or more bonus pulse (s) which are sent to the credit accumulator circuit (14) are emitted when the number of these output pulses reaches a predetermined number; and by immediately repeating the operation of generating output pulses on the part of the credit unit input coding circuit (11) depending on the value of the inserted credit units. 40981 1/0984 - -3-2 - 2. Arrangement according to claim 1, characterized in that the credit unit input coding circuit (11) has a multistage counter (77, 78, 79, 80, 81) with a logical coding network two input (72, 73, 74, 75, 76), and that the input of a given credit unit has at least one clock output pulse at an output AND gate (84) which is output to basic price selection allocation circuits (114, 115, 116), so that further output pulses from the credit unit input coding circuit (11) correspond to a value which is a multiple of the opposite. level credit unit. 3. Arrangement according to claim 2, characterized in that the basic price selection allocation circuits (114, 115, 116) as preselected referrers are connected to the basic price a choice, and that an assigner a manually operable switching device (138) for setting the number of pulses from the credit unit input encoder (11) which are used to generate a single output signal of the Basic price selection circuit is required, ^ possesses. 4. Arrangement according to claim 1, characterized in that that for the credit accumulator circuit a multi-stage up-down counter (132) heard. 5. Arrangement according to at least one of claims 1-4, characterized in that the bonus amount counting circuit (15) is composed of a counter and a decoder (152) for each of the different bonus levels, which correspond to a preprogrammed bonus level, a separate output (120, 121, 122, 123) that each of these outputs for connection to the credit accumulator (126) is arranged to transmit bonus credit pulses to this, and that the counting circuit (132) 409811/0984 is set up to accept bonus elections and to cancel credit after the elections have been carried out. 40981 1 / 098A Blank page