DE2142584A1 - Code scanning system - Google Patents

Description

PATENT LAWYERS ^ "

DR. PHIL. G. NICKEL · DR.-ING. J. DORNER

8 MUNICH 15

LANDWEHRSTR. 35 POST BOX 104

TEL. (0811) 555719

Munich, August 20, 1997I Lawyer file: 27 - Pat. 13

Raytheon Company, 141 Spring Street, Lexington, Ma. 02173, United States of America

Code scanning system ■

The invention relates to devices for scanning, storage, Control and evaluation of the data that are written on digitally coded cards, for example on credit cards, ID cards and aircraft boarding passes or the like, where in an arithmetic unit can optionally be used for the relevant system.

In known card readers, clock signals generated in the device are used, which results in additional circuit complexity and additional costs and a versatility of the device is lost, since the so-keeping cannot be adjusted to variable clock speeds. Known card readers can therefore only accept encoded written cards at a certain speed and for this reason the cards either have to be drawn mechanically through the card reader or have to be held in a certain position during the reading so that inserting or carrying out the cards to be read by hand is ruled out is.

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The motor drive for the card transport makes it necessary, that for example in the application of scanning boarding passes the passenger has to insert the boarding pass into a slot, “has to wait until the boarding pass is read and then the_card must be taken from the other end of the device.

In addition, the problem arises in known devices that optical card readers are not readily sufficient Amounts of diffuse light can be provided. Finally, in known devices of this type, the Difficulty getting data from a shift register to a central arithmetic and logic unit or to a data memory at a speed have to be transferred, which differs from the Einspeicherungsgesoh Speed in the shift register, so far one has use buffer registers or the like to solve this problem, but which made the circuit more complicated and expensive.

The object of the invention is to be achieved, a code scanning system to train so that the reading device with a simple and cost-saving circuit structure of a special kind. and manner of movement of a code tag carrier to be scanned, is independent.

The basic idea of the solution is seen in the fact that the scanning of the code mark carrier can be carried out by means of the reading device with changing reading speed. , _:

According to a preferred embodiment, the code mark carrier has the form of a card provided with code marks which carries both time code marks and also data code marks. _: .

Because the card, which is formed, for example, from a boarding pass can be carried out by hand using the reading device hi.-n, is, a drive motor and drive rollers and thus additional sources of interference are omitted, so that the device is reliable

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ger works. Also the speed of passage of the passengers increased past the boarding pass reader in that the passengers pass their boarding pass through the reading device in about two seconds and not about fifteen seconds at a time have to wait, as is necessary with motorized readers.

In a code scanning system designed in the manner according to the invention For example, crumpled or folded boarding passes can also be read after they have been unfolded or smoothed and then passed through the reading device.

Sufficient diffuse illumination of the card to be scanned is provided by edge lighting by means of a transparent one Block of transmitted light is achieved, which is then reflected by a card to be scanned and from there only on the sensitive The receiving surfaces of two phototransistors falls. Daduroh, that both time code marks and data code marks on one and the same card are provided, the data can be changed with more variable Speed can be sampled, such as, for example occur when passengers manually run their boarding pass through the facility.

After that, the data code marks and the time code marks of one and the same marking element on the one to be scanned Map can be formed, changes in the time signal speed or clock speed also cause corresponding Changes in the data rate, so that the synchronism never gets lost.

Optical card readers are primarily mentioned here, but it goes without saying that the proposed solution can be applied in the same way to card readers for magnetic cards or punch cards or can be used for cards with a stamped code.

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The evaluation of the data read in the manner according to the invention is particularly facilitated by the fact that the read data is stored in a shift register at one clock speed and from there at another, in particular faster Clock speed can be read out without data being lost.

It should be mentioned that in addition to the conveyors to move past of the code mark carrier on the reading device in the scanning system according to the invention is also located in the device Time signal generator or clock generator can be omitted and the synchronism is maintained regardless of the speed, with which data is entered into the system or withdrawn from the system.

The simultaneous presentation of both data code marks and also of time code marks on an optical scanning head, in particular with one improved in the manner indicated above Lighting system causes trouble-free operation, whereby the synchronization is improved by an improved synchronization circuit for an optical card reader, so that misalignment or misprinting of the data or timing pulses does not affect the operation of the device.

If the code scanning system according to the invention is used in conjunction with If a central arithmetic unit is used, the information read from the cards can be fed to and stored there Information is transmitted to a visual display and to various other evaluation devices, for example to turnstiles or other facilities, such as at an airfield.

In addition, form expedient embodiments of the invention Code scanning system is the subject of the appended claims. Embodiments of the invention are referred to below explained on the accompanying drawings. They represent:

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Figure 1 is a block diagram of a card scanning system and a data transmission system with the features of the invention,

Figure 2 is a block diagram of an embodiment of a card reader of the invention,

Figure 5 shows a series of waveforms for descriptive purposes

of the various signals as they appear at certain points in the embodiment according to FIG be generated,

Sectional views of a scanning head for a card reader according to the invention, FIG 4 shows a section corresponding to section line 4-4 shown in FIG. 5,

FIG. 6 shows a circuit diagram of a card reader according to the invention and

FIG. 7 is a logic circuit diagram of a holding component shown in FIG.

characters
4 and 5

In Figure 1, a code scanning system according to the invention is in form a card reader system is shown. A card reader 10, which is described in more detail below in connection with the drawing figures 2 to 7 is explained, is used for "optical = scanning one with encoded data described card, which can be used in the card reader and formed, for example, from a boarding pass as it is currently in use by airlines, albeit without coding. The card reader can read the card scan regardless of the speed at which the card is manually passed through the card reader, since the code marks on the card are both data code marks and Time code marks are included, thereby ensuring the synchronism of clock pulse trains and data pulse trains ensured regardless of the clock speed or data rate is.

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The information does not have to be stored in an arithmetic unit the output of the card reader can simply be used to generate certain control signals, for example, to open a turnstile for a gate lock when the passengers pass their encoded and written boarding pass through the card reader to lead. Of course, the code used will be changed from day to day so that, if necessary, it will be forgery not possible.

Is in the embodiment of Figure i by means of the card reader If the coded information located on the card is read at a first location A, this information becomes the card or the boarding pass is fed to a central arithmetic unit 12 for storage. In the same way, a card reader 14 scans one second location B, which can be formed by a further gate barrier, the coded information from another Card or another boarding pass and then delivers it Information also to the central arithmetic unit 12. Of course Any number of such card readers can be provided.

While the system described is an optical card reading system, it will be understood that magnetic scanners are used in Connection with magnetic code mark carriers, scanning devices for punched code marks in connection with corresponding code mark carriers and punch card scanning devices in connection with punch cards each can be equipped with the features of the invention. In the code scanning systems just mentioned In any case, the synchronization problem can be solved according to the invention in detail by the fact that the clock information in direct assignment and the same coding as the data information is applied to the card in question and the scanning device responds to this coding manner.

At the locations A and B are display means 16 and Ib for alphanumeric Display provided which card readers 10 resp.

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are assigned and are used to encode the items presented on the cards Information as well as various other data for display to bring, which are stored in the arithmetic unit 12, for example flight number, destination, free seats, etc. The display means and the logic adaptation circuit 20 and has been suggested elsewhere. A card printer or telex 24 is fed from the arithmetic unit 12, when printed information is desired, for example the printing of tickets for air passengers.

A code scanning system for encoded is now based on FIG described cards according to the invention. The encoded area of cards, for example that shown in FIG Art moved past photodetectors 62 and 64, the light is either reflected from the relatively bright background or is not reflected by the code marks, so that the photodetectors 62 and 64 either generate signals or not generated, wherein the photodetectors can be formed by phototransistors or photodiodes. Since according to a Embodiment of the invention the data coding in the form of a Lengthening of the clock code marks causes a change in the speed of insertion or bypassing of the card on the scanning device merely changes the clock speed, so that the data channel 58 and the time pulse channel or clock channel 60 remains synchronous despite the changes in clock speed.

The waveform or curve a according to FIG. 3 illustrates the clock pulses which are generated in that the clock code marks migrate past the photodetector 62, as can be seen from FIG. The data code marks which particular at connect time-code marks, generate pulses, which are shown at c in Figure 3 and Figure Yes occur simultaneously in accordance with deh corresponding clock pulses. Since no separate clock pulse generation is provided in the device because of the self-synchronization present in the system, the clock pulses that can be taken from the output of the photodetector 62 are stored in the clock pulse

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channel 60 by means of a preamplifier 66 of sioh known construction amplified while the data pulses that are in the data channel are removable from the output of the photodetector 64 by means of the preamplifier 68 can also be reinforced of a known type.

Simultaneously with the downward pulse ridge of the clock pulses generates a delay circuit 70 which the amplified clock pulses from the preamplifier 66 are supplied, each delayed pulse of approximately fifty microseconds Duration - as shown by curve 3b. The delay Circuit 70 can practically contain a monostable multivibrator of a type known per se.

A hold circuit 72, which is practically an astable multivibrator may contain known type, is of the pulse front of the amplified data pulses from the preamplifier 68 accordingly the waveform 3c triggered or set so that a A condition corresponding to a logical ONE is generated when data is present and a condition corresponding to a logical one NULL occurs when there is no data and the Holding circle 72 is not set, as can be seen from Figure 3d can.

The data output of the Ilaltekreises 72 is via a switch 76 fed to the series input of a shift register 78 in a controlled manner, which in the present embodiment has thirty-two digits around the thirty-two clock symbols or to be able to receive bits which are generated by thirty-two code marks on the code mark carrier or the card. The shift register acts as a buffer to prevent the transmission of data which is received by the shift register different speeds towards a Hechenwez'k 80 allow, with a different and preferably significantly higher clock speed is effective, which will be discussed in more detail below.

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In the clock pulse channel 60, the output of the delay circuit 70 is the clock pulse input of the shift register 78 via a Switch 74 fed to which a logic circuit, for example contains dual NAND gate switching elements and is used to the clock for the passage of the data symbols from the data channel through the shift register. The pulse front of the pulse from the output of the delay circuit (see curve 3b) causes data to advance in the shift register during the Impulse backward of the same impulse the IXaltkreis 72 in the logical Resets the state according to a ZERO.

The waveforms 3a and 3c symbolize clock pulse sequences and data pulse trains in ideal form. In practice, the clock pulses to lead or lag somewhat compared to the data pulses or to be wider or narrower than the data pulses. Data, how they can practically appear in a code scanning system, are shown approximately in Figure 3e. The irregularities of the data pulses can have various causes, including Differences in the sensitivity of the photodetectors 62 and 64 and variations in the quality of the printed code marks on the code label carrier to name siid so that it becomes a Misalignment of the time or clock encoding and the data encoding can come, which has clock pulses as a result of which a Feiterrückrück in shift register 78 between the occurrences triggered by data pulses, which would result in a loss of data symbols or data bits. That danger is however avoided by the delay circuit 70 and the hold circuit 72.

The first data pulse -d ejr curve 3e corresponds to the case where a data pulse occurs before a clock pulse. Without the holding effect, the pulse front of the pulses from curve 3b would occur after the first pulse of pulse train 3e has already passed, so that a sampling error would enter the shift register. The ideal hold output shown by curve 3d becomes duroh

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the pulse forehead of the data pulses triggered and then remains triggered, even if the data pulse disappears or a logic ZERO occurs, so that the state corresponds to a logic ONE remains until the data pulse is entered into the shift register and the duration of the data pulse is lengthened to such an extent that that this pulse coincides with a corresponding clock pulse, as can finally be seen from FIG. 3f. Of the The case in which a clock pulse occurs before a data pulse is shown in curve 3e at 2. The one in the pulse train 3e Pulse 2 shown represents the hold circuit einwctei the pulse forehead of the delayed pulse allows the output of the hold circuit to move further into the shift register, while the pulse move of the The output of the pulse delay circuit resets the Ilaltekreis.

In the case in which the data pulse is narrower than the clock pulse, which is shown in the pulse train 3e at 3, data is lost before the clock pulse arrives, so that the same difficulties would arise here as in the case of the pulse 1 of FIG Pulse sequence 3e, namely when the data pulse occurs before the occurrence of the clock pulse and here the hold circuit 72 also intervenes in the same way to correct it. If the data pulse is wider than the clock pulse, which is indicated in the pulse sequence 3e at k , the same difficulties arise as in the case of pulse 2 from the pulse sequence 3e, namely when the clock pulse arrives before the data pulse and the correction is made accordingly in reached in the same way as in the case of the pulse 2 of the pulse train 3e.

As already mentioned, the clock speed is variable, since it is a function of the speed with which the code marks on the code mark carrier or the card in the card reader are moved past the photodetector 62 and scanned. This variable clock speed forms an input for the switch 7 k, while the other input is the clock speed of the arithmetic unit tiO , which of course is from

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is formed at the rate at which the data are entered into the memory of the arithmetic unit. If all thirty-two clock symbols or clock bits have entered all the associated data into the shift register 78 via the switch 76, the switch Ik causes the shift register to be switched from the clock input from the clock pulse channel 60 to the clock input from the Iiechenwerk and the data contained in the shift register are then transferred to the arithmetic unit 80 is entered at a second speed, which is that which is used in the arithmetic unit.

If, for whatever reason, the arithmetic unit 80 cannot accept any data from the shift register 78, a re-feeding loop is provided for this case, which leads from the output of the shift register 78 via the switch 76 back to the shift register 78. Therefore, data from data channel 58 cannot be input into shift register 78 while data in the shift register is circulating. If the arithmetic logic unit BO is then ready to receive the circulating data, the data are cyclically passed through the shift register 78 by means of the switches Ik and 76 and can again pass from the data channel into the shift register 78 in order either to be fed to the arithmetic unit 80 or again to perform a data cycle. Time pulses or clock pulses at two different speeds from different pulse sources are used to operate one and the same shift register.

A self-checking property of the circuit is established by means of the Counter 82 reaches which has thirty-two digits and counts the clock pulses leaving the delay circuit 70. If a card is withdrawn or not completely passed through the card reader, the code marks will not be changed accordingly all thirty-two clock pulses and the associated data are sampled or, if a counterfeit card is presented are not all of the thirty-two clock pulse code marks so that in these cases the counter 62 prevents "

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that D & th would be transferred to shift register 78 via switch 76 and a false data output would be generated. But if the count is correct, the counter 82 causes the switch lh to pass. and a resetting of the shift register 78. Via a connection to the arithmetic unit 80, any counter reading can of course be input to the counter 82 depending on the intended purpose. Another control circuit can also be used instead of a pulse counter. In any case, the output of the arithmetic unit is used to feed an evaluation device 8h , which can be formed by a data display device or a ticket printer or other peripheral devices.

It is also possible to set the switch 1h independently of the control of the counter 82 so that it lets through the clock pulses of the clock pulse channel 60 once and on the other hand brings the clock pulses of the arithmetic unit 80 into effect when it is reset. In the same way, the switch 76 can be made independent of the control by the counter 82 and, when set, allow the data from the data channel 58 to pass until the arithmetic unit 80 is reset to cause the data in the shift register 78 to circulate. It should be noted here that switches 1h and 76 are NAND gates. Details of the operation of a single shift register with clock pulses from two different pulse sources are given in more detail elsewhere.

In the figures, h and 5, a scanning head of an inventive code scanning system is shown. A part 30 to be scanned, preferably a card with printed code marks 37, which can practically be formed from black ink or printing ink or from a non-reflective substance, is passed in front of two photodetectors 62 and Gk , which are used for scanning clock code marks or data marks. Code marks serve. The card consists practically of paper which is light-reflecting in such a way that the photodetectors 62 and 64 reflect from the card 30.

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Pick up flexed light, but not light from those areas the card received on which are not reflective Code marks 32 are located. The arrangement of the photodetectors 62 and 64 with reference to the code marks 32 can be through a cutout 34 recognize the map 30 for purposes of illustration. Will be a Card inserted into the card reader for scanning, so it is supported vertically so that the code marks are always facing the photodetectors at the same height. The coding is in the illustrated manner is preferably printed along the lower edge of the card and the card can be on a bar stand up to hold the card at the same height, for example when you are using it by hand at airfields Boarding pass reader.

FIG. 4 corresponds to a section along that indicated in FIG Section plane 4-4 and the bar 36 forms the lower part an opposing wall 38 which serves to support the to be scanned Keep the card vertical and the code marks aligned with the photodetectors 62 and 64, with the clock code marks with respect to the photodetector 62 and the data code marks with respect to the photodetector 64 are aligned.

The scanning head 40 of the illustrated embodiment can be made from a block of transparent or translucent material opaque or black outer layer 42, creating a side lighting effect or a light guiding effect is achieved when light from a light source 44, for example a normal lamp, diffuses through the transparent Block 40 is directed from where the light only does not area 46 provided with an outer layer, which also surrounds the openings of the photodetectors 62 and 64. The photodetectors can scan the optically effective code marks, since the individual photodetector elements, which for example can contain a phototransistor, also with opaque Covers 48 and 49 are provided so that no light transmitted through the transparent block 40 onto the photo

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Detectors can fall, but only light reaches the photodetectors from the transparent blook 40 over the uncoated Area 46 has emerged, has reached card 30 and from this to the photo-input recording surfaces 51.bzw. 52 of the photodetectors 62 or 64 is reflected and thereby can be scanned. The diffusely reflected light thus enables coding inscriptions on the card to be scanned low contrast ". Optical fiber light transmission systems can Of course, they can be used for scanning stamped code marks and magnetic scanning heads for magnetically effective code marks. For an optical scanning system, however, is the one described Form of lighting with side light is particularly useful because it is reliable, uniform and improved Mode of action adjusts. If necessary, the block 4ü can also be made of flexible material.

The light source 44 is also provided with an opaque cap 53 in order to keep all light within the transparent block 40. Connections ^ h and 55 are connected to the positive and negative terminals of a battery 56, respectively. As already mentioned, the code marks 32 printed on the card 30 are used to generate the clock frequency, which is variable depending on the speed at which the card is pushed past the photo detectors 62 and 64 by the card reader and the distance between the code marks 32 is so that a variable clock frequency can be produced without provided clock pulse generating circuits in the device, since the lower parts 57 of the code marks 32 provide the data input for the card reader. Since the code marks block the reflection of the light towards the photodetectors, it can be seen from FIG lower parts 57 of the code marks 32 wanders past. From the above it can be seen that no circuits for the synchro ^

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nization of the clock pulses and the data pulses are required and that automatic synchronization is achieved through the special arrangement of the code marks for the talk pulses and the data pulses, since regardless of the possible change in the clock speed when the card is passed through the card reader, the data rate exactly corresponding to the clock speed is changed after the clock pulse mark and the data pulse mark printed on the card each form different parts of one and the same code marks. The outputs of the photodetectors 62 and 6k are fed to the clock pulse channel and the data pulse channel, respectively, as was mentioned in connection with FIG.

Figure 6 of the drawings is now considered in more detail. Here is a circuit diagram of a card reader system according to the invention is shown, , at which parallel outputs of the shift register 78 are used can be to form a simple code, which when compared with a default condition in a code comparator or when operating a group of normal mechanical switches, for example when used at a gate Can initiate actuation of a turnstile or a barrier, through which passengers must go before boarding an aircraft.

Time information and data information are shared by one with encoded data provided card is scanned by means of the phototransistors 100 and 102, wherein. Clock pulses over a line 108 to a two-stage clock pulse preamplifier, generally designated 104t, while the data pulses via a line 110 to a similar one, generally designated 106, two-stage data pulse preamplifier. The preamplifiers 104 and 106 are two-stage field effect transistor preamplifiers, which have a high input impedance in the generally in excess of five megohms and a gain of about one hundred.

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The clock pulses ^ which occur on line 108 are through a filter capacitor 114 and a bias circuit out, which the resistors 112 and 126, which are fed by a sixteen volt line 128 from, as well as resistor 116 and potentiometer 118 grounded at 120 contains, so that the clock pulses finally reach the terminal 122 of the field effect transistor 124, which is the first stage of the preamplifier 104 represents. The transistor 127 forms the second stage of the preamplifier. The source or cathode connection of the field effect transistor 124 is by means of the resistor 130 biased and the drain terminal or anode terminal 132 is grounded. The output of the cathode connector 134 of the field effect transistor 124 is via a bias and Filter circuit including capacitor 136 and resistors 138 and 140 coupled to the base of transistor 127, which is biased by means of the resistor 142. A filtering by means of the capacitor 144 is also carried out at the output performed.

The data pulses on line 110 are sent to the control terminal of a field effect transistor 152 via a distortion filter capacitor 146 and a bias circuit from FIGS Resistors 148 and 150, with the source terminal or the cathode connection of the field effect transistor 152 via the resistor 154 is biased and the anode terminal is grounded. The output of the field effect transistor 152 is in a filter circuit which includes capacitor 156 and resistors 158 and 160 and is then applied to the base of the transistor I62, which is the second stage of the data pulse preamplifier 106 represents. Resistor 164 is used to bias the collector of transistor 162 while the emitter is grounded via resistor I66. A filter switch with the resistor I66 and the capacitor 172 causes an additional Filtering the output signals of the transistor 162, while a further filter circuit with the resistor 174 and the Capacitor I76 an additional filtering of the output of the

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Transistors 127 of the clock pulse amplifier.

The amplified clock pulses are fed to two inverters 180 "and 182 over a line 178 to the forehead and back of the Form clock pulses sharper before a coupling to the pulse delay circuit 70 takes place. In a corresponding way the amplified data pulses are fed via a line 184 to the inverters 186 and 188 before they are transferred to the hold circuit 72 are fed. For example, inverters 180, 182, 186, and 188 may be common components such as by Texas Instruments under the component number SN 7404 on the market.

Sharp clock pulses are fed into the pulse delay circuit via line 190 70 introduced the three monostable multivibrators 192, 193 and 194, for example as Common components can be obtained from Texas Instruments under the number SN 74121 and the components shown in FIG. 3b Generate shown waveform, which via line 196 to Shift register 78 and via line 198 to the thirty-two digit Counter 82 arrives. The output of the multivibrator 194 enables the resetting of the via a line 200 Ilaltekreises 72, which in the present embodiment a Half of a dual JK flip-flop 202, the other Forms half of the counter 82 and which is available, for example, as a commercially available component from Texas Instruments under the number SN 7473 «,

The sharp data pulses are transmitted through the inverters after they have passed through 186 and Ies8 of the flip-flop circuit 202, which is together with component 206, which has a four-digit number, such as one available from Texas Instruments under the number 7493 Component that generates the desired count. NAND gate switching elements 208 and 210, for example Texas Instruments components SN 7400 and SN 7430, are connected so that the gate

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switching element 210 generates an output pulse on line 212, which, for example, lights up an indicator lamp, if an incorrect count is available. The counter is activated on lines 214 upon completion of a correct count and 216 reset, which reset signal may be derived from a counter or other device.

After passing through the hold circuit, the data pulses are fed to the shift register 78 via the line 220, a curve corresponding to FIG. 234, 236 and 2Jb of the shift register 78 a normalized five VoIt bias is applied. The last-mentioned trigger circuits can again be obtained from Texas Instruments under the component number SN 7 ^ 95.

The content of the shift register 78 can be transmitted via a line 240 be transmitted in series to an arithmetic unit or else, as indicated by arrows in FIG. 6, parallel to a code comparator per se known design to be performed here to the code present in the register with a predetermined code, for example to operate a turnstile or a lock. But it is also possible to use the parallel outputs connect to a number of normal mechanical switches, in order to control any evaluation device or utility device.

The voltages for the preamplifiers and the logical signal voltages are from a common one, labeled 250 Voltage source derived. A transformer 252 is on AC voltage is connected and its output is rectified via a full wave rectifier 254. Resistors 25b, 258 and 260 as well as capacitors 262 and 264 cause harmonic distortion filtering, before the voltage is fed to a regulator 266, for example in the form of a from Instruments available under the number IM 209. An additional

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before filtering is achieved by means of capacitors 268 and 270. The above-mentioned standardized components are all commercially available without difficulty and with regard to their properties bevel in manuals.

Referring to Figure 7, there is a logic circuit generally designated 280 shown, which the clock-wise storage of data in a shift register, for example the shift register 78 with a first clock speed and then the reading out of the shift register with a second, different therefrom Clock speed for storage in another shift register allows, as indicated or in an arithmetic logic unit, for example the arithmetic unit tiO.

The clock pulses 1 and 2, which each have a different repetition frequency are in a first NAND gate support member 284 or a second NAND gate gate 282 is input. The outputs of gate gates 284 and 282 become the inputs a third NAND gate switching element 286, the output of which is used to switch from the first to the second clock speed serves the other as soon as a control signal is received Input of the NAND gate switch 282 after inversion in the inverter 290 and the other input of the NAND gate switch is fed. The clock pulses 1 according to FIG. 7 can therefore have the clock speed of the clock pulse channel 60 according to FIG and the clock pulses 2 according to FIG. 7 can increase the speed with which the data are to be entered into the arithmetic unit 80.

Within the scope of the invention, the person skilled in the art offers a number of options for modification and further training of the described Systems. For example, by adding additional hold circuits and shift registers, multiple data tracks can be used at the same time are scanned. The surface opposite the scanning head can also be pressed or recessed in such a way that the accumulation of particles due to the scanning or introduction

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ler cards are avoided as the background is essentially should have the same reflective properties as a card. Furthermore, a larger amount of diffuse light can be in the lighting device can be achieved in that on the transparent block under the opaque coating a white or reflective layer is applied.

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Claims (23)

Claims 1. Code scanning system with a code emark carrier and one of these scanning reading device, characterized in that scanning can be carried out with changing reading speed, 2. Scanning system according to claim 1, characterized in that the code mark carrier (30) is in the form of one provided with code marks Card has. 3. Scanning system according to claim 1 or 2, characterized in that that the code mark carrier (30) both time code marks (32) as also carries data code marks (57). k. Scanning system according to Claim 3, characterized in that the time code marks (32) and the data code marks (57) on the code mark carrier are directly assigned to one another in a corresponding manner. 5. Scanning system according to claim 4, characterized in that the time and data code marks (32, 57) on the code mark carrier (30) contain marking elements, each of which is a part of the time code marks and another part of the data Belong to code brands. 6. Scanning system according to one of claims 3 to 5, characterized in that the reading device (kO, kk, 62, 6k) has devices for independent and simultaneous scanning of the time code marks (32) and the data code marks (57). Q Λ 209811/1182 2U2584 7. A scanning system according to claim 3 for use as a board pass or ticket reading system, characterized in that the reading device Photo detectors (62, 64) for scanning the time code marks and the code mark carrier carrying the data code marks (30), which can be guided past the photo detectors by hand, and evaluation devices (12, 16 or ÖO) which on address the read code marks. 8. Scanning system according to claim 7, characterized in that the evaluation devices contain an arithmetic unit (12 or bü) or consist of this. 9. Scanning system according to one of claims 1 to 8, characterized in that the data corresponding to the data code marks, which can be derived from the code mark carrier (30) independently of its movement speed relative to the reading device (10), in a first memory (7b ) are writable and that a transmission circuit {lk, 76, «2) is provided for transferring the stored data from the first memory to a further memory (80). 10. Scanning system according to claim 9, characterized in that Playback devices (l6) for displaying or displaying the in the further memory (bO) stored data are provided. 11. Scanning system according to claim 9 or 10, characterized in that switching devices (76) for transmitting the from the code mark carrier (30) read data into the first-mentioned memory (78) at a first speed and further switching means (74) to transfer the stored data from the first Stores in the second store (80) at a second rate are provided. - 22 - 209811/1182 12. Scanning system according to claim 11, characterized in that the second speed is greater than the first-mentioned speed is. 13. Scanning system according to claim 11 or 12, characterized in that that the first memory is a shift register (78), while the second memory contains the memory of a digital arithmetic unit (80). 14. Scanning system according to claim 6 and one of claims 1 to 5 or 7 to 15, characterized in that the devices for independent and simultaneous scanning of the time code marks or a first and a second of the data code marks Photo detector (62, 64) included, the first of which is photo detector (62) is responsive to the time code marks and the second photodetector (64) is responsive to the data code marks. 15. Scanning system according to claim 14, characterized in that Changes in the data sampling rate and the timing pulse sampling rate occur the same and in the same direction, so that the synchronism between the signals according to the time coding and the data coding is retained regardless of the scanning speed. 16. Scanning system according to claim 13, characterized in that a recirculation circuit or feedback circuit for Generating a cycle of the data signals through the shift register (7ö) is provided and that the transition of the circulating data signals from the shift register to the memory of the arithmetic unit (bO) can be triggered by means of a control signal which is generated by a control device assigned to the arithmetic logic unit. 17. Scanning system according to one of claims 1 to 13, 15 or 16 and claim 14, characterized in that amplifiers (66, 6b) for amplification are connected to the outputs of the two photodetectors (62, 64) - 23 - 209811 / 1T82 the time pulses or the data pulses are connected, that the time pulses can be delayed in a delay circuit (70) are that, furthermore, the delayed time pulses can be synchronized with the data pulses (72-70) and that the data pulses by means of switching devices (76) at a certain speed, which is a function of the repetition speed of the delayed time pulses can be stored in a shift register or the shift register (78), the latter connected to an evaluation device or to the evaluation device (80) is. 18, data transmission equipment, in particular for code scanning systems according to one of claims 1 to 17, characterized by control means for inputting data into a shift register with a first speed and further control means for reading out the stored data from the shift register with a second Speed. 19 «code scanning system, in particular an optical card reader for scanning cards provided with optical code marks, characterized in that the reading device contains a block of transparent material (^ tO) with an opaque layer / which covers the surface of the block except for a certain area (46 ) covered that, furthermore, a light source generating sidelight {kh) is embedded in the block of transparent material, which absorbs diffuse light in the transparent material, which emerges through the uncovered area, that furthermore a pair of photodetectors in the block of transparent material gates (62, 6k), the photosensitive surfaces (51-52) of which lie in a plane perpendicular to the uncovered area and which are designed so that the diffuse light within the block of transparent material does not directly hit the photosensitive surfaces falls and that finally on the code label carrier (30 ) non-reflective code marks are applied in such a way that the diffuse - 2k - 209811/1182 Light from the block of transparent material is only reflected at the points of the code mark carrier that are not provided with code marks and acts on the photo detectors " 20 _o Scanning system according to Claim 19, characterized in that both time code marks (32) and data code marks (57) are arranged on the code mark carrier (30) and that one photodetector points to the time code marks and the other photodetector addresses the data code marks. 21. Scanning system according to claim 19 or 20, characterized in that that the time code marks and the data code marks by a and the same coding element on the code mark carrier (30) are formed, the time code marks being a part of all Coding elements and the data code marks form part of only certain coding elements which essentially define the shape have vertical stripes that point to the code mark carrier are printed and that the photodetectors for scanning the Time and data code marks are perpendicular to each other * 22 "Scanning system according to one of claims 19 Ms 21, characterized characterized in that the block of transparent material is transparent. 23. Scanning system according to one of claims 19 to 22, characterized characterized in that the code mark carrier (30) by hand vertically downwards into the card reader with the main plane perpendicular to the photodetectors (62, 64) can be inserted in such a way that the orientation of the card to be scanned is maintained. 209811/1182 ι
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