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DE19680526T1 - Temperaturausgeglichene Schaltung - Google Patents

Temperaturausgeglichene Schaltung

Info

Publication number
DE19680526T1
DE19680526T1 DE19680526T DE19680526T DE19680526T1 DE 19680526 T1 DE19680526 T1 DE 19680526T1 DE 19680526 T DE19680526 T DE 19680526T DE 19680526 T DE19680526 T DE 19680526T DE 19680526 T1 DE19680526 T1 DE 19680526T1
Authority
DE
Germany
Prior art keywords
balanced circuit
temperature balanced
temperature
circuit
balanced
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19680526T
Other languages
English (en)
Other versions
DE19680526C2 (de
Inventor
Takeo Miura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of DE19680526T1 publication Critical patent/DE19680526T1/de
Application granted granted Critical
Publication of DE19680526C2 publication Critical patent/DE19680526C2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/131—Digitally controlled
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K21/00—Details of pulse counters or frequency dividers
    • H03K21/08—Output circuits
    • H03K21/12—Output circuits with parallel read-out

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
  • Manipulation Of Pulses (AREA)
DE19680526T 1995-06-02 1996-05-31 Temperaturausgeglichene Schaltung Expired - Fee Related DE19680526C2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP13640795A JP3552176B2 (ja) 1995-06-02 1995-06-02 熱バランス回路
PCT/JP1996/001481 WO1996038911A1 (fr) 1995-06-02 1996-05-31 Circuit d'equilibrage thermique

Publications (2)

Publication Number Publication Date
DE19680526T1 true DE19680526T1 (de) 1997-07-31
DE19680526C2 DE19680526C2 (de) 1999-04-22

Family

ID=15174449

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19680526T Expired - Fee Related DE19680526C2 (de) 1995-06-02 1996-05-31 Temperaturausgeglichene Schaltung

Country Status (5)

Country Link
JP (1) JP3552176B2 (de)
KR (1) KR100211230B1 (de)
DE (1) DE19680526C2 (de)
TW (1) TW295630B (de)
WO (1) WO1996038911A1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6008686A (en) * 1997-06-24 1999-12-28 Advantest Corp. Power consumption control circuit for CMOS circuit
CN1602587B (zh) * 2001-11-12 2010-05-26 因芬尼昂技术股份公司 集成电路切换过程期间避免瞬变的方法及集成电路
US7085982B2 (en) 2002-01-18 2006-08-01 Hitachi, Ltd. Pulse generation circuit and semiconductor tester that uses the pulse generation circuit
US7558692B2 (en) 2004-09-27 2009-07-07 Advantest Corp. Consumption current balance circuit, compensation current amount adjusting method, timing generator, and semiconductor testing apparatus
JP2009130715A (ja) * 2007-11-26 2009-06-11 Toshiba Corp クロック生成回路
JP2009145126A (ja) * 2007-12-12 2009-07-02 Fujitsu Microelectronics Ltd 半導体集積回路及びその制御方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0306662A2 (de) * 1987-09-08 1989-03-15 Tektronix, Inc. Einrichtung zur Erzeugung von Signalen zur Zeitverschiebungskompensation
US5136180A (en) * 1991-02-12 1992-08-04 Vlsi Technology, Inc. Variable frequency clock for a computer system

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02296410A (ja) * 1989-05-11 1990-12-07 Mitsubishi Electric Corp 遅延回路

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0306662A2 (de) * 1987-09-08 1989-03-15 Tektronix, Inc. Einrichtung zur Erzeugung von Signalen zur Zeitverschiebungskompensation
US5136180A (en) * 1991-02-12 1992-08-04 Vlsi Technology, Inc. Variable frequency clock for a computer system

Also Published As

Publication number Publication date
KR970705232A (ko) 1997-09-06
JPH08330920A (ja) 1996-12-13
TW295630B (de) 1997-01-11
KR100211230B1 (ko) 1999-07-15
JP3552176B2 (ja) 2004-08-11
DE19680526C2 (de) 1999-04-22
WO1996038911A1 (fr) 1996-12-05

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee

Effective date: 20111201