It is an object of the invention to improve the second sampling method of two samplings. The essence of the improvement lies in that the digital quantity obtained by the first sampling is directly fed back in the second sampling process, and is not converted into the analog quantity for feedback, so that the defects of the three high-precision A/D converters are overcome.
The invention is called digital feedback type double sampling high precision analog-digital converter because the high bit number obtained by the first sampling is directly fed back in a digital method in the second sampling process. The two-time sampling of the digital feedback type two-time sampling high-precision analog-digital converter is realized by a double-integral A/D converter with general precision. Of course, any A/D converter may be used for the first sampling as long as it can obtain the high number of bits to be measured.
In the first sampling, the ramp-up time T of the double-integrating A/D converter1And a digital quantity N1Accordingly, the down-slope time T2hAnd a digital quantity H2hAnd accordingly. Ramp over on second sampleIn the course of measuring ExAccess time and digital mN1Corresponding to the reference voltage EsAccess time and digital mN2hAnd correspondingly. This may be done by a counter N1、N2hAnd m, in fact when the up-down counter N is present1And N2hAfter reducing to 0, the original value N is restored again1And N2hRepeated m times, but in each set number of beats, N2h≤N1. The repetition of the number m can also be realized by an up-down counter. In the second sampling down-ramping process, ExIs cut off, and the reference voltage for discharging can be reduced by n times to EsAnd/n. Thus, in the second sampling, the low-order number N is obtained2l。
Due to N1And N2hThe total number of the implantation is m times, and the reference voltage for the second sampling can be reduced to EsN, so that the present invention can obtain a counting capacity of mnN2h+N2l. The digital feedback type double sampling analog-digital converter only uses a double integral A/D converter with general precision and some logic parts, but can obtain high-precision A/D conversion. The invention has low requirement on analog devices and simple logic, so the invention is easy to be made into large-scale integrated circuits.
The circuit diagram of the digital feedback double-sampling high-precision analog-to-digital converter shown in fig. 1 is explained as follows:
during the ramp-up of the first sample, 1 (± E) is measuredx) The switch 6 is closed to connect an integrator consisting of an integrating resistor 11, an integrating capacitor 17 and an amplifier 18, the capacitor 17 is charged, and the charging time T is1 Programmable counter 30 may be clocked by control logic to count N1The latter subtraction count is implemented. When N is present1When decremented to 0, control logic 34, through switch control 29 and polarity detection and zero detection logic 28, switches 6 off and switches 7 on (when measured as-E)xWhen measured as + E) or close switch 8 (when measured as + E)xAt that time), the reference voltage is applied to discharge the capacitor 17, and the programmable counter 31 starts to count up from 0.
Once the charge in the capacitor 17 is discharged, the output of the zero detector 27 causes the polarity detection and zero detection logic 28 to operate, causing the programmable counter 31 to stop counting, and obtaining the count N2hThis corresponds to the down-ramp time T2h. N due to insufficient conversion accuracy of double-integral A/D2hReaction substantially only of ExThe high order number of (2). From the first sampling, the expression can be derived:
Exh=Es(T2h)/(T1) =Es(N2hτ1)/(N1τ1) = Es(N2h)/(N1) (1)
in the formula, Exh-a high value of the measured voltage;
Es-a reference voltage;
T1-ramp-up time;
T2h-down-slope time;
τ1-the clock period used for the first sampling;
N1,N2hthe counting pulses in the programmable counters 30 and 31, respectively.
After a rest time, the second sampling process is started. At this point, the programmable counter 30 places the number N1Number N is reserved in 312hThe number m is set in the programmable counter 32 to ramp up the time T1Repeat m times. During the upslope, the measured voltage 1 (assumed to be-E)x) M beats are connected through a switch 6, and the switch conduction time of each beat is T1. Meanwhile, reference voltage 2 (+ E)s) M beats are also switched in by the switch 7, but the switch conduction time in each beat is T2hTime T1And T2hIs a preset number N of pairs of programmable counters 30 and 311And N2hAnd performing subtraction counting. At this time, the output voltage of the integrator is:
<math><msub><mi>V </mi><mi>0</mi></msub><mi>= </mi><munderover><mi>Σ</mi><mi>j = 1</mi><mi>m</mi></munderover><mrow><mi>[</mi><mfrac><mrow><mi>1</mi></mrow><mrow><mi>C R</mi></mrow></mfrac><msubsup><mo>∫ </mo><mrow><msub><mi>( j - 1 ) T </mi><mi>1</mi></msub></mrow><mrow><msub><mi> j T </mi><mi>1</mi></msub></mrow></msubsup><mrow><msub><mi>E</mi><mi>X</mi></msub><mi>d t -</mi><mfrac><mrow><mi>1</mi></mrow><mrow><mi>CR</mi></mrow></mfrac><msubsup><mo>∫ </mo><mrow><msub><mi>( j - 1 ) T </mi><mi>1</mi></msub></mrow><mrow><msub><mi>( j - 1 ) T </mi><mi>1</mi></msub><mi>+ T </mi><msub><mi></mi><mi>2 h </mi></msub></mrow></msubsup><mrow><msub><mi>E </mi><mi>S</mi></msub><mi>d t</mi></mrow></mrow><mi>]</mi></mrow></math>
= (EX)/(CR) mT1- (ES)/(CR) mT2h(2)
when the ramp-up time reaches mT1Switch 6 is turned off, and switch 7 is turned off when next tempo variable counter 31 is decremented to 0. According to VoThe polarity detection logic 28 acts on the switch control 29 to turn on the switch 9 or 10 and switch in the corresponding reference voltage 4 (+ (Es)/(n)) or 5 (- (E)s) And/n), and the control logic 34 starts counting by the programmable counter 33 until the output of the zero detector 27 activates the zero detection logic 28 to stop counting by the counter 33. At this time, the output voltage V of the integrator0Is 0:
V′ o=Vo+ 1/(CR) <math><msubsup><mo>∫ </mo><mi>0</mi><mrow><msub><mi>T </mi><mi>2 L</mi></msub></mrow></msubsup></math> (- (Es)/(n) )dt
=Vo- (Es)/(ncR) T2L=0 (3)
is represented by the formula (3)
V0CR= (Es)/(n) T2l (4)
Is represented by the formula (2)
V0CR=mExT1-mEsT2h
Considering formula (1), the
V0CR=m〔ExT1-ExhT1〕=mT1〔Ex-Exh〕 (5)
As can be seen from equation (5), in m beats of the second sampling, the signal passes through mN2hThe digital feedback of the voltage to be measured is realized by the low value E of the voltage to be measuredxlI.e.:
(Ex-Exh)mT1=ExlmT1=VOCR (6)
is obtained by the two formulas (4) and (6)
Exl= (ES)/(mnT1) T2l (7)
The algebraic sum of the two sampling results is taken to obtain the measured voltage Ex:
Ex=Exh+Exl=Es(T2h)/(T1) +Es- (T2l)/(mnT1) (8)
In the second sampling, the clock period τ is ramped up1May be a down-ramping clock period tau2Q times of (1), so T1=N1τ1·T2h=N2h l·T2l=N2lτ2Or T2l=N2lτ1And/q, and equation (8) can be written as:
Ex=Exh+Exl= (ES)/(mnqN1) 〔mnqN2h+N2l〕 (9)
as shown in formula (9), pair ExThe first sampling can obtain high-order number N2h. In the second sampling, the digital quantity N is passed2hAnd the counting capacity can be expanded mnq times by reducing the reference voltage by n times and increasing the counting clock frequency by q times in the downward slope, thereby the conversion precision is remarkably improved without remarkably increasing the conversion time.
To increase the measurement speed, the first sampling can also be achieved by a low precision fast a/D35. The obtained digital quantity can also be used as N2hDigital feedback is performed in the second sampling.
In fig. 1, the logic circuit 34 can be a single chip, a single board, or a logic circuit composed of discrete components, the counting circuits 30, 31, 32, and 33 can be preset up-down counters, programmable counters, or count timing units in a single chip or a microcomputer, and the read-write memory 36 and the random access memory can also be included in the single chip or the single board microcomputer. Besides resistor and capacitor elements, most of analog circuits and logic circuits can be made into one or two large-scale integrated circuits.
Compared with the existing double-sampling A/D converter, the invention has the following advantages:
1. in the second sampling process of the two-time sampling, the digital feedback realized by a logic circuit is adopted, so that the precision is high and the cost is low;
2. on the basis of a common double-integration A/D converter, only a plurality of programmable counters and a single chip microcomputer or a microcomputer or other logic components are needed to be added, so that the integration level is high, and the volume is small;
3. the power consumption is low, and the reliability is high;
4. the parameters m, n and q are properly combined, the analog-digital conversion with various precisions and various speeds can be obtained on the same A/D converter, the use is flexible, and the application range is wide;
5. the function of the A/D converter can be greatly expanded by utilizing the combination of general precision double-integral A/D and low-precision quick A/D, so that the optimal compromise of measurement precision, measurement speed and cost is obtained;
6. and is easy to connect with a computer.