CN223141500U - A TBU circuit - Google Patents
A TBU circuitInfo
- Publication number
- CN223141500U CN223141500U CN202421913866.7U CN202421913866U CN223141500U CN 223141500 U CN223141500 U CN 223141500U CN 202421913866 U CN202421913866 U CN 202421913866U CN 223141500 U CN223141500 U CN 223141500U
- Authority
- CN
- China
- Prior art keywords
- channel
- channel depletion
- mosfet
- voltage
- type mosfet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
本实用新型公开一种TBU电路，包括N沟道耗尽型MOSFET或N沟道JFET、P沟道耗尽型MOSFET以及限流元件，N沟道耗尽型MOSFET或N沟道JFET的源极连接P沟道耗尽型MOSFET的源极，限流元件的一端连接N沟道耗尽型MOSFET或N沟道JFET的栅极，限流元件的另一端连接P沟道耗尽型MOSFET的漏极；N沟道耗尽型MOSFET或N沟道JFET的栅极和源极之间并联第一稳压支路，P沟道耗尽型MOSFET的源极和栅极之间并联第二稳压支路。本实用新型可以调整N沟道耗尽型MOSFET或N沟道JFET、P沟道耗尽型MOSFET上的电压比例，可以比较灵活的设计N沟道耗尽型MOSFET或N沟道JFET、P沟道耗尽型MOSFET的耐压值。
The utility model discloses a TBU circuit, comprising an N-channel depletion MOSFET or an N-channel JFET, a P-channel depletion MOSFET and a current limiting element, wherein the source of the N-channel depletion MOSFET or the N-channel JFET is connected to the source of the P-channel depletion MOSFET, one end of the current limiting element is connected to the gate of the N-channel depletion MOSFET or the N-channel JFET, and the other end of the current limiting element is connected to the drain of the P-channel depletion MOSFET; a first voltage stabilizing branch is connected in parallel between the gate and the source of the N-channel depletion MOSFET or the N-channel JFET, and a second voltage stabilizing branch is connected in parallel between the source and the gate of the P-channel depletion MOSFET. The utility model can adjust the voltage ratio on the N-channel depletion MOSFET or the N-channel JFET and the P-channel depletion MOSFET, and can flexibly design the withstand voltage value of the N-channel depletion MOSFET or the N-channel JFET and the P-channel depletion MOSFET.
Description
Technical Field
The utility model relates to the technical field of electronics, in particular to a TBU circuit.
Background
The abbreviation TBU TRANSIENT BLOCKING UNITS, transient blocking unit, otherwise known as transient surge current suppression, is a high-speed circuit protection device made of MOSFET (metal oxide semiconductor field effect transistor or junction field effect transistor) semiconductor technology. Can be simply understood as an upgrade of PTC (self-healing fuse). Often used in combination with electronic components such as TVS tubes and GDT tubes, protects sensitive electronic circuits from interference and damage caused by surge voltages and currents due to NEMP, LEMP, etc.
The application number 202321364732.X discloses a TBU circuit, which adopts a P-channel depletion type MOSFET, can block surge current and inhibit high-voltage pulse interference (without adding additional devices), and has the double protection functions of overcurrent and overvoltage.
After the current limiting element, the first voltage stabilizing element and the second voltage stabilizing element are selected, the voltage drop on the N-channel depletion type MOSFET, the N-channel JFET and the P-channel depletion type MOSFET is determined, and the voltage proportion on the N-channel depletion type MOSFET, the N-channel JFET and the P-channel depletion type MOSFET can not be adjusted any more, so that flexibility is lost when the voltage withstand values of the N-channel depletion type MOSFET, the N-channel JFET and the P-channel depletion type MOSFET are designed.
Disclosure of utility model
In order to overcome the defects, the utility model aims to provide a TBU circuit, which increases the voltage dividing resistance, can adjust the voltage proportion on an N-channel depletion type MOSFET or an N-channel JFET and a P-channel depletion type MOSFET, and can flexibly design the voltage withstand value of the N-channel depletion type MOSFET or the N-channel JFET and the P-channel depletion type MOSFET.
In order to achieve the above purpose, the technical scheme adopted by the utility model is as follows:
The TBU circuit comprises an N-channel depletion type MOSFET or an N-channel JFET, a P-channel depletion type MOSFET and a current limiting element, wherein the source electrode of the N-channel depletion type MOSFET or the N-channel JFET is connected with the source electrode of the P-channel depletion type MOSFET, one end of the current limiting element is connected with the grid electrode of the N-channel depletion type MOSFET or the N-channel JFET, and the other end of the current limiting element is connected with the drain electrode of the P-channel depletion type MOSFET;
A first voltage stabilizing branch is connected in parallel between the grid electrode and the source electrode of the N-channel depletion MOSFET or the N-channel JFET, and a second voltage stabilizing branch is connected in parallel between the source electrode and the grid electrode of the P-channel depletion MOSFET;
and the drain electrode of the N-channel depletion MOSFET or the N-channel JFET is connected with the gate electrode of the P-channel depletion MOSFET through a voltage dividing resistor.
Preferably, the first voltage stabilizing branch circuit and the second voltage stabilizing branch circuit comprise two voltage stabilizing diodes which are connected in reverse series.
Further preferably, anodes of two zener diodes in the first zener branch are connected to each other, wherein a cathode of one zener diode is connected to a gate of the N-channel depletion MOSFET or the N-channel JFET, and a cathode of the other zener diode is connected to a source of the N-channel depletion MOSFET or the N-channel JFET;
And anodes of two voltage stabilizing diodes in the second voltage stabilizing branch are connected with each other, wherein a cathode of one voltage stabilizing diode is connected with a grid electrode of the P-channel depletion type MOSFET, and a cathode of the other voltage stabilizing diode is connected with a source electrode of the P-channel depletion type MOSFET.
Preferably, the breakdown voltage of the zener diode in the first voltage stabilizing branch is greater than the threshold voltage of the N-channel depletion MOSFET or the N-channel JFET, and the breakdown voltage of the zener diode in the second voltage stabilizing branch is greater than the threshold voltage of the P-channel depletion MOSFET.
Preferably, the breakdown voltage of the zener diode is 10V.
Preferably, the current limiting element is a current limiting resistor, and the current limiting resistor is a polysilicon resistor or a well resistor.
Preferably, the withstand voltage of the P-channel depletion MOSFET is greater than the withstand voltage of the N-channel depletion MOSFET or the N-channel JFET.
Further preferably, the P-channel depletion MOSFET has a withstand voltage of not less than 400V.
Preferably, when in use, the TBU circuit is connected in series in the protected circuit through the drain electrode of the N-channel depletion MOSFET or the N-channel JFET and the drain electrode of the P-channel depletion MOSFET, the drain electrode of the N-channel depletion MOSFET or the N-channel JFET is a current inflow end, and the drain electrode of the P-channel depletion MOSFET is a current outflow end.
Further, the TBU circuit is integrally packaged into a two-terminal device, the drain electrode of the N-channel depletion MOSFET or the N-channel JFET is one end of the two-terminal device, and the drain electrode of the P-channel depletion MOSFET is the other end of the two-terminal device.
Compared with the application number 202321364732.X, the utility model has the following technical effects on the basis of having the double protection functions of inhibiting high-voltage pulse interference and over-current and over-voltage:
1. According to the utility model, a voltage dividing resistor is added between the drain electrode of the N-channel depletion MOSFET or the N-channel JFET and the grid electrode of the P-channel depletion MOSFET, and the voltage dividing of the current limiting element, the first voltage stabilizing branch, the second voltage stabilizing branch and the voltage dividing resistor can be adjusted by changing the resistance value of the voltage dividing resistor, so that the voltage proportions of the drain-source ends of the N-channel depletion MOSFET or the N-channel JFET and the drain-source ends of the P-channel depletion MOSFET are adjusted. Therefore, in element parameter design, the voltage withstand values of the N-channel depletion type MOSFET or the N-channel JFET and the P-channel depletion type MOSFET can be flexibly designed, for example, the N-channel depletion type MOSFET or the N-channel JFET can bear high voltage, the P-channel depletion type MOSFET can bear high voltage, and the module design is easier.
2. The utility model can adjust the trigger voltage of the module (namely TBU circuit) from the low-resistance on state to the off state by changing the resistance value of the voltage dividing resistor. For example, by increasing the resistance of the voltage dividing resistor, the trigger voltage of the module can be increased, so that malfunction of the module caused by slight fluctuation of an external signal can be reduced. And facilitates the rapid switching of the module from the off state to the on state.
3. The utility model can effectively adjust the power distribution relation among the internal elements of the module, is beneficial to balancing the voltage distribution of the N-channel depletion type MOSFET or the N-channel JFET and the P-channel depletion type MOSFET, and optimizes the design scheme so as to reduce the on-resistance of the circuit module, reduce the power loss and increase the stability and the reliability of the module.
4. According to the utility model, the two voltage stabilizing diodes which are connected in series in the opposite directions are added, so that when an overvoltage signal is input from the input end of the module, the P-channel depletion type MOSFET can rapidly respond, and the whole module is switched from a low-resistance on state to an off state.
Drawings
Fig. 1 is a schematic circuit diagram of embodiment 1.
Fig. 2 is a schematic circuit diagram of embodiment 2.
Detailed Description
The present utility model will be described in further detail with reference to the accompanying drawings, in order to make the objects, technical solutions and advantages of the present utility model more apparent.
Example 1
The embodiment discloses a TBU circuit, specifically as shown in FIG. 1, comprising an N-channel depletion MOSFET Q1, a P-channel depletion MOSFET Q2 and a current limiting element, wherein in the embodiment, the current limiting element is a current limiting resistor R1, the source electrode of the N-channel depletion MOSFET Q1 is connected with the source electrode of the P-channel depletion MOSFET Q2, one end of the current limiting resistor R1 is connected with the grid electrode of the N-channel depletion MOSFET Q1, and the other end of the current limiting resistor R1 is connected with the drain electrode of the P-channel depletion MOSFET Q2. A first voltage stabilizing branch is connected in parallel between the grid electrode and the source electrode of the N-channel depletion type MOSFET Q1, and a second voltage stabilizing branch is connected in parallel between the source electrode and the grid electrode of the P-channel depletion type MOSFET Q2. In this embodiment, the first voltage stabilizing branch includes a voltage stabilizing diode D1, an anode of the voltage stabilizing diode D1 is connected to a gate of the N-channel depletion MOSFET Q1, a cathode of the voltage stabilizing diode D1 is connected to a source of the N-channel depletion MOSFET Q1, the second voltage stabilizing branch includes a voltage stabilizing diode D3, an anode of the voltage stabilizing diode D3 is connected to a source of the P-channel depletion MOSFET Q2, and a cathode of the voltage stabilizing diode D3 is connected to a gate of the P-channel depletion MOSFET Q2. The drain of the N-channel depletion MOSFET Q1 is connected with the gate of the P-channel depletion MOSFET Q2 through a voltage dividing resistor R2.
The N-channel depletion MOSFET Q1 can be replaced by an N-channel JFET, the current-limiting resistor R1 is a polysilicon resistor or a well resistor, and the withstand voltage of the P-channel depletion MOSFET Q2 is larger than that of the N-channel depletion MOSFET Q1 or the N-channel JFET.
To meet the high voltage requirement, the voltage withstand of the P-channel depletion type MOSFETQ2 is not less than 400V.
When the embodiment is used, the drain electrode of the N-channel depletion MOSFET Q1 or the N-channel JFET and the drain electrode of the P-channel depletion MOSFET Q2 are connected in series in a protected circuit, the drain electrode of the N-channel depletion MOSFET Q1 or the N-channel JFET is a current inflow end, and the drain electrode of the P-channel depletion MOSFET Q2 is a current outflow end.
In this embodiment, the TBU circuit may be integrally packaged into a two-terminal device, where the drain of the N-channel depletion MOSFET Q1 or the N-channel JFET is one end of the two-terminal device, i.e., the module input end, and the drain of the P-channel depletion MOSFET Q2 is the other end of the two-terminal device, i.e., the module output end.
In this embodiment, on the basis of the application No. 202321364732.X, a voltage dividing resistor R2 is added, and the voltage dividing of the current limiting element R1, the zener diode D3, and the voltage dividing resistor R2 can be adjusted by changing the resistance of the voltage dividing resistor R2, so as to adjust the voltage ratio between the drain and the source of the N-channel depletion MOSFET Q1 or between the N-channel JFET and the P-channel depletion MOSFET Q2.
Example 2
As shown in fig. 2, this embodiment adds a zener diode D2 in anti-series with a zener diode D1 and a zener diode D4 in anti-series with a zener diode D3 on the basis of embodiment 1.
The zener diodes D1, D2, D3, and D4 may be designed by the same parameter process, and the breakdown voltage should exceed the threshold voltage value of Q1 or Q2, and it is generally recommended to design the breakdown voltage to be about 10V.
In this embodiment, the voltage ratio of the drain-source ends of the N-channel depletion MOSFET or the N-channel JFET Q1 and the drain-source ends of the P-channel depletion MOSFET Q2 can be adjusted by changing the resistance value of the voltage dividing resistor R2 to adjust the voltage dividing of the current limiting element R1, the zener diode D2, the zener diode D3, the zener diode D4, and the voltage dividing resistor R2.
The two voltage stabilizing diodes connected in series in the reverse direction are added in the embodiment, so that when an overvoltage signal is input from the input end of the module, the P-channel depletion type MOSFET Q2 can respond quickly, and the whole module is switched from a low-resistance on state to an off state.
Other portions of this embodiment are the same as those of embodiment 1, and thus are not described in detail.
In summary, after 2 zener diodes and the voltage dividing resistor R2 are added in this embodiment, the circuit function of the original 202321364732.X patent application circuit can still be implemented in this embodiment, and the voltage distribution between the internal components of the module can be balanced by changing the resistance value of R2, so that the voltage withstanding design values of the N-channel depletion MOSFET Q1 and the P-channel depletion MOSFET Q2 can be flexibly matched, and the power distribution relationship between the internal components of the module is optimized.
The embodiment can also adjust the triggering voltage of the module, reduce the misoperation of the module, enable the module to recover quickly, and enhance the stability and reliability of the module.
Of course, the present utility model is capable of other various embodiments and its several details are capable of modification and variation in light of the present utility model by one skilled in the art without departing from the spirit and scope of the utility model as defined in the appended claims.
Claims (10)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202421913866.7U CN223141500U (en) | 2024-08-08 | 2024-08-08 | A TBU circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202421913866.7U CN223141500U (en) | 2024-08-08 | 2024-08-08 | A TBU circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN223141500U true CN223141500U (en) | 2025-07-22 |
Family
ID=96417983
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202421913866.7U Active CN223141500U (en) | 2024-08-08 | 2024-08-08 | A TBU circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN223141500U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116683396A (en) * | 2023-05-31 | 2023-09-01 | 成都方舟微电子有限公司 | A TBU circuit |
-
2024
- 2024-08-08 CN CN202421913866.7U patent/CN223141500U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116683396A (en) * | 2023-05-31 | 2023-09-01 | 成都方舟微电子有限公司 | A TBU circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4533970A (en) | Series current limiter | |
| JP7662120B2 (en) | Ultra-low clamping voltage surge protection module using depletion mode MOSFETs | |
| JP7797765B2 (en) | Depletion-mode MOSFET for overcurrent protection | |
| CN107947557B (en) | Soft start circuit for resisting overvoltage and undervoltage surges | |
| CN223141500U (en) | A TBU circuit | |
| EP3996276A1 (en) | Power semiconductor switch clamping circuit | |
| WO2009035643A1 (en) | Common gate connected high voltage transient blocking unit | |
| CN116683396A (en) | A TBU circuit | |
| US10483757B1 (en) | Fast-acting power protection system incorporating discrete MOSFETs and control IC on hybrid substrates and method of operating thereof | |
| CN221126885U (en) | TBU circuit | |
| CN221380494U (en) | Surge protection circuit and switching power supply | |
| US20060250736A1 (en) | Transient blocking apparatus with electrostatic discharge protection | |
| CN114204535A (en) | Blocking type surge protector with accelerated turn-off | |
| JPH03145918A (en) | Overvoltage/overcurrent protecting circuit | |
| CN117613834B (en) | Ultra-low leakage ESD protection circuit and chip | |
| KR101677371B1 (en) | A power supply circuit system using a negative threshold five-terminal NMOS FET device embedded with PN varistor | |
| EP4489244A1 (en) | Limiting circuit for use in explosion protection environments | |
| CN209929972U (en) | Overvoltage protection circuit and electronic equipment using same | |
| KR20210001613A (en) | Surge protection apparatus | |
| KR101689969B1 (en) | A power supply circuit system using a negative threshold five-terminal NMOS FET device with multiple step connection for negative DC/DC converter | |
| KR101677387B1 (en) | A power supply circuit system using a negative threshold five-terminal NMOS FET device with multiple step connection for power amplification using power save mode control | |
| KR101705453B1 (en) | A power supply circuit system using a negative threshold five-terminal NMOS FET device with multiple step connection for power RF | |
| CN120784826A (en) | Port protection circuit and chip | |
| SU845213A1 (en) | Device for protecting electric network from overcurrent and overvoltage | |
| CN117955051A (en) | Overvoltage and undervoltage protection circuit and system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |