CN220490983U - Dynamic parameter test system for high-speed integrated circuit - Google Patents
Dynamic parameter test system for high-speed integrated circuit Download PDFInfo
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- CN220490983U CN220490983U CN202322050094.0U CN202322050094U CN220490983U CN 220490983 U CN220490983 U CN 220490983U CN 202322050094 U CN202322050094 U CN 202322050094U CN 220490983 U CN220490983 U CN 220490983U
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Abstract
The utility model provides a dynamic parameter test system of a high-speed integrated circuit, which comprises: the test circuit board comprises an ATE interface, an oscilloscope interface and a test interface, wherein the ATE interface is connected with the input end of the test interface, the oscilloscope interface is connected with the output end of the test interface, and the test interface is used for connecting a device to be tested; the oscilloscope is connected with the oscilloscope interface and is used for displaying a first signal output by the device to be tested from the output end of the test interface as a first result; the ATE tester is connected with the ATE interface and used for sending test signals to the test circuit board; and is coupled to the oscilloscope for reading the first result back onto the ATE tester. The oscilloscope is used for accurate measurement, the interference is small, the ATE test equipment is high in efficiency, the measurement result of the oscilloscope is read back to the ATE tester for display, and the advantages of the oscilloscope and the ATE tester are combined to realize high-speed and high-precision dynamic parameter measurement.
Description
Technical Field
The utility model relates to the technical field of integrated circuit testing, in particular to a dynamic parameter testing system for a high-speed integrated circuit.
Background
In the related art, the dynamic parameter measurement method for the high-speed integrated circuit comprises two steps of directly testing the ATE time measurement unit and reading by the connection oscilloscope, but when the time measurement unit of the ATE test equipment is integrated in a test system, experiments prove that the time measurement of the high-speed integrated circuit (such as ns and above) can cause signal reflection due to the design of a board card circuit of the ATE test equipment or the interference of other elements, and long cables are often arranged between the board card and a tested device, so that the measurement accuracy is influenced, and the real signal cannot be captured. And the accuracy of the dynamic parameter measurement depends on the accuracy of the device board. The connection oscilloscope needs to make the device work and then grasp the waveform because of the measurement of the parameters, so that the device is required to be signaled to work, and the measurement method needs complicated external equipment such as a power supply, a signal generator, an oscilloscope and the like. The results were manually recorded after measurement, which is far less efficient than the test method of ATE equipment and is prone to error, but the test results of this method are the most accurate because the signals were collected using an oscilloscope directly connected to the pins of the device.
Disclosure of Invention
Accordingly, it is an object of the present utility model to provide a system for testing dynamic parameters of a high-speed integrated circuit that overcomes or at least partially solves the above-mentioned problems.
Based on the above object, the present utility model provides a dynamic parameter testing system for a high-speed integrated circuit, comprising:
the test circuit board comprises an ATE interface, an oscilloscope interface and a test interface, wherein the ATE interface is connected with the input end of the test interface, the oscilloscope interface is connected with the output end of the test interface, and the test interface is used for connecting a device to be tested;
the oscilloscope is connected with the oscilloscope interface and is used for displaying a first signal output by the device to be tested from the output end of the test interface as a first result;
the ATE tester is connected with the ATE interface and used for sending test signals to the test circuit board; and the oscilloscope is connected with the ATE test machine and used for reading the first result back to the ATE test machine.
Optionally, a digitizer is connected between the ATE tester and the oscilloscope, and is configured to convert a first signal readable by the oscilloscope into a second signal readable by the ATE tester.
Optionally, a filter capacitor is arranged on the test circuit board, and the filter capacitor is connected with the input end and the output end of the test interface.
Optionally, an impedance matching resistor is disposed on the test circuit board, and the impedance matching resistor is disposed between the test interface and the ATE interface.
Optionally, a relay is arranged between the ATE interface and the test interface, and is used for controlling the on-off of the ATE interface and the test interface.
Optionally, the ATE tester is provided with a display screen and a controller, wherein the display screen is used for displaying the readable second signal as a second result, and the controller is used for recording the second result.
Optionally, the ATE interface is disposed on a first surface of the test circuit board, the oscilloscope interface and the test interface are disposed on a second surface of the test circuit board, and the first surface and the second surface are disposed opposite to each other.
Optionally, the oscilloscope is provided with a range control button for controlling the test range of the oscilloscope to match with the default range parameter of the device to be tested.
Optionally, the oscilloscope is provided with a magnification button, and the magnification button is used for controlling the oscilloscope to display the first result in a magnified manner.
Optionally, the oscilloscope is provided with a trigger level button for controlling the trigger level value of the operation of the oscilloscope.
From the above, it can be seen that the system for testing dynamic parameters of a high-speed integrated circuit provided by the utility model avoids signal reflection caused by interference of board card circuits or other elements in an ATE tester when the ATE tester is tested in the related art, uses an oscilloscope to accurately measure, and has the advantages of small interference and higher efficiency of ATE test equipment, and reads back the measurement result of the oscilloscope to the ATE tester to display, so that the high-speed high-precision dynamic parameter measurement is realized by combining the advantages of the two, and the accuracy of the measurement result is high, stable and reliable.
The foregoing description is only an overview of the technical solutions of the present application, and may be implemented according to the content of the specification in order to make the technical means of the present application more clearly understood, and in order to make the above and other objects, features and advantages of the present application more clearly understood, the following specific embodiments of the present utility model are specifically described.
Drawings
In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the utility model, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of the connection of the test system of the present utility model;
fig. 2 is a schematic diagram of a test circuit board according to the present utility model.
Detailed Description
The present utility model will be further described in detail below with reference to specific embodiments and with reference to the accompanying drawings, in order to make the objects, technical solutions and advantages of the present utility model more apparent.
It should be noted that unless otherwise defined, technical or scientific terms used in the embodiments of the present utility model should be given the ordinary meaning as understood by one of ordinary skill in the art to which the present disclosure pertains. The terms "first," "second," and the like, as used in this disclosure, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate relative positional relationships, which may also be changed when the absolute position of the object to be described is changed.
In order to increase the accuracy of a test result of a device to be tested, reduce signal interference caused by the involvement of an internal card handling circuit or other elements in an original ATE (automatic test equipment) tester, meet the convenience of connection of an oscilloscope, and enable an oscilloscope to be used for accurate measurement and read-back display and automatic recording of readings of the oscilloscope.
Based on this, referring to fig. 1 and 2, the present utility model provides a dynamic parameter testing system for a high-speed integrated circuit, which comprises:
the test circuit board 1 comprises an ATE interface 11, an oscilloscope interface 12 and a test interface 13, wherein the ATE interface 11 is connected with the input end of the test interface 13, and the oscilloscope interface 12 is connected with the output end of the test interface 13. It should be understood that the input ends of the ATE interface 11 and the test interface 13 and the output ends of the oscilloscope interface 12 and the test interface 13 are connected through a connection circuit disposed on the test circuit board 1, and meanwhile, the test interface 13 is used for connecting the device under test 4, and it should be noted that the test interface 13 is used for clamping pins of the device under test 4 to fix the device under test 4.
And the oscilloscope 2 is connected with the oscilloscope interface 12 and is used for displaying a first signal output by the device under test 4 from the output end of the test interface 13 as a first result. The oscillograph 2 is directly connected with the oscillograph interface 12 of the test circuit board 1, so that the condition that the device 4 to be tested is externally connected with a power supply, a signal generator and the like in the related art is avoided, the oscillograph interface 12 is directly connected, the waveform to be grabbed by the oscillograph 2 can be obtained, dynamic parameters such as time intervals, ascending time, descending time and the like of the device 4 to be tested can be effectively displayed through the displayed waveform of the oscillograph 2, but the measurement result of the oscillograph 2 needs to be manually recorded, namely, the time intervals, the ascending time, the descending time and the like contained in the waveform displayed in the oscillograph 2 can only be displayed through the waveform, and meanwhile, the accurate parameters need to be recorded through the waveform displayed in the oscillograph 2, and in order to intuitively display the waveform displayed in the oscillograph 2, the ATE tester 3 is connected with the ATE interface 11 and used for sending test signals to the test circuit board 1; and is connected to the oscilloscope 2 for reading back the first result onto the ATE tester 3. The first result (display waveform) displayed on the oscilloscope 2 is read back to the ATE tester 3, and the calculation and recording of the time interval, the rise time, the fall time, and the like are directly performed. By comparing the test result of the ATE tester 3 with the calibration parameters of the device under test 4, if the test result is better than the calibration parameters of the device under test 4, the device under test 4 is detected to be qualified, otherwise, the device under test 4 is not qualified.
It will be appreciated that the memory unit built into the ATE tester 3 may record the first results read back onto the ATE tester 3.
In some embodiments, a digitizer is connected between the ATE tester 3 and the oscilloscope 2 for converting a first signal readable by the oscilloscope 2 into a second signal readable by the ATE tester 3. It should be understood that, the first result displayed by the oscilloscope 2 is directly connected to the ATE tester 3, the dynamic data displayed by the ATE tester 3 may include interference data that need not be measured, and in order to display the desired dynamic data only on the ATE tester 3, the digital converter is used to convert the desired dynamic data, and eliminate the interference data therein, and it should be noted that the digital converter may be a hardware, where a program that is pre-programmed to filter the interference signal may also be a software, and be disposed in the ATE tester 3.
In some embodiments, a filter capacitor is disposed on the test circuit board 1, and the filter capacitor is connected to an input end and an output end of the test interface 13. The device to be tested 4 is connected with the filter capacitor through the input end and the output end of the test interface 13, so that external clutter of the input end and the output end in the period to be tested can be effectively filtered, the voltage/current applied to the device to be tested 4 is safe and undisturbed, and clutter interference signals in output signals to the oscilloscope 2 in the period to be tested are filtered, and interference test results are avoided.
In some embodiments, an impedance matching resistor is provided on test circuit board 1, and the impedance matching resistor is provided between test interface 13 and ATE interface 11. Specifically, the test interface 13 is connected with the ATE interface 11 through an impedance matching resistor, and the ATE tester 3 sends a test signal to the test circuit board 1, and the impedance matching resistor matches the test signal of the ATE tester 3 to avoid reflection and avoid impedance matching of the test signal.
In some embodiments, a relay 14 is disposed between the ATE interface 11 and the test interface 13, for controlling the on/off of the ATE interface 11 and the test interface 13.
In some embodiments, the ATE tester 3 is provided with a display screen for displaying the readable second signal as a second result and a controller. Through the description, the second result is the parameters such as the time interval, the rising time, the falling time and the like, and the parameters are directly displayed on the display screen, so that the parameters are visualized conveniently.
In some embodiments, the ATE interface 11 is disposed on a first side of the test circuit board 1, and the oscilloscope interface 12 and the test interface 13 are disposed on a second side of the test circuit board 1, the first side and the second side being disposed opposite each other. Through the ATE interface 11 setting is connected with the ATE tester 3 in the first face of test circuit board 1, and the ATE interface 11 is pegged graft on the ATE tester 3 simultaneously, plays fixed action to test circuit board 1, in order to conveniently carry out the connection of test circuit board 1 with oscilloscope 2, through setting up oscilloscope interface 12 and test interface 13 at the second face of test circuit board 1, it can be understood that, when combining the ATE tester 3, the first face of test circuit board 1 is connected with the ATE tester 3 downwards, and the second face of test circuit board 1 is upwards convenient to be connected with oscilloscope 2 and test device.
In some embodiments, the oscilloscope 2 is provided with a range control button for controlling the test range of the oscilloscope 2 to match the default range parameters of the device under test. For more accurately measuring parameters of the device to be measured 4, for example, a preset time interval in the device to be measured 4 is 10ns, then the oscilloscope 2 sets the working range of the oscilloscope 2 on the range of 10ns through the range button, the measured value of the oscilloscope 2 is more accurate, and if the preset time interval in the device to be measured 4 is 100ns and the range of the oscilloscope 2 is 10ns, it is obvious that the time interval during the period to be measured cannot be accurately and effectively displayed.
In some embodiments, the oscilloscope 2 is provided with a magnification button for controlling the magnification display of the first result by the oscilloscope 2. The first result (waveform) displayed by the oscilloscope 2 is clearer, so that the phenomenon that the waveform is not clear enough due to too small display is avoided, and meanwhile, the first result of the oscilloscope 2 can be compared with the second result of the ATE tester 3, so that the accuracy of the test result is doubly ensured.
In some embodiments, the oscilloscope 2 is provided with a trigger level button for controlling the trigger level value of the operation of the oscilloscope 2. The trigger level value of the oscilloscope 2 and the preset trigger level of the device 4 to be tested are set through the trigger level button, so that the oscilloscope 2 starts to work as soon as the test circuit of the test circuit board 1 reaches the trigger level value of the oscilloscope 2, and a first result of the first signal display output by the output end of the test interface 13 after the trigger level value is reached is displayed. Of course, it will be appreciated that a relay may be provided between the test interface 13 and the oscilloscope interface 12 as well, again with corresponding effect.
When the test system is used for testing dynamic parameters of the device 4 to be tested, the test circuit board 1 is firstly mounted on a load board of the ATE tester 3, an ATE interface 11 on the test circuit board 1 is connected with the ATE tester 3, an oscilloscope interface 12 is connected with the oscilloscope 2, meanwhile, the ATE tester 3 is connected with the oscilloscope 2, the ATE tester 3 sends test signals, the test is operated through the on-off relay 14, and when the device 4 to be tested is required to be tested, pins of the device 4 to be tested are connected with the test interface 13.
Those of ordinary skill in the art will appreciate that: the discussion of any of the embodiments above is merely exemplary and is not intended to suggest that the scope of the disclosure, including the claims, is limited to these examples; the technical features of the above embodiments or in the different embodiments may also be combined within the idea of the utility model, the steps may be implemented in any order and there are many other variations of the different aspects of the utility model as described above, which are not provided in detail for the sake of brevity.
The embodiments of the utility model are intended to embrace all such alternatives, modifications and variances which fall within the broad scope of the appended claims. Therefore, any omission, modification, equivalent replacement, improvement, etc. of the present utility model should be included in the scope of the present utility model.
Claims (9)
1. A system for testing dynamic parameters of a high-speed integrated circuit, comprising:
the test circuit board comprises an ATE interface, an oscilloscope interface and a test interface, wherein the ATE interface is connected with the input end of the test interface, the oscilloscope interface is connected with the output end of the test interface, and the test interface is used for connecting a device to be tested;
the oscilloscope is connected with the oscilloscope interface and is used for displaying a first signal output by the device to be tested from the output end of the test interface as a first result;
the ATE tester is connected with the ATE interface and used for sending test signals to the test circuit board; and the oscilloscope is connected with the ATE test machine and used for reading the first result back to the ATE test machine.
2. The system of claim 1, wherein a digitizer is coupled between the ATE tester and the oscilloscope to convert the oscilloscope readable first signal to the ATE tester readable second signal.
3. The system of claim 1, wherein a filter capacitor is provided on the test circuit board, the filter capacitor being connected to the input and output of the test interface.
4. The system of claim 1, wherein a relay is provided between the ATE interface and the test interface for controlling the on-off of the ATE interface and the test interface.
5. The system according to claim 2, wherein the ATE tester is provided with a display screen for displaying the readable second signal as a second result.
6. The system of claim 1, wherein the ATE interface is disposed on a first side of the test circuit board, the oscilloscope interface and the test interface are disposed on a second side of the test circuit board, the first side and the second side being disposed opposite one another.
7. The system of claim 1, wherein the oscilloscope is provided with a span control button for controlling the test span of the oscilloscope to match the default span parameters of the device under test.
8. The system of claim 1, wherein the oscilloscope is provided with a magnification button for controlling the display of the first result by the oscilloscope.
9. The system of claim 1, wherein the oscilloscope is provided with a trigger level button for controlling the trigger level value of the oscilloscope operation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322050094.0U CN220490983U (en) | 2023-08-01 | 2023-08-01 | Dynamic parameter test system for high-speed integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322050094.0U CN220490983U (en) | 2023-08-01 | 2023-08-01 | Dynamic parameter test system for high-speed integrated circuit |
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| Publication Number | Publication Date |
|---|---|
| CN220490983U true CN220490983U (en) | 2024-02-13 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202322050094.0U Active CN220490983U (en) | 2023-08-01 | 2023-08-01 | Dynamic parameter test system for high-speed integrated circuit |
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| Country | Link |
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| CN (1) | CN220490983U (en) |
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- 2023-08-01 CN CN202322050094.0U patent/CN220490983U/en active Active
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