CN219999360U - A voltage-controlled oscillator for low-power phase-locked loop systems - Google Patents

Abstract

The utility model belongs to the technical field of voltage-controlled oscillators, and specifically relates to a voltage-controlled oscillator used in a low-power phase-locked loop system. The voltage-controlled oscillator includes: a varactor module; wherein the varactor module is used for Control the output frequency of the voltage-controlled oscillator; the utility model optimizes the varactor module and obtains the optimization direction of the varactor by constructing a varactor model, which can reduce the capacitance of the varactor as much as possible while satisfying the requirements. The parasitic resistance increases the Q value of the varactor, thereby improving key performance indicators such as the phase noise of the voltage controlled oscillator.

Description

A voltage-controlled oscillator for low-power phase-locked loop systems

Technical field

The utility model belongs to the technical field of voltage-controlled oscillators, and specifically relates to a voltage-controlled oscillator used in a low-power phase-locked loop system.

Background technique

The voltage controlled oscillator is responsible for generating radio frequency local oscillator signals in the phase-locked loop system. It is a key module in the phase-locked loop system and a basic module in modern communication systems. A voltage controlled oscillator is an oscillation circuit that uses a voltage input to control the oscillation frequency. In the millimeter-wave frequency band, the structure of a voltage-controlled oscillator usually includes a resonator composed of a capacitor and an inductor and a varactor as the voltage input end. According to the application fields of voltage-controlled oscillators, voltage-controlled oscillators have different design goals and requirements in different communication systems. Generally speaking, the design difficulties of voltage controlled oscillators include frequency coverage, phase noise, power consumption, etc. In the millimeter-wave frequency band, due to the performance deterioration of on-chip passive components, the performance of the voltage-controlled oscillator is greatly limited, and more trade-offs need to be made in the design.

The varactor is a key component used to control the output frequency of the voltage controlled oscillator. Its performance will have a great impact on the overall performance of the voltage controlled oscillator. Therefore, the design of the varactor is very critical in the overall practice of the voltage controlled oscillator. . In the design of varactor tubes in the millimeter wave frequency band, the variable capacitance range and Q value of the varactor tube are the main indicators that need attention. In the 40nm CMOS process, varactor devices with a working voltage of 0.9V are traditionally used. Since the varactor with a working voltage of 0.9V has obvious gate leakage, it will cause the Q value of the voltage controlled oscillator resonator to decrease. Adversely affects the operation of the voltage controlled oscillator.

Therefore, there is an urgent need to develop a new voltage-controlled oscillator for low-power phase-locked loop systems to solve the above problems.

Utility model content

The purpose of this utility model is to provide a voltage-controlled oscillator for a low-power phase-locked loop system and a working method thereof.

In order to solve the above technical problems, the present invention provides a voltage-controlled oscillator for a low-power phase-locked loop system, which includes: a varactor module; wherein the varactor module is used to control the voltage-controlled oscillator. Output frequency.

Further, the varactor module includes: a first DC blocking capacitor, a second varactor, a third varactor, a fourth DC blocking capacitor, a first resistor and a second resistor; the first DC blocking capacitor, The second varactor, the third varactor, and the fourth DC blocking capacitor are connected in series in sequence. The first DC blocking capacitor and the fourth DC blocking capacitor are respectively connected to both ends of the differential inductance coil. The second varactor is connected to The third varactor is connected to the voltage control terminal V _tune . The first DC blocking capacitor and the second varactor are connected to the DC bias V _DD through a first resistor. The third varactor is connected to the voltage control terminal V tune . The fourth DC blocking capacitor is connected to the DC bias V _DD through the second resistor.

Further, the second varactor and the third varactor are varactor tubes of the same size and geometric symmetry.

Further, the value range of the voltage control terminal V _tune is 0 to 2V _DD .

Further, when the voltage control terminal V _tune is equal to V _DD , the second varactor and the third varactor obtain optimal CV linearity.

further,

ω is the operating angular frequency, R _var is the parasitic resistance of the varactor, and C _var is the capacitance of the varactor.

Further, C _var = C _ox ·W·L·N;

C _ox is the gate oxide layer capacitance, W, L and N are the gate width, gate length and insertion index of the varactor respectively.

further,

Among them, K _gate and K _sd are constants, ρ _gate and ρ _sd are the sheet resistance of the gate polysilicon and the sheet resistance of the source and drain terminals respectively.

Furthermore, when R _var takes the minimum value, then

The beneficial effect of the utility model is that by optimizing the varactor module and constructing the varactor model, the utility model obtains the optimization direction of the varactor, thereby minimizing parasitics as much as possible while satisfying the capacitance value of the varactor. Resistor, improve the Q value of the varactor, thereby improving key performance indicators such as the phase noise of the voltage controlled oscillator.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention.

In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the attached drawings.

Description of the drawings

In order to more clearly explain the specific embodiments of the present invention or the technical solutions in the prior art, the drawings that need to be used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings in the following description The accompanying drawings illustrate some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without exerting creative efforts.

Figure 1 is a circuit diagram of the varactor module of the present invention;

Figure 2 is a circuit diagram of the varactor equivalent circuit model of the present utility model;

Figure 3 is a graph of C-V characteristics of the varactor of the present invention.

In the picture:

The first DC blocking capacitor C ₁ , the second varactor C ₂ , the third varactor C ₃ , the fourth DC blocking capacitor C ₄ , the first resistor R ₁ and the second resistor R ₂ .

Detailed ways

In order to make the purpose, technical solutions and advantages of the embodiments of the present utility model clearer, the technical solutions of the present utility model will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present utility model. Not all examples. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present utility model.

Example 1

In this embodiment, as shown in Figures 1 to 3, this embodiment provides a voltage controlled oscillator for a low-power phase-locked loop system, which includes: a varactor module; wherein the varactor The module is used to control the output frequency of the voltage controlled oscillator.

In this embodiment, by optimizing the varactor module and constructing a varactor model, the optimization direction of the varactor is obtained, which can reduce the parasitic resistance as much as possible while satisfying the capacitance of the varactor. Improve the Q value of the varactor, thereby improving key performance indicators such as the phase noise of the voltage controlled oscillator.

In this embodiment, the varactor module includes: a first DC blocking capacitor C ₁ , a second varactor C ₂ , a third varactor C ₃ , a fourth DC blocking capacitor C ₄ , and a first resistor R ₁ and the second resistor R ₂ ; the first DC blocking capacitor C ₁ , the second varactor C ₂ , the third varactor C ₃ and the fourth DC blocking capacitor C ₄ are connected in series in sequence. The capacitor C ₁ and the fourth DC blocking capacitor C ₄ are respectively connected to both ends of the differential inductance coil. The second varactor C ₂ and the third varactor C ₃ are connected to the voltage control terminal V _tune . A DC blocking capacitor C ₁ and a second varactor C ₂ are connected to the DC bias V _DD through a first resistor R ₁ , and a DC blocking capacitor C ₃ and a fourth DC blocking capacitor C ₄ are connected to the DC bias V DD through a first resistor R 1 . The second resistor R ₂ is connected to the DC bias V _DD .

In this embodiment, the second varactor C ₂ and the third varactor C ₃ are varactor tubes with the same size and geometric symmetry.

In this embodiment, the second varactor C ₂ and the third varactor C ₃ both adopt the 1.8V varactor equivalent circuit model as shown in Figure 2, where L _gate and L _sd respectively represent the gate. and the parasitic inductance of the source-drain contact hole, R _gate and R _sd represent the parasitic resistance of the gate and source-drain contact hole respectively, D _nwpsub represents the parasitic diode between the deep N-well and the P substrate, R _sub and C _sub represents the parasitic resistance and capacitance of the substrate, and C _var represents the variable capacitance of the varactor.

In this embodiment, for the MOSCAP device in the 40nm CMOS process, it can be known from the process manual and simulation model that when the difference V _gs between V _gate and V _bulk changes, the CV characteristic curve can be obtained as shown in Figure 3.

In this embodiment, the value range of the voltage control terminal V _tune is 0 to 2V _DD .

In this embodiment, when the voltage control terminal V _tune is equal to V _DD , the second varactor and the third varactor obtain optimal CV linearity.

In this embodiment, the change of the varactor C _var with V _gs is not linear. When V _gs is near 0, it has a relatively optimal capacitance change linearity and a capacitance change range under a unit voltage change. Therefore, for the design of the varactor circuit, this physical characteristic of the varactor needs to be taken into consideration. Figure 1 is the circuit structure used in the varactor module. Ports P and N are connected to both ends of the differential inductance coil. C ₁ and C ₄ are DC blocking capacitors with relatively large values. C ₂ and C ₃ are the sizes. One end of the same varactor with symmetrical geometric shape is connected to the voltage control terminal V _tune , and the other end is connected to the DC bias through resistors R ₁ and R _2. The DC bias voltage takes the power supply voltage V _DD . Under this structure, the V _tune voltage can take a value between 0 and 2V _DD , which maximizes the adjustment range of V _tune . When V _tune is approximately equal to V _DD , the varactor can obtain the best CV linearity.

In this embodiment, ω is the operating angular frequency, R _var is the parasitic resistance of the varactor, and C _var is the capacitance of the varactor.

In this embodiment, when the circuit is working, D _nwpsub is always reverse-biased and D _nwpsub is not conductive, so D _nwpsub , R _sub and C _sub can be ignored.

In this embodiment, ω and C _war are determined by circuit requirements. Therefore, the key to improving the Q value of the varactor is to reduce R _var .

In this embodiment, C _var =C _ox ·W·L·N; C _ox is the gate oxide layer capacitance, W, L and N are the gate width, gate length and insertion index of the varactor respectively.

In this embodiment, the size of the varactor determines the capacitance variation range of the varactor and the size of the parasitic resistance. Therefore, it is necessary to optimize the size selection of the varactor. C _var is the capacitance of the varactor.

In this embodiment, Among them, K _gate and K _sd are constants, ρ _gate and ρ _sd are the sheet resistance of the gate polysilicon and the sheet resistance of the source and drain terminals respectively.

In this embodiment, R _var is the parasitic resistance of the varactor. When the value of W/L is larger or smaller, the parasitic resistance R _var of the varactor will be larger.

In this embodiment, when R _var takes the minimum value, then

In this embodiment, the optimized direction of the varactor can be obtained according to W/L. When the width-to-length ratio of the varactor satisfies According to the requirements of the voltage controlled oscillator for C _var , by selecting the appropriate insertion index N, the parasitic resistance can be reduced as much as possible and the Q value of the varactor can be improved while satisfying the capacitance of the varactor. This in turn improves key performance indicators such as the phase noise of the voltage controlled oscillator.

To sum up, the present utility model optimizes the varactor module and obtains the optimization direction of the varactor by constructing a varactor model. It can reduce the parasitic resistance as much as possible while satisfying the capacitance of the varactor and improve the performance of the varactor. The Q value of the varactor can thereby improve key performance indicators such as the phase noise of the voltage controlled oscillator.

Each device selected in this application (components with no specific structure specified) are universal standard parts or components known to those skilled in the art. Their structures and principles can be known by those skilled in the art through technical manuals or through routine experimental methods. informed.

In the description of the embodiments of the present utility model, unless otherwise clearly stated and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense. For example, it can be a fixed connection or a detachable connection. Or integrally connected; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be an internal connection between two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood in specific situations.

In the description of the present utility model, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner" and "outer" The indicated orientations or positional relationships are based on the orientations or positional relationships shown in the drawings. They are only for the convenience of describing the present invention and simplifying the description. They are not intended to indicate or imply that the device or element referred to must have a specific orientation or a specific orientation. The orientation structure and operation of the invention cannot be construed as limitations of the present invention. Furthermore, the terms “first”, “second” and “third” are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.

In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. The device embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined or can be integrated into another system, or some features can be ignored, or not implemented. On the other hand, the coupling or direct coupling or communication connection between each other shown or discussed may be through some communication interfaces, and the indirect coupling or communication connection of the devices or units may be in electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or they may be distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present invention can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit.

Taking the above-mentioned ideal embodiments of the present invention as inspiration and through the above description, relevant staff can make various changes and modifications without departing from the scope of the technical idea of the present utility model. The technical scope of this utility model is not limited to the content in the description, and must be determined based on the scope of the claims.

Claims (8)

1. A voltage controlled oscillator for a low power phase locked loop system, comprising:

a varactor module; wherein the method comprises the steps of

The varactor module is used for controlling the output frequency of the voltage-controlled oscillator;

the varactor module includes: the first DC blocking capacitor, the second varactor, the third varactor, the fourth DC blocking capacitor, the first resistor and the second resistor;

the first blocking capacitor and the second varactorThe tube, the third varactor and the fourth blocking capacitor are sequentially connected in series, the first blocking capacitor and the fourth blocking capacitor are respectively connected with two ends of the differential inductance coil, and the voltage control end V is connected between the second varactor and the third varactor _tune The first blocking capacitor and the second varactor are connected to a direct current bias V through a first resistor _DD The third varactor and the fourth blocking capacitor are connected to a direct current bias V through a second resistor _DD 。

2. A voltage controlled oscillator for a low power consumption phase locked loop system as claimed in claim 1,

the second varactor and the third varactor are varactors with the same size and geometric symmetry.

3. A voltage controlled oscillator for a low power consumption phase locked loop system as claimed in claim 1,

voltage control terminal V _tune The value of (2) is 0-2V _DD 。

4. A voltage controlled oscillator for a low power consumption phase locked loop system as claimed in claim 3,

at voltage control terminal V _tune Equal to V _DD And when the second varactor and the third varactor acquire optimal C-V linearity.

5. A voltage controlled oscillator for a low power consumption phase locked loop system as claimed in claim 1,

omega is the working angular frequency, R _var C is parasitic resistance of varactor _var Is the capacitance of the varactor.

6. The voltage controlled oscillator for a low power consumption phase locked loop system of claim 5, wherein，C _var ＝C _ox ·W·L·N；

C _ox For the gate oxide capacitance, W, L and N are the gate width, gate length and insertion index of the varactor, respectively.

7. A voltage controlled oscillator for a low power consumption phase locked loop system as claimed in claim 6,

wherein K is _gate And K _sd Are all constant, ρ _gate And ρ _sd The square resistance of the grid polysilicon and the square resistance of the source and drain terminals are respectively.

8. A voltage controlled oscillator for a low power consumption phase locked loop system as claimed in claim 7,

when R is _var When the minimum value is taken, then