CN111541423A - Low-phase-noise double-resonant-cavity noise filtering voltage-controlled oscillator - Google Patents
Low-phase-noise double-resonant-cavity noise filtering voltage-controlled oscillator Download PDFInfo
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Abstract
本发明涉及一种低相位噪声的双谐振腔噪声滤波压控振荡器,属于微波集成电路设计技术领域。由交叉耦合对管、固定电容阵列、可变电容阵列、源漏耦合变压器以及二次谐波阻挡电路组成。交叉耦合对管由两个对称的射频晶体管组成,用来补偿电感电容谐振腔中的损耗,固定电容阵列由2对被外部数字码控制的电容组成,可变电容阵列由一对变容管组成,源漏耦合变压器由65nm工艺中的极厚第九金属层绕线组成,二次谐波阻挡电路由谐振在载波频率二倍频的电感电容谐振腔组成。本发明采用变压器耦合的源漏同向摆动以增大振荡器的摆幅,采用在振荡器底部串接二次谐波抑制电路,以抑制振荡器中二次谐波电流导致的闪烁噪声上的变频,从而降低了压控振荡器的相位噪声。
The invention relates to a low-phase noise dual-resonator noise filtering voltage-controlled oscillator, which belongs to the technical field of microwave integrated circuit design. It is composed of a cross-coupled pair tube, a fixed capacitor array, a variable capacitor array, a source-drain coupling transformer and a second harmonic blocking circuit. The cross-coupled pair tube is composed of two symmetrical RF transistors, which are used to compensate the loss in the inductor-capacitor resonant cavity. The fixed capacitor array is composed of two pairs of capacitors controlled by external digital codes, and the variable capacitor array is composed of a pair of varactors. , The source-drain coupling transformer is composed of a very thick ninth metal layer winding in a 65nm process, and the second harmonic blocking circuit is composed of an inductance-capacitance resonant cavity that resonates at twice the carrier frequency. The invention adopts transformer-coupled source-drain to swing in the same direction to increase the swing amplitude of the oscillator, and a second harmonic suppression circuit is connected in series at the bottom of the oscillator to suppress the flicker noise caused by the second harmonic current in the oscillator. frequency conversion, thereby reducing the phase noise of the VCO.
Description
技术领域technical field
本发明涉及一种低相位噪声的双谐振腔噪声滤波压控振荡器,属于微波集成电路设计技术领域。The invention relates to a low-phase noise dual-resonator noise filtering voltage-controlled oscillator, which belongs to the technical field of microwave integrated circuit design.
背景技术Background technique
近年来,汽车电子及汽车毫米波雷达技术快速发展,逐步证明了毫米波在汽车雷达系统中的应用能力。未来的汽车将会装备多台雷达用于不同方向的探测,为了降低汽车雷达的成本,必须将雷达的信号发射和数据处理全部集成在一个互补金属氧化物(以下英文简称CMOS)工艺制造的片上系统上,其中需要用到一个高频的锁相环为接收和发射提供纯净的本振信号以减少相位噪声对于测距测速精度的影响。In recent years, the rapid development of automotive electronics and automotive millimeter-wave radar technology has gradually proved the application capability of millimeter-wave in automotive radar systems. In the future, cars will be equipped with multiple radars for detection in different directions. In order to reduce the cost of automotive radars, the signal transmission and data processing of radars must be integrated on a chip made by a complementary metal oxide (hereinafter referred to as CMOS) process. In the system, a high-frequency phase-locked loop is required to provide a pure local oscillator signal for reception and transmission to reduce the influence of phase noise on the accuracy of ranging and speed measurement.
对于一个CMOS锁相环,相位噪声的主要来源是电荷泵和压控振荡器。其中,电荷泵决定锁相环的带内噪声,压控振荡器决定锁相环的带外噪声。但是,我们常常发现锁相环的带宽不过在百kHz量级,这个频段的压控振荡器闪烁噪声上变频恶化的相位噪声会在总体性能上体现出来。根据Hajimiri在1998年发表的文章《A.Hajimiri and T.H.Lee,"Ageneral theory of phase noise in electrical oscillators,"in IEEE Journal ofSolid-State Circuits,vol.33,no.2,pp.179-194,Feb.1998.》中的ISF理论,闪烁噪声上变频将导致压控振荡器输出波形的不对称以及ISFeff,dc增大,所以需要采用一些技术降低。2016Mina Shahmohammadi在《M.Shahmohammadi,M.Babaie and R.B.Staszewski,"A 1/fNoise Upconversion Reduction Technique for Voltage-Biased RF CMOSOscillators,"in IEEE Journal of Solid-State Circuits,vol.51,no.11,pp.2610-2624,Nov.2016.》中用定性的方法说明了ISFeff,dc增大主要是由于振荡波形中2次谐波电流导致的。For a CMOS phase-locked loop, the main sources of phase noise are charge pumps and voltage-controlled oscillators. Among them, the charge pump determines the in-band noise of the phase-locked loop, and the voltage-controlled oscillator determines the out-of-band noise of the phase-locked loop. However, we often find that the bandwidth of the phase-locked loop is only in the order of 100 kHz, and the phase noise of the voltage-controlled oscillator flicker noise in this frequency band is degraded by the up-conversion frequency and will be reflected in the overall performance. According to Hajimiri's 1998 article "A.Hajimiri and THLee,"Ageneral theory of phase noise in electrical oscillators,"in IEEE Journal of Solid-State Circuits,vol.33,no.2,pp.179-194,Feb. 1998. "In the ISF theory, the up-conversion of flicker noise will cause the asymmetry of the output waveform of the voltage-controlled oscillator and the increase of ISF eff,dc , so some techniques need to be used to reduce it. 2016Mina Shahmohammadi in "M.Shahmohammadi,M.Babaie and RB Staszewski,"
发明内容SUMMARY OF THE INVENTION
本发明的目的是提出一种低相位噪声的双谐振腔噪声滤波压控振荡器,以抑制二次谐波电流的方法来降低ISFeff,dc,改善压控振荡器的相位噪声性能。The purpose of the present invention is to propose a low phase noise dual resonator noise filter voltage controlled oscillator, which can reduce the ISF eff,dc by suppressing the second harmonic current and improve the phase noise performance of the voltage controlled oscillator.
本发明提出的低相位噪声的双谐振腔噪声滤波压控振荡器,包括交叉耦合对管M1、M2、固定电容阵列、可变电容阵列、源漏耦合变压器以及二次谐波阻挡电路;所述的固定电容阵列与可变电容阵列并联,固定电容阵列与可变电容阵列并联后的两端分别接在双谐振腔噪声滤波压控振荡器的输出结点,该输出结点即交叉耦合对管的漏极,同时该输出结点分别与源漏耦合变压器的外圈端口相接,源漏耦合变压器的源极与源漏耦合变压器的内圈端口相接,源漏耦合变压器的电压偏置抽头p5接电源,源漏耦合变压器的地抽头p6与二次谐波阻挡电路的一端相连接,二次谐波阻挡电路的另一端接地。The low-phase noise dual-resonator noise filtering voltage-controlled oscillator proposed by the present invention includes cross-coupled pair tubes M1, M2, a fixed capacitor array, a variable capacitor array, a source-drain coupling transformer and a second harmonic blocking circuit; the The fixed capacitor array is connected in parallel with the variable capacitor array. The two ends of the fixed capacitor array and the variable capacitor array connected in parallel are respectively connected to the output node of the dual-resonator noise filtering voltage-controlled oscillator, and the output node is the cross-coupling pair tube. At the same time, the output node is connected to the outer ring port of the source-drain coupling transformer, the source of the source-drain coupling transformer is connected to the inner ring port of the source-drain coupling transformer, and the voltage bias tap of the source-drain coupling transformer is connected. p5 is connected to the power supply, the ground tap p6 of the source-drain coupling transformer is connected to one end of the second harmonic blocking circuit, and the other end of the second harmonic blocking circuit is grounded.
上述双谐振腔噪声滤波压控振荡器,其中:The above-mentioned dual-resonator noise filtering voltage-controlled oscillator, wherein:
所述的交叉耦合对管由两个对称的射频晶体管M1和M2组成,NMOS晶体管M1的栅极接源漏耦合变压器变压器外圈L1的输入节点p2,M1的漏极接变压器外圈L1的输入节点p1,NMOS晶体管M1的栅极接源漏耦合变压器内圈L2的输入节点p3;NMOS晶体管M2的栅极接源漏耦合变压器变压器外圈L1的输入节点p1,M2的漏极接源漏耦合变压器变压器外圈L1的输入节点p2,NMOS晶体管M2的栅极接源漏耦合变压器变压器内圈L2的输入节点p4,交叉耦合对管用来补偿电感电容谐振腔中的损耗以维持振荡;The cross-coupling pair tube is composed of two symmetrical radio frequency transistors M1 and M2. The gate of the NMOS transistor M1 is connected to the input node p2 of the outer ring L1 of the transformer transformer of the source-drain coupling, and the drain of M1 is connected to the input of the outer ring L1 of the transformer. Node p1, the gate of the NMOS transistor M1 is connected to the input node p3 of the inner ring L2 of the source-drain coupling transformer; the gate of the NMOS transistor M2 is connected to the input node p1 of the outer ring L1 of the source-drain coupling transformer transformer, and the drain of M2 is connected to the source-drain coupling The input node p2 of the outer ring L1 of the transformer transformer, the gate of the NMOS transistor M2 is connected to the input node p4 of the inner ring L2 of the transformer transformer of the source-drain coupling, and the cross-coupling pair tube is used to compensate the loss in the inductor-capacitor resonant cavity to maintain oscillation;
所述的固定电容阵列,由四个电容C1、C2、C3、C4,分别与四个电容C1、C2、C3、C4端接的四个电阻R1、R2、R3、R4,两个开关晶体管MC0和MC1,以及两个反相器F0和F1组成;所述电容C1与所述电阻R1的一端相连,电阻R1的另一端与反相器F0的输出端相连,反相器F0的输出端与电阻R2的一端相连,电阻R2的另一端与所述开关晶体管MC0的漏极相连,开关晶体管MC0的漏极同时与电阻R1的另一端相连;所述电容C3的一端与电阻R3的一端相连,电阻R3的另一端与反相器F1的输出端相连,反相器F1的输出端同时与电阻R4的一端相连,电阻R4的另一端与开关晶体管MC1的漏极相连,开关晶体管MC1的漏极同时与所述电阻R3的另一端相连;当从所述振荡器外部输入的数字控制信号c0=1时,所述电容C1的另一端和电容C2的另一端通过输入端口p1、p2接入双谐振腔噪声滤波压控振荡器的谐振腔;当数字控制信号c0=0时,电容C1的另一端和电容C2的另一端不接入谐振腔,当数字控制信号c1=1时,电容C3的另一端和电容C4的另一端通过源漏耦合变压器外部线圈的输入端口p2、p1接入谐振腔;当从所述振荡器外部输入的数字控制信号c1=0时,电容C3的另一端和电容C4的另一端不接入谐振腔,所述的固定电容阵列用于离散地调节振荡频率;The fixed capacitor array is composed of four capacitors C1, C2, C3 and C4, four resistors R1, R2, R3 and R4 which are respectively terminated with the four capacitors C1, C2, C3 and C4, and two switching transistors MC0. and MC1, and two inverters F0 and F1; the capacitor C1 is connected to one end of the resistor R1, the other end of the resistor R1 is connected to the output end of the inverter F0, and the output end of the inverter F0 is connected to One end of the resistor R2 is connected to the other end of the resistor R2, the other end of the resistor R2 is connected to the drain of the switching transistor MC0, and the drain of the switching transistor MC0 is connected to the other end of the resistor R1 at the same time; one end of the capacitor C3 is connected to one end of the resistor R3, The other end of the resistor R3 is connected to the output end of the inverter F1, the output end of the inverter F1 is connected to one end of the resistor R4 at the same time, the other end of the resistor R4 is connected to the drain of the switching transistor MC1, and the drain of the switching transistor MC1 is connected. At the same time, it is connected to the other end of the resistor R3; when the digital control signal c0 = 1 is input from the outside of the oscillator, the other end of the capacitor C1 and the other end of the capacitor C2 are connected to the dual via the input ports p1 and p2. The resonant cavity of the resonant cavity noise filter voltage controlled oscillator; when the digital control signal c0=0, the other end of the capacitor C1 and the other end of the capacitor C2 are not connected to the resonant cavity, when the digital control signal c1=1, the capacitor C3 The other end and the other end of the capacitor C4 are connected to the resonant cavity through the input ports p2 and p1 of the external coil of the source-drain coupling transformer; when the digital control signal c1=0 input from the outside of the oscillator, the other end of the capacitor C3 and the capacitor The other end of C4 is not connected to the resonant cavity, and the fixed capacitor array is used to discretely adjust the oscillation frequency;
所述的可变电容阵列由变容管CV1、变容管CV2、变容管CV3和变容管CV4构成,其中变容管CV1的栅端接输入端口p1,变容管的体端接控制端网线1,变容管CV2的栅端接输入端口p2,变容管CV2的体端接控制端网线1,变容管CV3的栅端接输入端口p3,变容管CV3的体端接控制端网线1,变容管CV4的栅端接输入端口p4,变容管CV4的体端接控制端网线1;所述的可变电容阵列用于连续地调节振荡频率;The variable capacitor array is composed of a varactor CV1, a varactor CV2, a varactor CV3 and a varactor CV4, wherein the gate terminal of the varactor CV1 is connected to the input port p1, and the body terminal of the varactor is connected to the control The
所述源漏耦合变压器包含6个端口:外圈L1的两个输出端口p1和p2分别与交叉耦合对管的射频晶体管M1和M2相连,内圈L2的两个输出端口p3和p4与交叉耦合对管的源极相连接,源漏耦合变压器的电压偏置抽头p5接电源,抽头地p6接地;所述源漏耦合变压器用于形成源漏同向的振荡波形;The source-drain coupling transformer includes 6 ports: the two output ports p1 and p2 of the outer ring L1 are respectively connected to the radio frequency transistors M1 and M2 of the cross-coupling pair of tubes, and the two output ports p3 and p4 of the inner ring L2 are connected to the cross-coupling pair. The source of the tube is connected, the voltage bias tap p5 of the source-drain coupling transformer is connected to the power supply, and the tap ground p6 is grounded; the source-drain coupling transformer is used to form an oscillation waveform with the same direction of source and drain;
所述二次谐波阻挡电路,由电感电容谐振腔Ls和Cs组成,电感电容谐振腔Ls与电感电容Cs并联,电感电容谐振腔Ls与电感电容Cs并联后的一端与源漏耦合变压器的抽头地p6相连接,电感电容谐振腔Ls与电感电容Cs并联后的一端另一端接地;所述二次谐波阻挡电路用于抑制振荡器中的二次谐波电流。The second harmonic blocking circuit is composed of inductor-capacitor resonant cavities Ls and Cs, the inductor-capacitor resonant cavity Ls is connected in parallel with the inductor-capacitor Cs, and one end of the inductor-capacitor resonant cavity Ls and the inductor-capacitor Cs in parallel is connected to the tap of the source-drain coupling transformer. The ground p6 is connected, one end of the inductance-capacitor resonant cavity Ls and the inductance-capacitor Cs are connected in parallel and the other end is grounded; the second harmonic blocking circuit is used to suppress the second harmonic current in the oscillator.
本发明提出的低相位噪声的双谐振腔噪声滤波压控振荡器,其优点是:The dual-resonator noise filtering voltage-controlled oscillator with low phase noise proposed by the present invention has the following advantages:
1、本发明的低相位噪声的双谐振腔噪声滤波压控振荡器中,采用了变压器耦合带来的源漏同向摆动以增大振荡器的摆幅,因此降低了压控振荡器相位噪声。1. In the low-phase noise dual-resonator noise filtering voltage-controlled oscillator of the present invention, the source-drain co-directional swing brought by transformer coupling is used to increase the swing of the oscillator, thus reducing the phase noise of the voltage-controlled oscillator .
2、本发明采用了在振荡器底部串接二次谐波抑制电路的方法,以抑制二次谐波导致的闪烁噪声上的变频,进一步降低了压控振荡器的相位噪声。2. The present invention adopts the method of connecting the second harmonic suppression circuit in series at the bottom of the oscillator, so as to suppress the frequency conversion on the flicker noise caused by the second harmonic, and further reduce the phase noise of the voltage controlled oscillator.
附图说明Description of drawings
图1为本发明提出的低相位噪声的双谐振腔噪声滤波压控振荡器的电路原理图。FIG. 1 is a circuit schematic diagram of a dual-resonator noise filtering voltage-controlled oscillator with low phase noise proposed by the present invention.
图2为本发明的双谐振腔噪声滤波压控振荡器中固定电容阵列结构图。FIG. 2 is a structural diagram of a fixed capacitor array in the dual-cavity noise filtering voltage-controlled oscillator of the present invention.
图3为采用二次谐波阻挡电路前后压控振荡器的ISF函数对比图。Figure 3 is a comparison diagram of the ISF function of the voltage-controlled oscillator before and after using the second harmonic blocking circuit.
图4为采用二次谐波阻挡电路前后压控振荡器的相位噪声对比图。Figure 4 is a comparison diagram of the phase noise of the voltage-controlled oscillator before and after the second harmonic blocking circuit is adopted.
具体实施方式Detailed ways
本发明提出的低相位噪声的双谐振腔噪声滤波压控振荡器,其电路原理图如图1所示,包括交叉耦合对管、固定电容阵列、可变电容阵列、源漏耦合变压器以及二次谐波阻挡电路;所述的固定电容阵列与可变电容阵列并联,固定电容阵列与可变电容阵列并联后的两端分别接在双谐振腔噪声滤波压控振荡器的输出结点,该输出结点即交叉耦合对管的漏极,同时该输出结点分别与源漏耦合变压器的外圈端口相接,源漏耦合变压器的源极与源漏耦合变压器的内圈端口相接,源漏耦合变压器的电压偏置抽头接电源,源漏耦合变压器的地抽头与二次谐波阻挡电路的一端相连接,二次谐波阻挡电路的另一端接地。The low-phase noise dual-resonator noise filtering voltage-controlled oscillator proposed by the present invention, its circuit schematic diagram is shown in Figure 1, including a cross-coupled pair tube, a fixed capacitor array, a variable capacitor array, a source-drain coupling transformer and a secondary A harmonic blocking circuit; the fixed capacitor array is connected in parallel with the variable capacitor array, and the two ends of the fixed capacitor array and the variable capacitor array connected in parallel are respectively connected to the output nodes of the double-resonator noise filtering voltage-controlled oscillator. The node is the drain of the cross-coupling pair tube. At the same time, the output node is connected to the outer ring port of the source-drain coupling transformer. The source of the source-drain coupling transformer is connected to the inner ring port of the source-drain coupling transformer. The voltage bias tap of the coupling transformer is connected to the power supply, the ground tap of the source-drain coupling transformer is connected to one end of the second harmonic blocking circuit, and the other end of the second harmonic blocking circuit is grounded.
上述双谐振腔噪声滤波压控振荡器中:In the above-mentioned dual-resonator noise filtering voltage-controlled oscillator:
所述的交叉耦合对管由两个对称的射频晶体管M1和M2组成,NMOS晶体管M1的栅极接源漏耦合变压器变压器外圈L1的输入节点p2,M1的漏极接变压器外圈L1的输入节点p1,NMOS晶体管M1的栅极接源漏耦合变压器内圈L2的输入节点p3;NMOS晶体管M2的栅极接源漏耦合变压器变压器外圈L1的输入节点p1,M2的漏极接源漏耦合变压器变压器外圈L1的输入节点p2,NMOS晶体管M2的栅极接源漏耦合变压器变压器内圈L2的输入节点p4,交叉耦合对管用来补偿电感电容谐振腔中的损耗以维持振荡;The cross-coupling pair tube is composed of two symmetrical radio frequency transistors M1 and M2. The gate of the NMOS transistor M1 is connected to the input node p2 of the outer ring L1 of the transformer transformer of the source-drain coupling, and the drain of M1 is connected to the input of the outer ring L1 of the transformer. Node p1, the gate of the NMOS transistor M1 is connected to the input node p3 of the inner ring L2 of the source-drain coupling transformer; the gate of the NMOS transistor M2 is connected to the input node p1 of the outer ring L1 of the source-drain coupling transformer transformer, and the drain of M2 is connected to the source-drain coupling The input node p2 of the outer ring L1 of the transformer transformer, the gate of the NMOS transistor M2 is connected to the input node p4 of the inner ring L2 of the transformer transformer of the source-drain coupling, and the cross-coupling pair tube is used to compensate the loss in the inductor-capacitor resonant cavity to maintain oscillation;
所述的固定电容阵列,其电路原理图如图2所示,由四个电容C1、C2、C3、C4,分别与四个电容C1、C2、C3、C4端接的四个电阻R1、R2、R3、R4,两个开关晶体管MC0和MC1,以及两个反相器F0和F1组成。电容C1与所述电阻R1的一端相连,电阻R1的另一端与反相器F0的输出端相连,反相器F0的输出端与电阻R2的一端相连,电阻R2的另一端与所述开关晶体管MC0的漏极相连,开关晶体管MC0的漏极同时与电阻R1的另一端相连;所述电容C3的一端与电阻R3的一端相连,电阻R3的另一端与反相器F1的输出端相连,反相器F1的输出端同时与电阻R4的一端相连,电阻R4的另一端与开关晶体管MC1的漏极相连,开关晶体管MC1的漏极同时与所述电阻R3的另一端相连;当从所述振荡器外部输入的数字控制信号c0=1时,所述电容C1的另一端和电容C2的另一端通过输入端口p1、p2接入双谐振腔噪声滤波压控振荡器的谐振腔;当数字控制信号c0=0时,电容C1的另一端和电容C2的另一端不接入谐振腔,当数字控制信号c1=1时,电容C3的另一端和电容C4的另一端通过源漏耦合变压器外部线圈的输入端口p2、p1接入谐振腔;当从所述振荡器外部输入的数字控制信号c1=0时,电容C3的另一端和电容C4的另一端不接入谐振腔,所述的固定电容阵列用于离散地调节振荡频率;The circuit schematic diagram of the fixed capacitor array is shown in Figure 2, consisting of four capacitors C1, C2, C3, C4, and four resistors R1, R2 terminated with the four capacitors C1, C2, C3, and C4 respectively. , R3, R4, two switching transistors MC0 and MC1, and two inverters F0 and F1. The capacitor C1 is connected to one end of the resistor R1, the other end of the resistor R1 is connected to the output end of the inverter F0, the output end of the inverter F0 is connected to one end of the resistor R2, and the other end of the resistor R2 is connected to the switching transistor. The drain of MC0 is connected to the drain of the switching transistor MC0, and the drain of the switching transistor MC0 is connected to the other end of the resistor R1 at the same time; one end of the capacitor C3 is connected to one end of the resistor R3, and the other end of the resistor R3 is connected to the output of the inverter F1. The output end of the phase device F1 is connected to one end of the resistor R4 at the same time, the other end of the resistor R4 is connected to the drain of the switching transistor MC1, and the drain of the switching transistor MC1 is connected to the other end of the resistor R3 at the same time; When the digital control signal c0=1 input from the outside of the device, the other end of the capacitor C1 and the other end of the capacitor C2 are connected to the resonant cavity of the dual-resonator noise filtering voltage-controlled oscillator through the input ports p1 and p2; when the digital control signal When c0=0, the other end of the capacitor C1 and the other end of the capacitor C2 are not connected to the resonant cavity. When the digital control signal c1=1, the other end of the capacitor C3 and the other end of the capacitor C4 pass through the source-drain coupling transformer external coil. The input ports p2 and p1 are connected to the resonant cavity; when the digital control signal c1=0 input from the outside of the oscillator, the other end of the capacitor C3 and the other end of the capacitor C4 are not connected to the resonant cavity, and the fixed capacitor array Used to discretely adjust the oscillation frequency;
所述的可变电容阵列,由变容管CV1、变容管CV2、变容管CV3和变容管CV4构成,其中变容管CV1的栅端接输入端口p1,变容管的体端接控制端网线1,变容管CV2的栅端接输入端口p2,变容管CV2的体端接控制端网线1,变容管CV3的栅端接输入端口p3,变容管CV3的体端接控制端网线1,变容管CV4的栅端接输入端口p4,变容管CV4的体端接控制端网线1。可变电容阵列用于连续地调节振荡频率;The variable capacitor array is composed of a varactor CV1, a varactor CV2, a varactor CV3 and a varactor CV4, wherein the gate end of the varactor CV1 is connected to the input port p1, and the body end of the varactor is connected to The control
所述源漏耦合变压器由65nm工艺中的极厚第九金属层绕线组成,包含6个端口:外圈L1的两个输出端口p1和p2分别与交叉耦合对管的射频晶体管M1和M2相连,内圈L2的两个输出端口p3和p4与交叉耦合对管的源极相连接,源漏耦合变压器的电压偏置抽头p5接电源,抽头地p6接地;所述源漏耦合变压器用于形成源漏同向的振荡波形;The source-drain coupling transformer is composed of a very thick ninth metal layer winding in a 65nm process, and includes 6 ports: the two output ports p1 and p2 of the outer ring L1 are respectively connected to the radio frequency transistors M1 and M2 of the cross-coupled pair of tubes. , the two output ports p3 and p4 of the inner ring L2 are connected to the source of the cross-coupled pair tube, the voltage bias tap p5 of the source-drain coupling transformer is connected to the power supply, and the tap ground p6 is grounded; the source-drain coupling transformer is used to form Oscillation waveform with the same direction of source and drain;
所述二次谐波阻挡电路,由谐振在载波频率二倍频的电感电容谐振腔Ls和Cs组成,电感电容谐振腔Ls与电感电容Cs并联,电感电容谐振腔Ls与电感电容Cs并联后的一端与源漏耦合变压器的抽头地p6相连接,电感电容谐振腔Ls与电感电容Cs并联后的一端另一端接地;所述二次谐波阻挡电路用于抑制振荡器中的二次谐波电流。The second harmonic blocking circuit is composed of inductor-capacitor resonant cavities Ls and Cs that resonate at twice the carrier frequency. One end is connected to the tap ground p6 of the source-drain coupling transformer, and the other end of the inductance-capacitor resonant cavity Ls is connected to the inductance-capacitor Cs in parallel, and the other end is grounded; the second harmonic blocking circuit is used to suppress the second harmonic current in the oscillator .
为使本发明的目的、技术方案和特点更加清楚明确,下面结合附图进行详细说明与描述:In order to make the purpose, technical scheme and characteristics of the present invention clearer and clearer, detailed description and description are carried out below in conjunction with the accompanying drawings:
如图1所示,本发明的低相位噪声的双谐振腔噪声滤波压控振荡器,由交叉耦合对管、固定电容阵列、可变电容阵列、源漏耦合变压器以及二次谐波阻挡电路组成。交叉耦合对管由两个对称的TSMC CMOS 65nm nmos_25ud18射频晶体管组成,其栅极和漏极分别通过金属连线连接到对方的漏极和栅极,用来补偿电感电容谐振腔中的损耗以维持振荡。固定电容阵列由2位数字码控制的电容组成,数字控制电容可以由外部数字控制码控制是否接入振荡器谐振腔,数字控制电容由外部数字控制码控制接入振荡器谐振腔的数量越多,则振荡频率越低。可变电容阵列由一对变容管组成,变容管是一种源漏为N型重掺杂,阱为N型轻掺杂的自反型的晶体管,其容值随着栅-体电压的增大而增大,变容管在振荡器中的接法是栅极接输出结点,体端接控制电压结点,故控制电压越大,栅-体电压越小,变容管接入谐振腔的电容越小,振荡频率越高。源漏耦合变压器由65nm工艺中的极厚第九属层绕线组成,包含6个端口:外圈的2个端口(p1、p2)接在耦合对管漏极,内圈的2个端口(p3、p4)接在耦合对管源极,1个抽头电压偏置点(p5),1个抽头地(p6);所述二次谐波阻挡电路由一个较小的谐振在载波频率二倍频的电感电容谐振腔(Ls、Cs)组成;所述二次谐波阻挡电路可以抑制振荡器中的二次谐波电流,从而抑制闪烁噪声上变频,提升相位噪声性能;具体连接方式如下:As shown in FIG. 1 , the low phase noise dual-resonator noise filtering voltage-controlled oscillator of the present invention is composed of a cross-coupled pair tube, a fixed capacitor array, a variable capacitor array, a source-drain coupling transformer and a second harmonic blocking circuit. . The cross-coupled transistor consists of two symmetrical TSMC CMOS 65nm nmos_25ud18 RF transistors, whose gates and drains are connected to each other's drains and gates through metal wires, respectively, to compensate for the loss in the inductor-capacitor resonant cavity to maintain oscillation. The fixed capacitor array is composed of capacitors controlled by a 2-digit digital code. The digital control capacitor can be controlled by an external digital control code to connect to the oscillator resonant cavity. The digital control capacitor is controlled by an external digital control code. , the lower the oscillation frequency. The variable capacitor array is composed of a pair of varactors. The varactor is a kind of reflex transistor whose source and drain are N-type heavily doped and the well is N-type lightly doped. Its capacitance varies with the gate-to-body voltage. The connection method of the varactor in the oscillator is that the gate is connected to the output node, and the body terminal is connected to the control voltage node. Therefore, the greater the control voltage, the smaller the gate-to-body voltage, and the varactor is connected to The smaller the capacitance into the resonant cavity, the higher the oscillation frequency. The source-drain coupling transformer is composed of a very thick ninth metal layer winding in the 65nm process, and includes 6 ports: the 2 ports (p1, p2) of the outer ring are connected to the drain of the coupled pair of tubes, and the 2 ports of the inner ring ( p3, p4) are connected to the source of the coupled pair of tubes, 1 tap voltage bias point (p5), 1 tap ground (p6); the second harmonic blocking circuit is doubled by a smaller resonance at the carrier frequency The second harmonic blocking circuit can suppress the second harmonic current in the oscillator, thereby suppressing the up-conversion of flicker noise and improving the phase noise performance; the specific connection methods are as follows:
图1所示的交叉耦合对管,由晶体管M1、M2构成,其中晶体管M1、M2是NMOS晶体管。NMOS晶体管M1的栅极接变压器外圈L1的输入节点p2,M1的漏极接变压器外圈L1的输入节点p1,NMOS晶体管M1的栅极接变压器内圈L2的输入节点p3;NMOS晶体管M2的栅极接变压器外圈L1的输入节点p1,M2的漏极接变压器外圈L1的输入节点p2,NMOS晶体管M2的栅极接变压器内圈L2的输入节点p4。图1所示的可变电容阵列,由变容管CV1、CV2、CV3、CV4构成,其中变容管CV1栅端接p1,体端接控制端网线1;变容管CV2栅端接p2,体端接控制端网线1;变容管CV3栅端接p3,体端接控制端网线1;变容管CV4栅端接p4,体端接控制端网线1。图1所示固定电容阵列在图2中详细示出。The cross-coupled pair transistor shown in FIG. 1 is composed of transistors M1 and M2, wherein the transistors M1 and M2 are NMOS transistors. The gate of the NMOS transistor M1 is connected to the input node p2 of the transformer outer ring L1, the drain of M1 is connected to the input node p1 of the transformer outer ring L1, the gate of the NMOS transistor M1 is connected to the input node p3 of the transformer inner ring L2; The gate is connected to the input node p1 of the transformer outer ring L1, the drain of M2 is connected to the input node p2 of the transformer outer ring L1, and the gate of the NMOS transistor M2 is connected to the input node p4 of the transformer inner ring L2. The variable capacitor array shown in Figure 1 is composed of varactors CV1, CV2, CV3, and CV4. The gate terminal of the varactor CV1 is connected to p1, and the body terminal is connected to the
图2所示的固定电容阵列,由电容C1、C2、C3、C4,分别与它们端接的4个电阻R1、R2、R3、R4,两个开关晶体管MC0和MC1,以及两个反相器F0和F1组成;所述电容C1与所述电阻R1相连,所述电阻R1与所述反相器F0输出端相连,所述反相器F0输出端与电阻R2相连,所述电阻R2与所述开关晶体管MC0相连,所述开关晶体管MC0与所述电阻R1相连;所述电容C3与所述电阻R3相连,所述电阻R3与所述反相器F1输出端相连,所述反相器F1输出端与电阻R4相连,所述电阻R4与所述开关晶体管MC1相连,所述开关晶体管MC1与所述电阻R3相连;当从所述振荡器外部输入的数字控制信号c0=1时,所述电容C1和电容C2通过输入端口p1、p2接入双谐振腔噪声滤波压控振荡器的谐振腔;当数字控制信号c0=0时,所述电容C1和电容C2不接入谐振腔,当数字控制信号c1=1时,电容C3和电容C4通过输入端口p1、p2接入谐振腔;当从所述振荡器外部输入的数字控制信号c1=0时,所在的电容C3和电容C4不接入谐振腔;所述固定电容阵列用于离散地调节振荡频率;The fixed capacitor array shown in Figure 2 consists of capacitors C1, C2, C3, and C4, four resistors R1, R2, R3, and R4 that are respectively terminated with them, two switching transistors MC0 and MC1, and two inverters Formed by F0 and F1; the capacitor C1 is connected to the resistor R1, the resistor R1 is connected to the output end of the inverter F0, the output end of the inverter F0 is connected to the resistor R2, and the resistor R2 is connected to the The switch transistor MC0 is connected to the switch transistor MC0, and the switch transistor MC0 is connected to the resistor R1; the capacitor C3 is connected to the resistor R3, the resistor R3 is connected to the output end of the inverter F1, and the inverter F1 The output terminal is connected to the resistor R4, the resistor R4 is connected to the switching transistor MC1, and the switching transistor MC1 is connected to the resistor R3; when the digital control signal c0=1 input from the outside of the oscillator, the The capacitor C1 and the capacitor C2 are connected to the resonant cavity of the dual-resonator noise filtering voltage-controlled oscillator through the input ports p1 and p2; when the digital control signal c0=0, the capacitor C1 and the capacitor C2 are not connected to the resonant cavity. When the control signal c1=1, the capacitor C3 and the capacitor C4 are connected to the resonant cavity through the input ports p1 and p2; when the digital control signal c1=0 input from the outside of the oscillator, the capacitor C3 and the capacitor C4 are not connected a resonant cavity; the fixed capacitance array is used for discretely adjusting the oscillation frequency;
图1所示源漏耦合变压器由65nm工艺中的极厚第九金属层绕线组成,包含6个端口:外圈的2个端口(p1、p2)接在耦合对管漏极,内圈的2个端口(p3、p4)接在耦合对管源极,1个抽头电压偏置点(p5),1个抽头地(p6);其中两个线圈的耦合系数k的取值范围为0.4~0.3。The source-drain coupling transformer shown in Figure 1 is composed of a very thick ninth metal layer winding in the 65nm process, and includes 6 ports: the 2 ports (p1, p2) of the outer ring are connected to the drain of the coupling pair tube, and the
图1所示二次谐波阻挡电路,由一个较小的谐振在载波频率二倍频的电感电容谐振腔(Ls、Cs)组成;Ls、Cs并联,一端接p6端口,另一端接地;所述二次谐波阻挡电路可以抑制振荡器中的二次谐波电流,从而抑制闪烁噪声上变频,提升相位噪声性能。The second harmonic blocking circuit shown in Figure 1 is composed of a small inductance-capacitor resonant cavity (Ls, Cs) that resonates at twice the carrier frequency; Ls and Cs are connected in parallel, one end is connected to the p6 port, and the other end is grounded; The second harmonic blocking circuit can suppress the second harmonic current in the oscillator, thereby suppressing the up-conversion of flicker noise and improving the phase noise performance.
本发明的一个实施例中,采用65nm CMOS工艺(为本技术领域的常规制备工艺)制备低相位噪声的双谐振腔噪声滤波压控振荡器电路,其仿真结果由图3、图4给出。其中,图3为采用二次谐波阻挡电路前后压控振荡器的ISF函数对比图,采用后可见ISF函数整体出现下降,其平均值亦出现下降根据脉冲敏感函数理论,其闪烁噪声上变频为相位噪声的程度应减弱,这可以由图4加以验证;图4为采用二次谐波阻挡电路前后压控振荡器的相位噪声对比图,采用二次谐波阻挡电路后相位噪声水平出现下降。从图3和图4中可以看出,本发明提出的压控振荡器电路可提升传统压控振荡器电路的相位噪声性能。In an embodiment of the present invention, a 65nm CMOS process (which is a conventional manufacturing process in the technical field) is used to prepare a dual-resonator noise filtering voltage-controlled oscillator circuit with low phase noise. The simulation results are shown in FIG. 3 and FIG. 4 . Among them, Figure 3 is a comparison diagram of the ISF function of the voltage-controlled oscillator before and after using the second harmonic blocking circuit. After the use of the second harmonic blocking circuit, it can be seen that the ISF function decreases as a whole, and its average value also decreases. The degree of phase noise should be reduced, which can be verified by Figure 4; Figure 4 is a comparison chart of the phase noise of the VCO before and after using the second harmonic blocking circuit. The phase noise level decreases after the second harmonic blocking circuit is used. It can be seen from FIG. 3 and FIG. 4 that the voltage-controlled oscillator circuit proposed by the present invention can improve the phase noise performance of the conventional voltage-controlled oscillator circuit.
以上实施例验证了本发明的正确性和实效性。以上所述仅为本发明在具体CMOS工艺下与具体频段下的低相位噪声电容电感压控振荡器,但并非用于限定本发明的保护范围。The above embodiments verify the correctness and effectiveness of the present invention. The above description is only the low phase noise capacitor inductance voltage controlled oscillator of the present invention under a specific CMOS process and a specific frequency band, but is not intended to limit the protection scope of the present invention.
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CN113381727A (en) * | 2021-05-25 | 2021-09-10 | 电子科技大学 | Active filter chip with reconfigurable order, center frequency and bandwidth |
WO2023221276A1 (en) * | 2022-05-17 | 2023-11-23 | 浙江大学 | Flip-flop complementary low-noise voltage-controlled oscillator capable of reducing up-conversion of flicker noise |
US12057810B2 (en) | 2022-05-17 | 2024-08-06 | Zhejiang University | Voltage controlled oscillator for flipped and complementary low noise |
CN115549587A (en) * | 2022-09-02 | 2022-12-30 | 电子科技大学 | Low-temperature voltage-controlled oscillator circuit with low flicker noise, chip and quantum measurement and control system |
CN115549587B (en) * | 2022-09-02 | 2024-04-02 | 电子科技大学 | Low-temperature voltage-controlled oscillator circuit with low flicker noise, chip and quantum measurement and control system |
CN115833751A (en) * | 2022-11-24 | 2023-03-21 | 泛升云微电子(苏州)有限公司 | Inductance and capacitance type VCO circuit |
CN117081504A (en) * | 2023-09-01 | 2023-11-17 | 香港中文大学(深圳) | A harmonic oscillator that realizes harmonic tuning based on harmonic current selection |
CN117081504B (en) * | 2023-09-01 | 2024-04-05 | 香港中文大学(深圳) | A harmonic oscillator based on harmonic current selection to achieve harmonic tuning |
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