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CN214539915U - Digital quantity input state self-checking circuit - Google Patents

Digital quantity input state self-checking circuit Download PDF

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CN214539915U
CN214539915U CN202023201328.XU CN202023201328U CN214539915U CN 214539915 U CN214539915 U CN 214539915U CN 202023201328 U CN202023201328 U CN 202023201328U CN 214539915 U CN214539915 U CN 214539915U
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electrically connected
digital input
frequency signal
signal
circuit
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刘培超
刘主福
郝计军
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Shenzhen Yuejiang Technology Co Ltd
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Shenzhen Yuejiang Technology Co Ltd
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Abstract

本实用新型公开一种数字量输入状态自检电路,用于检测急停元件的短接状态,所述急停元件上具有两个信号输出端和一个公共端,该数字量输入状态自检电路包括两个数字量输入电路和两个第一频率信号注入电路,两个所述数字量输入电路的输入端分别与两个所述信号输出端一一对应电连接,两个所述数字量输入电路的回路端分别通过两个所述第一频率信号注入电路与所述公共端电连接。本实用新型有利于自动判断急停元件的两个信号输出端是否短接。

Figure 202023201328

The utility model discloses a digital input state self-check circuit, which is used for detecting the short-circuit state of an emergency stop element. The emergency stop element is provided with two signal output ends and a common end. The digital input state self-check circuit It includes two digital input circuits and two first frequency signal injection circuits, the input ends of the two digital input circuits are respectively electrically connected with the two signal output ends in a one-to-one correspondence, and the two digital inputs The loop ends of the circuits are respectively electrically connected to the common terminal through the two first frequency signal injection circuits. The utility model is favorable for automatically judging whether the two signal output ends of the emergency stop element are short-circuited.

Figure 202023201328

Description

Digital quantity input state self-checking circuit
Technical Field
The utility model relates to a digital quantity input technical field, concretely relates to digital quantity input state self-checking circuit.
Background
The existing digital quantity input technology is mainly simple in optical coupling type input, has no detection and error judgment functions, and as shown in fig. 1, after an emergency stop switch is connected, the existing digital quantity input technology cannot process failure modes such as two-path signal short circuit (namely, short circuit of a point B and a point D of the emergency stop switch), so that the existing digital quantity input technology has high circuit limitation, cannot meet more detection requirements, and cannot detect the coverage rate of component failure.
SUMMERY OF THE UTILITY MODEL
A primary object of the present invention is to provide a digital input status self-checking circuit to solve the technical problem in the background art.
In order to achieve the above object, the utility model provides a digital quantity input state self-checking circuit for detect the short circuit state of scram component, two signal output part and a common port have on the scram component, digital quantity input state self-checking circuit includes two digital quantity input circuit and two first frequency signal injection circuit, two digital quantity input circuit's input respectively with two the signal output part one-to-one electricity is connected, two digital quantity input circuit's return circuit end is respectively through two first frequency signal injection circuit with the common port electricity is connected.
Wherein the emergency stop element is a 2NC type emergency stop switch.
The first frequency signal injection circuit comprises a switch module, and the switch module is respectively electrically connected with the loop end of the digital quantity input circuit and the public end.
The first frequency signal injection circuit further comprises a processing module electrically connected with the switch module.
The switching module comprises an optical coupler and a triode, wherein the anode of the optical coupler is electrically connected with the processing module, the cathode of the optical coupler is grounded, the emitter of the optical coupler is electrically connected with the base of the triode, and the collector of the optical coupler is a voltage input end; and the collector of the triode is electrically connected with the loop end of the digital quantity input circuit, and the emitter of the triode is electrically connected with the public end.
The processing module comprises a signal buffer with five pins, and a first pin on the signal buffer is empty; a second pin on the signal buffer is a control signal input end and is grounded through a first resistor; a fourth pin on the signal buffer is electrically connected with the anode of the optical coupler, and the fourth pin on the signal buffer is also electrically connected with a second resistor; a third pin on the signal buffer is grounded; and a fifth pin on the signal buffer is a voltage input end.
The first frequency signal injection circuit further comprises a third resistor, and an emitter of the optical coupler is electrically connected with a base of the triode through the third resistor.
The first frequency signal injection circuit further comprises a fourth resistor, and two ends of the fourth resistor are respectively and electrically connected with the base electrode of the triode and the common end.
Wherein the switch module is a relay.
The digital quantity input state self-checking circuit further comprises two second frequency signal injection circuits, and the two second frequency signal injection circuits are electrically connected with the two signal input ends in a one-to-one correspondence mode.
The embodiment of the utility model provides a digital quantity input state self-checking circuit, through two different frequency signal of first frequency signal injection circuit input and to scram component input other frequency signal, then through obtaining the frequency signal of two digital quantity input circuit outputs and comparing, if two frequency signal are different then represent scram component two signal output ends do not have the short circuit phenomenon, otherwise then there is the short circuit phenomenon to can judge automatically whether short circuit of two signal output ends of scram component.
Drawings
FIG. 1 is a schematic diagram of a conventional digital input circuit connected to an emergency stop switch;
fig. 2 is a schematic circuit diagram of an embodiment of a digital quantity input state self-checking circuit according to the present invention;
FIG. 3 is a schematic diagram of the digital input circuit shown in FIG. 2;
FIG. 4 is a schematic diagram of the first frequency signal injection circuit shown in FIG. 2;
fig. 5 is a schematic circuit diagram of another embodiment of the digital quantity input state self-checking circuit of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary and intended to be used for explaining the present invention, and should not be construed as limiting the present invention, and all other embodiments obtained by those skilled in the art without creative efforts based on the embodiments of the present invention belong to the protection scope of the present invention.
The utility model provides a digital quantity input state self-checking circuit, as shown in fig. 2, a short circuit state for detecting emergency stop component 10, two signal output part and a common port have on the emergency stop component 10, digital quantity input state self-checking circuit includes two digital quantity input circuit 20 and two first frequency signal injection circuit 30, two digital quantity input circuit 20's input is connected with two signal output part one-to-one electricity respectively, two digital quantity input circuit 20's return circuit end is connected with the common port (being 0VDC) electricity through two first frequency signal injection circuit 30 respectively.
In the present embodiment, both the scram component 10 and the digital input circuit 20 can be arranged according to the existing form, for example, the digital input circuit 20 can be arranged according to the manner shown in fig. 3. The input end of the digital input circuit 20 is the anode of the optical coupler ISO83, and the loop end of the digital input circuit 20 is the cathode of the optical coupler ISO 83. The main improvement point of the present solution is that two first frequency signal injection circuits 30 are added, which are electrically connected to the two digital input circuits 20, respectively, and specifically, the first frequency signal injection circuits 30 are electrically connected to the digital input circuits 20 and the common terminal of the emergency stop component 10, respectively. At this time, the two first frequency signal injection circuits 30 are respectively used for inputting different frequency signals. Among them, the scram element 10 is preferably a 2NC type scram switch. In this embodiment, different frequency signals are input through the two first frequency signal injection circuits 30 and another frequency signal is input into the emergency stop element 10, then signal data output by the two digital input circuits 20 are obtained and compared, if the two signal data are different, it represents that the two signal output and output ends of the emergency stop element 10 are not short-circuited, otherwise, a short-circuit phenomenon exists, and thus, whether the two signal output ends of the emergency stop element 10 are short-circuited can be automatically determined.
In a preferred embodiment, as shown in fig. 4, the first frequency signal injection circuit 30 includes a switch module 31, and the switch module 31 is electrically connected to the loop terminal and the common terminal of the digital input circuit 20, respectively. The switch module 31 may be an existing MOS transistor, a transistor Q46, a relay, etc., and different frequency signals may be injected by turning on and off the switch module 31.
In a preferred embodiment, as shown in fig. 4, the first frequency signal injection circuit 30 further preferably includes a processing module 32 electrically connected to the switch module 31, so as to control the frequency of on/off of the switch module 31 by the processing module 32, thereby controlling the input of different frequency signals.
In a preferred embodiment, as shown in fig. 5, it is preferable that the switching module 31 includes an optocoupler ISO84 and a transistor Q46, an anode of the optocoupler ISO84 is electrically connected to the processing module 32, a cathode of the optocoupler ISO84 is grounded, an emitter of the optocoupler ISO84 is electrically connected to a base of the transistor Q46, and a collector of the optocoupler ISO84 is a voltage input terminal; the collector of the transistor Q46 is electrically connected to the loop terminal of the digital input circuit 20, and the emitter of the transistor Q46 is electrically connected to the common terminal. The voltage of the collector input of the optocoupler ISO84 is 24V. In this embodiment, the processing module 32 controls the on/off of the transistor Q46 through the optical coupler ISO84, so as to control the frequency signal injected into the digital input circuit 20.
In a preferred embodiment, as shown in FIG. 5, the preferred processing module 32 includes a signal buffer U147 having five pins, with a first pin on the signal buffer U147 being left empty; a second pin on the signal buffer U147 is a control signal input end, and the second pin on the signal buffer U147 is further grounded through a first resistor R1126; a fourth pin on the signal buffer U147 is electrically connected with the anode of the optical coupler ISO84, and the fourth pin on the signal buffer U147 is also electrically connected with a second resistor; a third pin on the signal buffer U147 is grounded; the fifth pin on the signal buffer U147 is a voltage input terminal. The second pin is used for being electrically connected with an upper computer, such as a computer or an MCU, the resistance value of the first resistor R1126 is 4.7K omega, the first resistor R1126 is used for giving a stable level to the second pin of the signal buffer U147 before the system is started and reaches a steady state, misoperation cannot be caused, the resistance value of the second resistor R1125 is 330 omega, the second resistor R1125 is also electrically connected with an external 3.3V power supply, the second resistor R1125 is used for ensuring that the optical coupler ISO84 is in a working state when no signal is output by the signal buffer U147, and the voltage input by the fifth pin is 3.3V.
In a preferred embodiment, as shown in fig. 5, the first frequency signal injection circuit 30 further preferably includes a third resistor R1127, and the emitter of the optocoupler ISO84 is electrically connected to the base of the transistor Q46 through the third resistor R1127. The resistance value of the third resistor R1127 is 12K Ω, which is used to limit the current between the base and the emitter of the transistor Q46, and avoid damage.
In a preferred embodiment, as shown in fig. 5, the first frequency signal injection circuit 30 further preferably includes a fourth resistor R1128, and two ends of the fourth resistor R1128 are electrically connected to the base and the common terminal of the transistor Q46, respectively. The fourth resistor R1128 has a resistance of 10K Ω, and is configured to quickly drain the base charge of the transistor Q46 when the output of the optocoupler ISO84 changes from high to low, so that the transistor Q46 is quickly turned off.
In a preferred embodiment, the emergency stop component 10 further has two signal input terminals, and the digital input status self-checking circuit further includes two second frequency signal injection circuits, and the two second frequency signal injection circuits are electrically connected to the two signal input terminals in a one-to-one correspondence manner. The specific structure of the second frequency signal injection circuit may be arranged with reference to the first frequency signal injection circuit 30, which will not be described in detail herein, and the specific difference is that two second frequency signal injection circuits are electrically connected to the signal input terminal of the emergency stop component 10, so as to detect whether there is a short circuit between the two signal input terminals of the emergency stop component 10 by injecting different frequency signals and according to the frequency signals output by the two digital quantity input circuits 20.
The utility model discloses in, the mode of the concrete self-checking of above-mentioned digital quantity input state self-checking circuit refers to following step:
injecting a first frequency signal into an input end of the emergency stop element 10;
injecting a second frequency signal and a third frequency signal with different frequencies into the loop ends of the two digital quantity input circuits 20 through the two first frequency signal injection circuits 30;
respectively acquiring and comparing signal data output by the output ends of the two digital quantity input circuits 20;
and judging the short-circuit state of the emergency stop element 10 according to the comparison result.
Specifically, the first frequency signal injected into the input end of the emergency stop element 10 is preferably a frequency signal of a pulse signal, and the second frequency signal and the third frequency signal injected into the loop end of the two digital input circuits 20 preferably adopt a specific signal frequency injection technique, so that the two digital input circuits 20 can respectively output signal data, and under a normal condition (that is, the two signal output ends of the emergency stop element 10 are not short-circuited), the two signal data are respectively the first frequency signal + the second frequency signal and the first frequency signal + the third frequency signal, and the two data signals are in an unequal state, and if under an abnormal condition (that is, the two signal output ends of the emergency stop element 10 are short circuited), the two data signals are in an equal state, so that the short-circuited state of the two signal output ends of the emergency stop element 10 can be automatically determined.
The above is only the part or the preferred embodiment of the present invention, no matter the characters or the drawings can not limit the protection scope of the present invention, all under the whole concept of the present invention, the equivalent structure transformation performed by the contents of the specification and the drawings is utilized, or the direct/indirect application in other related technical fields is included in the protection scope of the present invention.

Claims (10)

1.一种数字量输入状态自检电路,用于检测急停元件的短接状态,所述急停元件上具有两个信号输出端和一个公共端,其特征在于,所述数字量输入状态自检电路包括两个数字量输入电路和两个第一频率信号注入电路,两个所述数字量输入电路的输入端分别与两个所述信号输出端一一对应电连接,两个所述数字量输入电路的回路端分别通过两个所述第一频率信号注入电路与所述公共端电连接。1. A digital input state self-check circuit for detecting the short-circuit state of an emergency stop element, which has two signal output ends and a common end, characterized in that the digital input state The self-checking circuit includes two digital input circuits and two first frequency signal injection circuits. The loop ends of the digital input circuit are respectively electrically connected to the common end through the two first frequency signal injection circuits. 2.根据权利要求1所述的数字量输入状态自检电路,其特征在于,所述急停元件为2NC型式急停开关。2 . The digital input state self-checking circuit according to claim 1 , wherein the emergency stop element is a 2NC type emergency stop switch. 3 . 3.根据权利要求1所述的数字量输入状态自检电路,其特征在于,所述第一频率信号注入电路包括开关模块,所述开关模块分别与所述数字量输入电路的回路端和所述公共端电连接。3 . The digital input state self-checking circuit according to claim 1 , wherein the first frequency signal injection circuit comprises a switch module, and the switch module is respectively connected with the loop end of the digital input circuit and the The common terminal is electrically connected. 4.根据权利要求3所述的数字量输入状态自检电路,其特征在于,所述第一频率信号注入电路还包括与所述开关模块电连接的处理模块。4 . The digital input state self-checking circuit according to claim 3 , wherein the first frequency signal injection circuit further comprises a processing module electrically connected to the switch module. 5 . 5.根据权利要求4所述的数字量输入状态自检电路,其特征在于,所述开关模块包括光耦合器和三极管,所述光耦合器的阳极与所述处理模块电连接,所述光耦合器的阴极接地处理,所述光耦合器的发射极与所述三极管的基极电连接,所述光耦合器的集电极为电压输入端;所述三极管的集电极与所述数字量输入电路的回路端电连接,所述三极管的发射极与所述公共端电连接。5 . The digital input state self-checking circuit according to claim 4 , wherein the switch module comprises an optocoupler and a triode, the anode of the optocoupler is electrically connected to the processing module, and the optocoupler is electrically connected to the processing module. 6 . The cathode of the coupler is grounded, the emitter of the optocoupler is electrically connected to the base of the triode, the collector of the optocoupler is the voltage input terminal; the collector of the triode is connected to the digital input The loop terminal of the circuit is electrically connected, and the emitter of the triode is electrically connected to the common terminal. 6.根据权利要求5所述的数字量输入状态自检电路,其特征在于,所述处理模块包括具有五个针脚的信号缓冲器,所述信号缓冲器上的第一针脚空置;所述信号缓冲器上的第二针脚为控制信号输入端,且所述信号缓冲器上的第二针脚还通过第一电阻接地处理;所述信号缓冲器上的第四针脚与所述光耦合器的阳极电连接,且所述信号缓冲器上的第四针脚还电连接有第二电阻;所述信号缓冲器上的第三针脚接地处理;所述信号缓冲器上的第五针脚为电压输入端。6 . The digital input state self-checking circuit according to claim 5 , wherein the processing module comprises a signal buffer with five pins, and the first pin on the signal buffer is empty; the signal The second pin on the buffer is the control signal input end, and the second pin on the signal buffer is also grounded through the first resistor; the fourth pin on the signal buffer is connected to the anode of the optocoupler The fourth pin on the signal buffer is also electrically connected with a second resistor; the third pin on the signal buffer is grounded; the fifth pin on the signal buffer is a voltage input terminal. 7.根据权利要求6所述的数字量输入状态自检电路,其特征在于,所述第一频率信号注入电路还包括第三电阻,所述光耦合器的发射极通过所述第三电阻与所述三极管的基极电连接。7 . The digital input state self-checking circuit according to claim 6 , wherein the first frequency signal injection circuit further comprises a third resistor, and the emitter of the optocoupler is connected with the third resistor through the third resistor. 8 . The bases of the triodes are electrically connected. 8.根据权利要求5所述的数字量输入状态自检电路,其特征在于,所述第一频率信号注入电路还包括第四电阻,所述第四电阻的两端分别电连接所述三极管的基极和所述公共端。8 . The digital input state self-checking circuit according to claim 5 , wherein the first frequency signal injection circuit further comprises a fourth resistor, and two ends of the fourth resistor are respectively electrically connected to the transistors. 9 . base and the common terminal. 9.根据权利要求3所述的数字量输入状态自检电路,其特征在于,所述开关模块为继电器。9 . The digital input state self-checking circuit according to claim 3 , wherein the switch module is a relay. 10 . 10.根据权利要求2所述的数字量输入状态自检电路,其特征在于,所述急停元件上还具有两个信号输入端,所述数字量输入状态自检电路还包括两个第二频率信号注入电路,两个所述第二频率信号注入电路分别与两个所述信号输入端一一对应电连接。10. The digital input state self-checking circuit according to claim 2, wherein the emergency stop element further has two signal input terminals, and the digital input state self-checking circuit further comprises two second signal input terminals. A frequency signal injection circuit, the two second frequency signal injection circuits are respectively electrically connected to the two signal input terminals in a one-to-one correspondence.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112731134A (en) * 2020-12-25 2021-04-30 深圳市越疆科技有限公司 Digital quantity input state self-checking circuit, method, device and readable storage medium

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112731134A (en) * 2020-12-25 2021-04-30 深圳市越疆科技有限公司 Digital quantity input state self-checking circuit, method, device and readable storage medium

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