CN209964335U - Drive circuit, LED drive system and linear control circuit - Google Patents

Abstract

The utility model provides an electronic device's drive circuit, include: a transistor connected in series with the electronic device; and a control circuit, the control circuit comprising: the voltage sampling circuit is coupled with a bus direct-current power supply or a common node of the transistor and the driving circuit; the first input end of the computing circuit is coupled with the output end of the voltage sampling circuit, and the second input end of the computing circuit is coupled with the first reference signal; and a first regulating circuit, wherein the first input end is coupled with the current sampling circuit, the second input end is coupled with the output end of the calculating circuit, and the output end is coupled with the control end of the transistor. The utility model provides a drive circuit, LED actuating system and linear control circuit have higher efficiency, have higher reliability concurrently simultaneously.

Description

Drive circuit, LED drive system and linear control circuit

Technical Field

The utility model relates to an electron field, concretely relates to electronic device's drive circuit, LED actuating system and linear control circuit.

Background

Linear drive circuits are common drive circuits for Light Emitting Diodes (LEDs). The linear driving circuit controls the current flowing through the LED to achieve the control of illumination. The linear drive circuit achieves a current control effect by controlling the state of a transistor in series with the LED. On the other hand, the linear drive circuit is powered by a bus voltage that rectifies the mains alternating current. In order to achieve current equalization, the voltage across the LED tends to be relatively constant, which causes the remaining voltage difference of the bus voltage to be consumed by the linear driving circuit, which causes a large power loss. Therefore, there is a need for an improved linear driving circuit. However, the improved circuit also brings other problems, such as reduced system reliability.

SUMMERY OF THE UTILITY MODEL

To one or more problems in the prior art, an object of the present invention is to provide a driving circuit, a LED driving system and a linear control circuit of an electronic device.

According to an aspect of the present invention, there is provided a driving circuit of an electronic device, which is connected in series with the electronic device, wherein the electronic device and the driving circuit connected in series are coupled between a dc power supply and a reference ground, and the driving circuit includes: a transistor connected in series with the electronic device; and a control circuit, wherein the control circuit comprises: the input end of the voltage sampling circuit is coupled with a bus direct-current power supply or a common node of the driving circuit and the electronic device; the computing circuit is provided with a first input end, a second input end and an output end, wherein the first input end of the computing circuit is coupled with the output end of the voltage sampling circuit, and the second input end of the computing circuit is coupled with the first reference signal; and the first regulating circuit is provided with a first input end, a second input end and an output end, wherein the first input end of the first regulating circuit is coupled with the current sampling circuit, the second input end of the first regulating circuit is coupled with the output end of the calculating circuit, and the output end of the first regulating circuit is coupled with the control end of the transistor.

In one embodiment, the control circuit further comprises a second regulating circuit having a first input terminal coupled to the current sampling circuit, a second input terminal coupled to the threshold signal, and an output terminal coupled to the control terminal of the transistor.

In one embodiment, the transistor comprises a first transistor and a second transistor coupled in parallel, wherein an output terminal of the first regulating circuit is coupled to a control terminal of the first transistor, and an output terminal of the second regulating circuit is coupled to a control terminal of the second transistor.

In one embodiment, the threshold signal is less than the first reference signal.

In one embodiment, the calculation circuit includes a subtraction circuit, a subtracted input terminal of the subtraction circuit is coupled to the first reference signal, a subtracted input terminal of the subtraction circuit is coupled to an output terminal of the voltage sampling circuit, and an output terminal of the subtraction circuit is coupled to the second input terminal of the first adjustment circuit.

In one embodiment, the control circuit further comprises a logic circuit, a first input terminal of the logic circuit is coupled to the output terminal of the first regulating circuit, a second input terminal of the logic circuit is coupled to the output terminal of the second regulating circuit, and an output terminal of the logic circuit is coupled to the control terminal of the transistor.

In one embodiment, the driving circuit further includes a driving stage circuit having an input terminal and an output terminal, wherein the input terminal of the driving stage circuit is coupled to the output terminal of the first adjusting circuit, and the output terminal of the driving stage circuit is coupled to the control terminal of the transistor.

According to another aspect of the present invention, there is provided a LED driving system, comprising a thyristor dimmer, a rectifier circuit, a LED load and a driving circuit as described in any of the above embodiments.

According to a further aspect of the present invention, there is provided a linear control circuit for driving a transistor, wherein the transistor is connected in series with a load, the control circuit comprising: the input end of the voltage sampling circuit is coupled with any node of the transistor or the load, and the output end of the voltage sampling circuit provides a voltage sampling signal; the first input end of the current waveform control circuit is coupled with the voltage sampling circuit, the second input end of the current waveform control circuit is coupled with the current sampling circuit, and the output end of the current waveform control circuit is coupled with the control end of the transistor; and the input end of the current maintaining circuit is coupled with the current sampling circuit, the output end of the current maintaining circuit is coupled with the control end of the transistor, and the current maintaining circuit controls the valley value of the output current to be above a preset minimum value based on the output current sampling signal.

In one embodiment, a current waveform control circuit includes: a reference signal generating circuit, an output end of which provides a first reference signal;

the computing circuit is provided with a first input end, a second input end and an output end, wherein the first input end of the computing circuit is coupled with the output end of the voltage sampling circuit, and the second input end of the computing circuit is coupled with the output end of the reference signal generating circuit; and the first regulating circuit is provided with a first input end, a second input end and an output end, wherein the first input end of the first regulating circuit is coupled with the current sampling resistor, the second input end of the first regulating circuit is coupled with the output end of the calculating circuit, and the output end of the first regulating circuit is coupled with the control end of the transistor.

The utility model provides a drive circuit, LED actuating system and linear control circuit have higher efficiency, have higher reliability concurrently simultaneously.

Drawings

Fig. 1 shows a schematic diagram of an LED driving system according to an embodiment of the present invention;

fig. 2 shows a schematic diagram of bus voltage and output current waveforms according to an embodiment of the present invention;

fig. 3 shows a signal waveform diagram referring to the circuit of fig. 1 according to an embodiment of the present invention;

fig. 4 shows a schematic diagram of an LED driving system according to an embodiment of the present invention;

fig. 5 shows a schematic signal waveform diagram corresponding to the embodiment of fig. 4, according to an embodiment of the present invention;

fig. 6 shows a schematic diagram of an LED driving system according to an embodiment of the present invention;

fig. 7 shows a schematic diagram of an LED driving system according to an embodiment of the present invention;

fig. 8 is a schematic diagram illustrating a flow chart of a method for controlling LED current according to an embodiment of the present invention.

The same reference numbers in different drawings identify the same or similar elements or components.

Detailed Description

For further understanding of the present invention, preferred embodiments of the present invention will be described below with reference to examples, but it should be understood that these descriptions are only for the purpose of further illustrating the features and advantages of the present invention, and are not intended to limit the claims of the present invention.

The description in this section is for exemplary embodiments only, and the present invention is not limited to the scope of the embodiments described. Combinations of different embodiments, or technical features of different embodiments, or similar prior art means, or technical features of embodiments, may be substituted for each other within the scope of the present invention.

"coupled" in this specification includes direct connection and also includes indirect connection, such as connection through an electrically conductive medium, such as a conductor, where the electrically conductive medium may include parasitic inductance or parasitic capacitance. But also may include connections through other active or passive devices, such as through switches, follower circuits, etc., that are known to those skilled in the art for achieving the same or similar functional objectives.

Fig. 1 shows a schematic diagram of an LED driving system according to an embodiment of the present invention. The LED driving system comprises a silicon controlled rectifier dimmer 13, a rectifying and filtering circuit 14, an LED 12 and a linear driving circuit 11. The thyristor dimmer 13 chops an ac signal, such as typically mains ac, by conducting in stages, regulating the energy supplied to subsequent circuits. The rectifying and filtering circuit 14 is used for rectifying and filtering the alternating current signal to generate a bus voltage Vbus. The bus voltage Vbus may be considered a bus dc supply. The filter capacitor of the rectifying-filtering circuit 14 only performs a limited filtering function, and in one embodiment, no filter capacitor is even used at the rear end of the rectifying circuit, so the waveform of the bus voltage Vbus is generally a steamed bun waveform as shown in fig. 5. The load LED 12 is connected in series with the linear driving circuit 11, wherein an anode terminal of the LED receives the bus voltage Vbus, a cathode of the LED is coupled to a high-order terminal of the linear driving circuit 11, and another terminal of the linear driving circuit 11 is grounded or grounded through a current sampling resistor Rcs. Of course, in other embodiments, the positions of the LED 12 and the linear driving circuit 11 may be reversed to achieve the same driving function for the LED. That is, the series-connected LED 12 and the linear driving circuit 11 as a whole are coupled between the bus dc power supply and the ground GND, regardless of the order. The LED 12 may be connected in parallel with a capacitor as a load 12 of the linear drive circuit 11. Of course, the load 12 may be other types of electronic devices. The linear driving circuit 11 controls the resistance of the transistor Q by controlling the voltage at the control terminal of the transistor Q, thereby regulating the current Io flowing through the electronic device 12. The transistor Q in the linear driving circuit 11 can operate in a linear region and can also operate in a fully on state, so the linear driving circuit 11 can also be referred to as a driving circuit. In the illustrated embodiment, the transistor Q comprises a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), although the transistor Q may be of other types, such as a Junction Field Effect Transistor (JFET) or a transistor (BJT).

The driver circuit 11 comprises a transistor Q and a control circuit 110, wherein the transistor Q and the electronic device 12 are coupled in series. The control circuit 110 includes a voltage sampling circuit 111, a calculating circuit 112 and a first adjusting circuit 113, wherein an input terminal of the voltage sampling circuit 111 is coupled to the BUS dc power BUS or one terminal of the driving circuit 11, and is configured to generate a voltage sampling signal Vs reflecting the BUS voltage Vbus or a differential voltage across the driving circuit 11. The bus voltage Vbus and the differential voltage across the driving circuit 11 have correlation or similarity in waveform. In the illustrated embodiment, an input terminal of the voltage sampling circuit 111 is coupled to a common node of the driving circuit 11 and the electronic device 12 for sampling the voltage signal Vd thereat. And Vs is K Vd, and K is a sampling scaling coefficient of the voltage sampling circuit. The voltage Vd reflects the difference voltage across the driving circuit 11. In one embodiment, voltage sampling circuit 111 includes a voltage divider circuit. An output terminal of the reference signal generating circuit 1121 provides a first reference signal Vref. The calculation circuit 112 generates a current reference signal Vcr based on the voltage sampling signal Vs and the first reference signal Vref. In one embodiment, the waveform of the first reference signal Vref is as shown in fig. 3.

Fig. 3 shows a signal waveform diagram referring to the circuit of fig. 1 according to an embodiment of the present invention. As shown in fig. 3, the first reference signal Vref is a predetermined constant signal. In another embodiment, the first reference signal Vref may be a binary signal, wherein the first reference signal Vref is high when the bus voltage Vbus is greater than a reference value, and the first reference signal Vref is a low signal, such as a zero value, when the bus voltage Vbus is lower than the reference value, and the first reference signal Vref corresponds to a period of the bus voltage signal Vbus.

Continuing with the description of fig. 1, in one embodiment, the calculation circuit 112 includes a subtraction circuit, the subtraction circuit 112 has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is coupled to the output terminal of the voltage sampling circuit 111 as a subtraction input terminal for receiving the voltage sampling signal Vs, the second input terminal of the subtraction circuit 112 is coupled to the first reference signal Vref as a subtracted input terminal, and the subtraction circuit 112 is configured to subtract the voltage sampling signal Vs from the first reference signal Vref to generate the current reference signal Vcr-Vref-Vs. Referring to fig. 3, the waveform of the current reference signal Vcr is as shown. The figure is merely for illustration, as the current reference signal Vcr may have different waveforms when the first reference signal has different time parameters.

With continued reference to fig. 1, the first regulating circuit 113 has a first input terminal receiving the current sampling signal Vcs, a second input terminal receiving the current reference signal Vcr, and an output terminal coupled to the control terminal of the transistor Q. In the illustrated embodiment, the current sampling circuit includes a current sampling resistor Rcs, and the current sampling signal Vcs is a voltage signal obtained by coupling one end of the current sampling resistor Rcs. Of course, other current sampling circuits may be used to obtain a current sample signal representative of the current flowing through transistor Q or electronic device 12. In the illustrated embodiment, the first input terminal of the first adjusting circuit 113 is an inverting input terminal, and the second input terminal of the first adjusting circuit 113 is a non-inverting input terminal, so that when the current sampling signal Vcs is smaller than the current reference signal Vcr, the first adjusting circuit 113 increases the voltage at the output terminal for expanding the conduction degree of the transistor Q and reducing the effective resistance of the transistor Q for making the current flowing through the transistor Q follow the waveform of the current reference signal Vcr. As shown in fig. 3, in which the current reference signal Vcr decreases when the voltage drop Vds across the transistor (Vds — Vcs) increases (see the falling segment of the saddle-shaped current reference signal Vcr), and increases when the voltage drop Vds of the transistor decreases (see the rising edge of the saddle-shaped current reference signal Vcr), the first regulating circuit 113 is used to control the current Io flowing through the transistor to vary with the voltage drop Vds of the transistor Q. By such adjustment, when the bus voltage is high during the LED on period, the current signal Io flowing through the transistor Q is low, so that the power consumption consumed on the linear driving circuit 11 is low and the efficiency of the system is high.

However, in such an embodiment, in order to obtain higher efficiency, the sampling scaling factor K of the voltage sampling circuit is often set to a larger value, so that the valley value of the current reference signal Vcr is a lower value, i.e., the current flowing through the linear driving circuit is made lower when the bus voltage is higher. However, this control tends to make the lowest value of Vcr touch zero or very low, so that the current flowing through the transistor Q is zero or very low, and once the current is less than the holding current of the triac dimmer 13, the triac dimmer 13 will turn off, thereby affecting the normal control of the system.

In order to eliminate this defect, the utility model discloses an in an embodiment, increased the second regulating circuit, carried out error amplification and/or comparison with current sampling signal Vcs and a threshold signal and then controlled transistor Q for avoid the danger of silicon controlled rectifier stop work when bus voltage is higher.

Fig. 4 shows a schematic diagram of an LED driving system according to an embodiment of the present invention. The driving system comprises a thyristor dimmer 13, a rectifying and filtering circuit 14, a load 12 and a driving circuit 11. Wherein the driving circuit 11 comprises a transistor Q and a control circuit 110. The control circuit 110 further includes a second adjusting circuit 41 in addition to the voltage sampling circuit 111, the calculating circuit 112, and the first adjusting circuit 113 shown in fig. 1. A first input terminal of the second adjusting circuit 41 is coupled to the current sampling resistor Rcs for receiving the current sampling signal Vcs, a second input terminal of the second adjusting circuit 41 receives the threshold signal Vth, and an output terminal of the second adjusting circuit is coupled to the control terminal of the transistor Q. Wherein the current sampling signal Vcs reflects the current Io flowing through the transistor Q. In the illustrated embodiment, the current sampling circuit includes a sampling resistor Rcs, and the current sampling signal Vcs is Io × Rcs, where Rcs is a resistance value of the current sampling resistor. Of course, the current sampling signal Vcs may be obtained by other types of current sampling circuits, and is not limited to the illustrated form. In the illustrated embodiment, the first input of the second regulating circuit 41 is an inverting input and the second input of the second regulating circuit 41 is a non-inverting input. Of course, the non-inverting input terminal and the inverting input terminal of the second adjusting circuit 41 can be exchanged, and it is only necessary to ensure that when the current sampling signal Vcs is reduced to the threshold signal Vth, the voltage signal output by the second adjusting circuit 41 controls the voltage at the control terminal of the transistor Q, so that the resistance between the two terminals (drain-source) of the transistor Q is reduced, and it is ensured that the current Io flowing through the transistor Q does not fall below the holding current of the triac dimmer, so as to ensure that the triac dimmer 13 normally operates when the bus voltage is high, and thus the system normally operates. In the illustrated embodiment, when the current sampling signal Vcs decreases to the threshold signal Vth, the voltage at the output of the second regulating circuit 41 increases for decreasing the on-resistance of the mosfet q. In one embodiment, the threshold signal Vth is a constant value. In another embodiment, the threshold signal Vth is a binary signal, and is zero during the off period of the triac dimmer 13, and is a high value signal in the rest of the period. In one embodiment, the threshold signal Vth has the same waveform as the first reference signal Vref but has a different high value voltage level, wherein the high value voltage of the threshold signal Vth is less than 0.5 times or 0.2 times the high value voltage of the first reference signal Vref.

The control circuit 110 may further include a reference signal generating circuit 1121 for providing a first reference signal Vref, and a threshold signal generating circuit 43 for providing a threshold value model Vth.

Functionally, the linear control circuit 110 includes: a voltage sampling circuit 111, a current waveform control circuit 42, and a current maintenance circuit 40. The input terminal of the voltage sampling circuit 111 is coupled to a bus dc power supply or a common node of the transistor Q and the load 12, and the output terminal provides a voltage sampling signal Vs reflecting a bus voltage Vbus or a voltage Vd at the common node of the transistor Q and the load 12. In one embodiment, the linear control circuit 110 may not include a voltage sampling circuit, i.e., the voltage sampling circuit is external to the control circuit 110. The current waveform control circuit 42 generates a reference current Vcr based on a voltage sampling signal Vs representing a bus voltage or a voltage Vd of a coupling node of the transistor and the load and the current reference signal Vcr for controlling a current flowing through the transistor Q. The current waveform control circuit 42 has a first input terminal coupled to the voltage sampling circuit 111, a second input terminal coupled to the current sampling circuit Rcs, and an output terminal coupled to the control terminal of the transistor Q, and the current waveform control circuit 42 generates an output current Io for controlling the control terminal of the transistor and controlling the current flowing through the transistor Q based on the voltage sampling signal Vs and the output current sampling signal Vcs. Specifically, the current waveform control circuit 42 includes a calculation circuit 112, a reference signal generation circuit 1121, and a first adjustment circuit 113. The output terminal of the reference signal generating circuit 1121 provides a first reference signal Vref, and the first reference signal Vref may be, as shown in fig. 5, the calculating circuit 112 has a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the calculating circuit 112 is coupled to the output terminal of the voltage sampling circuit 111, and the second input terminal of the calculating circuit 112 is coupled to the output terminal of the reference signal generating circuit 1121. Preferably, the calculation circuit 112 is a subtraction circuit. Of course, the calculation circuit may be other types of circuits, such as a complex circuit of a multiplier and a subtractor. The first adjusting circuit 113 has a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the first adjusting circuit 113 is coupled to the current sampling circuit Rcs, the second input terminal of the first adjusting circuit 113 is coupled to the output terminal of the calculating circuit 112, and the output terminal of the first adjusting circuit 113 is coupled to the control terminal of the transistor Q. The first regulating circuit is used for making the waveform shape of the output current Io during the linear operation of the transistor Q a saddle-shaped current waveform control signal, i.e. during at least a period of a sinusoidal half-wave cycle, the output current Io is at a lower value when the bus voltage Vbus is at a higher value and at a higher value when the bus voltage Vbus is at a lower value, as shown in fig. 3 or fig. 5. The current holding circuit 40 is used to control the valley value of the current Io flowing through the transistor Q to be above a predetermined minimum value based on the current sampling signal Vcs and the threshold signal Vth. The input terminal of the current holding circuit 40 is coupled to the current sampling circuit Rcs, the output terminal is coupled to the control terminal of the transistor Q, and the current holding circuit 40 is configured to control the output current Io not to be too low in a normal phase of the bus voltage Vbus, such as when the output current is higher than a certain reference value, based on the output current sampling signal, that is, to control the valley bottom value of the output current Io to be above a predetermined minimum value. So that the output current Io is kept above the holding current of the thyristor dimmer 13, and the normal operation of the system is ensured. Specifically, the current maintaining circuit 40 includes a threshold signal generating circuit 43 and a second adjusting circuit 41, wherein a first input terminal of the second adjusting circuit 41 is coupled to the current sampling signal, a second input terminal of the second adjusting circuit 41 is coupled to the threshold signal Vth, an output terminal of the second adjusting circuit 41 is coupled to the control terminal of the transistor Q, and the second adjusting circuit 41 controls the resistance of the transistor Q based on the error or comparison value between the current sampling signal Vcs and the threshold signal Vth.

In the embodiment shown in fig. 1 and 4, the transistor is a MOSFET, wherein the control terminal of the transistor is the gate of the MOSFET, the drain of the MOSFET is coupled to the load LED 12, and the source of the MOSFET is grounded through the sampling resistor Rcs. However, it should be understood that the transistors may be of other types, such as JFET or BJT transistors, etc.

The first regulating circuit and the second regulating circuit mentioned in the above embodiments are used to perform error amplification on signals at two input terminals, so as to control the resistance of the transistor, and adjust the output current Io. The first regulating circuit and the second regulating circuit can simultaneously have a comparison function and an error amplification function or a difference amplification function, work in an error amplification interval under some conditions, work in a comparison interval with saturated output under other conditions, and the voltage of the output end of the first regulating circuit and the second regulating circuit is used for regulating the effective resistance between the drain electrode and the source electrode of the transistor Q.

Fig. 5 shows a schematic diagram of signal waveforms corresponding to the embodiment in fig. 4 according to an embodiment of the present invention. Fig. 5 shows the bus voltage Vbus, the first reference signal Vref, the current reference signal Vcr, the threshold signal Vth, and the current signal Io flowing through the linear drive circuit 11, respectively. When the sampling scaling factor K of the voltage sampling circuit is set too large, the bottom of the waveform of the current reference signal Vcr approaches a zero value. Without the second adjusting circuit 41, the current flowing through the linear driving circuit may be too low, which is lower than the holding current of the triac dimmer, so that the triac dimmer is turned off, and the system may not work. In the illustrated embodiment, the threshold signal Vth is a binary signal, where Vth is a Vref and a is a positive constant less than 1. In one embodiment, a is less than 0.5 or a is a normal number less than 0.2. In another embodiment, the duration of the threshold signal Vth high value signal may be shorter than the duration of the high value region of the first reference signal Vref. Under the control of the second adjusting circuit 41, the current signal Io is controlled above a minimum value Ith as shown in the figure, and the current value Ith is greater than the holding current of the thyristor dimmer, so that the normal operation of the system is realized, and the situation that the thyristor dimmer 13 is turned off by mistake when the bus voltage Vbus is at a peak is avoided. Wherein the magnitude of the current value Ith is determined by the magnitude of the threshold signal Vth.

Fig. 6 shows a schematic diagram of an LED driving system according to an embodiment of the present invention, wherein the transistors connected in series with the load 12 may include a first transistor Q1 and a second transistor Q2 connected in parallel. The output terminal of the first adjusting circuit 113 is coupled to the control terminal of the first transistor Q1, and the output terminal of the second adjusting circuit 41 is coupled to the control terminal of the second transistor Q2. When the current sampling signal Vcs is lower than the current reference signal Vcr, the voltage at the control end of the first transistor Q1 increases, the resistance of the transistor Q1 decreases, and the current Io increases. When the current sampling signal Vcs is lower than the threshold signal Vth, the control terminal voltage of the second transistor Q2 increases, the resistance of the transistor Q2 decreases, and the current Io increases. Through the adjustment, the control on the waveform of the current Io can be realized simultaneously, so that the current Io follows the waveform of the current reference signal, and the condition that the system cannot work normally due to too low current Io is avoided.

Of course, a driving stage circuit may be further included between the first regulation circuit 113 and the first transistor Q1, or between the second regulation circuit 41 and the second transistor Q2. The driving stage circuit has an input terminal and an output terminal, wherein the input terminal of the driving stage circuit is coupled to the output terminal of the first adjusting circuit or the second adjusting circuit, and the output terminal of the driving stage circuit is coupled to the control terminal of the first transistor or the second transistor. The driver stage circuit is for converting the signal provided by the regulating circuit into a signal having an amplitude suitable for driving the transistor.

Fig. 7 shows a schematic diagram of an LED driving system according to an embodiment of the present invention, wherein the control circuit 110 may further include a logic circuit 71. The first adjusting circuit 113 includes a comparator, the second adjusting circuit 41 includes a comparator, a first input terminal of the logic circuit 71 is coupled to the output terminal of the first comparator 113, a second input terminal of the logic circuit 71 is coupled to the output terminal of the second comparator 41, and an output terminal of the logic circuit 71 is coupled to the control terminal of the transistor Q. In the illustrated embodiment, the logic circuit 71 includes an or gate, and when the current sampling signal Vcs is lower than any one of the current reference signal Vcr or the threshold signal Vth, the first comparator 113 or the second comparator 41 outputs a high level signal, or the or gate outputs a high level signal for controlling the transistor Q to lower the resistance and increase the current Io. The control circuit 110 may further have a driver stage circuit 72 coupled between the output of the logic circuit 71 and the control terminal of the transistor Q for converting a signal provided by the logic circuit into a signal having an amplitude suitable for driving the transistor.

Fig. 8 is a schematic diagram illustrating a flow chart of a method for controlling LED current according to an embodiment of the present invention. The current control method comprises steps 801-804. In step 801, an LED and a linear driving circuit are coupled in series between a bus voltage and a reference ground, wherein the bus voltage may be a rectified and filtered voltage signal of a mains alternating current. In step 802, a current reference signal is generated based on a first reference signal and a voltage sampling signal. The voltage sampling signal can be a signal obtained by sampling bus voltage, and can also be a signal obtained by sampling voltage at one end of the linear driving circuit. In one embodiment, the first reference signal is high when the bus voltage is greater than a reference value and low when the bus voltage is less than the reference value. The current reference signal may be the first reference signal minus the voltage sample signal. In step 803, the current sampling signal and the current reference signal are differentially amplified or compared for controlling the current flowing through the linear driving circuit, as shown in fig. 3, wherein the current reference signal Vcr decreases when the voltage drop Vds across the transistor (Vds — Vcs) increases (see the falling segment of the saddle-shaped current reference signal Vcr), and increases when the voltage drop Vds across the transistor decreases (see the rising edge of the saddle-shaped current reference signal Vcr), for controlling the current Io flowing through the linear driving circuit to vary with the voltage drop Vds across the transistor Q. Wherein the current sampling signal is representative of the current flowing through the linear drive circuit, in one embodiment the current sampling signal is obtained by sampling a voltage drop across a current sampling resistor. Preferably, the current sampling signal and the threshold signal are differentially amplified or compared at step 804 for controlling the current flowing through the linear driving circuit to be maintained above the holding current of the triac dimmer at least in stages, such as for controlling the current flowing through the linear driving circuit to be maintained above the holding current of the triac dimmer when the bus voltage is higher than a reference voltage or when the first reference voltage is high. Wherein the value of the threshold signal is lower than the value of the high value part of the first reference signal. Preferably, the value of the threshold signal is lower than 0.2 times the first reference signal.

The description and applications of the present invention are illustrative and are not intended to limit the scope of the invention to the embodiments described above. Variations and modifications of the embodiments disclosed herein are possible, and alternative and equivalent various components of the embodiments will be apparent to those skilled in the art. It will be clear to those skilled in the art that the present invention may be embodied in other forms, structures, arrangements, proportions, and with other components, materials, and parts, without departing from the spirit or essential characteristics thereof. Other variations and modifications of the embodiments disclosed herein may be made without departing from the scope and spirit of the present invention.

Claims (10)

1. A driver circuit for an electronic device, in series with the electronic device, wherein the electronic device and the driver circuit in series are coupled between a bus dc power supply and a ground reference, the driver circuit comprising:

a transistor connected in series with the electronic device; and

a control circuit, comprising:

the input end of the voltage sampling circuit is coupled with a bus direct-current power supply or a common node of the driving circuit and the electronic device;

the computing circuit is provided with a first input end, a second input end and an output end, wherein the first input end of the computing circuit is coupled with the output end of the voltage sampling circuit, and the second input end of the computing circuit is coupled with the first reference signal; and

the first input end of the first regulating circuit is coupled with the current sampling circuit, the second input end of the first regulating circuit is coupled with the output end of the calculating circuit, and the output end of the first regulating circuit is coupled with the control end of the transistor.

2. The driving circuit of claim 1, wherein the control circuit further comprises a second regulating circuit having a first input terminal, a second input terminal, and an output terminal, the first input terminal of the second regulating circuit coupled to the current sampling circuit, the second input terminal of the second regulating circuit coupled to the threshold signal, and the output terminal of the second regulating circuit coupled to the control terminal of the transistor.

3. The driving circuit of claim 2, wherein the transistor comprises a first transistor and a second transistor coupled in parallel, wherein an output of the first regulating circuit is coupled to a control terminal of the first transistor, and an output of the second regulating circuit is coupled to a control terminal of the second transistor.

4. The drive circuit of claim 2, wherein the threshold signal is less than the first reference signal.

5. The driving circuit of claim 1, wherein the calculation circuit comprises a subtraction circuit, a subtracted input of the subtraction circuit is coupled to the first reference signal, a subtracted input of the subtraction circuit is coupled to an output of the voltage sampling circuit, and an output of the subtraction circuit is coupled to a second input of the first adjustment circuit.

6. The driving circuit of claim 2, wherein the control circuit further comprises a logic circuit, a first input of the logic circuit is coupled to the output of the first regulating circuit, a second input of the logic circuit is coupled to the output of the second regulating circuit, and an output of the logic circuit is coupled to the control terminal of the transistor.

7. The driver circuit of claim 1, wherein the driver circuit further comprises a driver stage circuit having an input terminal and an output terminal, wherein the input terminal of the driver stage circuit is coupled to the output terminal of the first regulator circuit, and the output terminal of the driver stage circuit is coupled to the control terminal of the transistor.

8. An LED driving system comprising a thyristor dimmer, a rectifier circuit, an LED load and a driving circuit as claimed in any one of claims 1 to 7.

9. A linear control circuit for driving a transistor, wherein the transistor is connected in series with a load, the control circuit comprising:

the input end of the voltage sampling circuit is coupled with any node of the transistor or the load, and the output end of the voltage sampling circuit provides a voltage sampling signal;

the first input end of the current waveform control circuit is coupled with the voltage sampling circuit, the second input end of the current waveform control circuit is coupled with the current sampling circuit, and the output end of the current waveform control circuit is coupled with the control end of the transistor; and

and the input end of the current maintaining circuit is coupled with the current sampling circuit, the output end of the current maintaining circuit is coupled with the control end of the transistor, and the current maintaining circuit controls the valley value of the output current to be above a preset minimum value based on the output current sampling signal.

10. The linear control circuit for a drive transistor of claim 9, wherein the current waveform control circuit comprises:

a reference signal generating circuit, an output end of which provides a first reference signal;

the computing circuit is provided with a first input end, a second input end and an output end, wherein the first input end of the computing circuit is coupled with the output end of the voltage sampling circuit, and the second input end of the computing circuit is coupled with the output end of the reference signal generating circuit; and

the first regulating circuit is provided with a first input end, a second input end and an output end, wherein the first input end of the first regulating circuit is coupled with the current sampling resistor, the second input end of the first regulating circuit is coupled with the output end of the calculating circuit, and the output end of the first regulating circuit is coupled with the control end of the transistor.

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